CN111752167A - Universal satellite simulation test system - Google Patents
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- CN111752167A CN111752167A CN202010589212.3A CN202010589212A CN111752167A CN 111752167 A CN111752167 A CN 111752167A CN 202010589212 A CN202010589212 A CN 202010589212A CN 111752167 A CN111752167 A CN 111752167A
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
The invention provides a universal satellite simulation test system which comprises a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and an upper monitor, wherein the main controller board is connected with the upper monitor through an Ethernet port, and is respectively connected with the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board through the bus motherboard. The invention has the beneficial effects that: the universality of the satellite simulation test system is improved.
Description
Technical Field
The invention relates to a satellite simulation test system, in particular to a generalized satellite simulation test system.
Background
In a large satellite test system, each test device is generally not reusable, and a simulator needs to be partially or completely redesigned according to each device, which is not favorable for the development characteristic of short period of commercialized microsatellites.
Although various simplified means have appeared in the commercialized microsatellite simulation test, 1 device needs to be developed for 1 model, so that the complete universality is difficult to achieve, and the efficiency is still low.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a generalized satellite simulation test system.
The invention provides a universal satellite simulation test system which comprises a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and an upper monitor, wherein the main controller board is connected with the upper monitor through an Ethernet port, and is respectively connected with the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board through the bus motherboard.
As a further improvement of the invention, the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board are respectively connected with the satellite borne machine system.
As a further improvement of the present invention, the first programmable smart interface board includes a shared memory space, and the shared memory space allocates a continuous space for each component.
As a further improvement of the present invention, the shared memory space is allocated a communication space for each component.
As a further improvement of the present invention, the shared memory space includes a component data area and a component protocol data area, the component data area is a component type code, the component protocol data area includes a command verification data area, and the command verification data area is used to configure a verification mode in which the DSP board card receives command data sent by the satellite borne aircraft.
As a further improvement of the invention, the content definitions of the first programmable intelligent interface board and the second programmable intelligent interface board are the same, but the fixed-in functions called by the upper monitor are different when the data is imported.
As a further improvement of the present invention, said third programmable smart interface board provides 64 DA outputs.
As a further improvement of the invention, the main controller board is a board card of a standard X86 architecture and is responsible for specifying the execution and operation of all models required by simulation, the model library has a dynamic model and a posture control component model loading component model, and a programmable universal controller board required by dynamic specification of the component model is specified.
As a further improvement of the invention, the upper monitor cuts the model according to the simulation test requirement, downloads the real-time board card of the main control board, and performs component test and closed-loop simulation according to the simulation test requirement in the system running process.
The invention has the beneficial effects that: by the aid of the scheme, the universality of the satellite simulation test system is improved.
Drawings
FIG. 1 is a schematic diagram of a generalized satellite simulation test system according to the present invention.
Fig. 2 is a functional definition diagram of a first programmable smart interface board.
Fig. 3 is a functional definition diagram of a second programmable smart interface board.
FIG. 4 is a system simulation flowchart of an embodiment of a generalized satellite simulation test system according to the present invention.
FIG. 5 is a simulation diagram of a generalized satellite simulation test system according to a second embodiment of the present invention.
FIG. 6 is a closed loop simulation access diagram of a second real gyroscope according to an embodiment of the generalized satellite simulation test system of the present invention.
Detailed Description
The invention is further described with reference to the following description and embodiments in conjunction with the accompanying drawings.
As shown in fig. 1, a generalized satellite simulation test system, whose core is a generic controller board and a generic programmable intelligent interface board series based on a standard bus, includes a host controller board 4, a bus motherboard 5, a first programmable intelligent interface board 1, a second programmable intelligent interface board 2, a third programmable intelligent interface board 3, and an upper monitor 6, where the host controller board 4 is connected to the upper monitor 6 through an ethernet port, and the host controller board 4 is connected to the first programmable intelligent interface board 1, the second programmable intelligent interface board 2, and the third programmable intelligent interface board 3 through the bus motherboard 5.
Programmable intelligent interface board: the universal board card based on different electrical interfaces, such as AD, DA, OC, IO, 422/485, CAN, LVDS, potentiometer and other most electrical interfaces, and the digital logic on the board CAN be programmed by fpga, thus being completely suitable for the time sequence and protocol of various communication interfaces. The universal controller board communicates with the universal interface board through a high-speed standard bus.
The PXI board card is defined as 5659 according to actual use: 8 serial ports and 2 CAN ports. 5871: 8 FPGA, 10 IO. 5487: and 64 paths of DA. The simulation system development of the satellite of the model can be satisfied without exceeding the envelope, and the configuration is a minimum system. When more communication interfaces are needed by hardware, the upgrading can be realized only by adding the board cards with related functions, and the actual use requirements are met.
The first programmable intelligent interface board 1 is a 5659 board card, and the software convention is as follows:
1. sharing the memory: the shared memory space of the board card allocates a section of continuous space for each part, each protocol of the part allocates a section of independent space in the shared memory space of the part as a communication channel with VxWorks software, and the shared memory is organized as shown in the figure. Meanwhile, in order to facilitate the subsequent distribution of shared memories of different models, the 40KB memory space occupied by the board card is divided into 20 parts on average, and each 2KB space is used as a communication space of one component (one part can not occupy more parts).
2. Part type code:
3. command verification data area:
the command verification data is used for configuring a verification mode that the DSP board card receives the command data sent by the satellite borne aircraft.
Command verification configuration data format
The second programmable intelligent interface board 2 is a 5871 board card, and the software convention is as follows:
1. the shared in-memory function is defined as follows:
in fig. 3, a protocol 1 command check data synchronization word, a protocol 1 command check header content, a protocol 1 command data synchronization word, a protocol 1 command data check pass flag, a protocol 1 command data area, a protocol 1 response data synchronization word, and a protocol 1 response data area are all contents that need to be filled according to an actual protocol, and the content definition is consistent with 5659, and the two differences are that when data is imported, a write-in function called by an upper computer is different.
The third programmable intelligent interface board 3 is a 5487 board card: and 64 DA outputs are provided, and only proper matched resistors need to be selected without software protocol convention.
The host controller board 4 is a general host controller board: the simulation system is a board card with a standard X86 architecture and is responsible for specifying the implementation and operation of all models required by simulation, a model library comprises a dynamic model and a posture control component model load component model, and a programmable universal controller board required by dynamic specification of the component model is specified.
The upper monitor 6 cuts the model according to the simulation test requirement, the real-time board card of the main control board is downloaded, and the system operation process is according to the simulation test requirement, such as component test and closed-loop simulation.
The system hardware of the present invention therefore includes: the universal controller board based on the standard bus, the universal interface board series based on the standard bus, the case motherboard based on the standard bus and the upper PC.
The system software of the invention comprises:
the integrated upper computer model base based on simulink comprises a dynamics simulation model, a flywheel simulator model, a gyro simulator model, a magnetic torquer simulator model, a magnetometer simulator model and a measurement and control assembly simulator model. The method is realized by combining simulink graphical programming with s-function based on C function, and can be visual and convenient, and can also be used for conveniently designing communication with PXI bus.
A real-time operating system: the system is used for coding and compiling the simulink module to generate executable codes. And the controller board can be dynamically loaded when the real-time system runs.
Programmable intelligent board program: and the dsp software implementation and the fgpa software implementation comprise the implementation of standard bus communication with an upper computer. Therefore, the requirements of various communication time sequence protocols can be conveniently met.
The first implementation example of the present invention is a closed loop simulation test for switching different models or multiple devices of the same model, as shown in fig. 4:
the software model of the invention realizes the operation principle: based on rapid prototyping development, a RealTimeWorshop tool is used for directly generating optimized and transplantable personalized codes for the graphic file of the simulink model library of the upper computer, automatically generating programs under various real-time systems according to target configuration, and downloading the programs to the real-time system of the controller board for loading and running.
The upper computer model can be replaced by a module meeting the function according to the actual requirement, for example: the momentum wheel adopts speed control, selects a speed feedback loop model, adopts an acceleration model, and directly replaces the model library from the developed model library without influencing any change of a lower computer. The same principle applies to the other modules.
The lower computer momentum wheel originally is RS422 communication and is replaced by CAN communication, the definition of 5871 in the software configuration item of the upper computer is required to be replaced by the content of 5659, the lower computer is not required to be changed, and at the moment, the communication link is switched from the node of 5871 to the corresponding node of 5659. The communication modes of other components can be rapidly switched.
The controller board only needs to store the real-time system bootstrap program normally, and the model and the real-time system are both dynamically downloaded by the host computer, so that the modification is convenient. If the system state needs to be monitored, the controller board is only required to be sent to the monitoring machine through the network port.
The simulation platform can be switched to a required model test platform in fifteen minutes under the condition that tasks are not conflicted aiming at the on-orbit running model. If a plurality of devices need to synchronously test the same model, software development is not needed, and the hardware address in the protocol needs to be updated to the address allocated to the device, so that the device can be directly operated.
In the second implementation example of the present invention, the pure digital closed loop simulation of the attitude control system is rapidly implemented, as shown in fig. 5:
and the model is built into a model base, the replacement can be directly selected, and if the model is not replaced, the model is added after being developed without problems. The universal intelligent interface board develops corresponding universal software through architecture design, is decoupled from data transmission of an upper computer, CAN be directly used as long as a protocol supported by design (two types of CAN and serial ports are designed currently and CAN be developed continuously) is adopted, is not required to be developed again, CAN quickly simulate each component of the attitude control system, and performs closed-loop test.
Semi-physical simulation implementation of attitude control system
The system can be conveniently accessed to a real part, and a 5659 or 5871 board card is added to communicate with the turntable according to the protocol content added as required, namely semi-physical closed-loop simulation can be realized only by exciting communication with the part, for example, the closed-loop simulation access of a real gyroscope is shown in fig. 6.
The universal satellite simulation test system provided by the invention has the advantages that the simulation system platform hardware and the protocol are standardized, the communication protocol and the component simulation model can be rapidly switched. The simulator model is cut by the upper computer and then is downloaded to the control panel to run in a unified mode, and a simulator hardware interface time sequence protocol can be rapidly realized by a dsp or an fpga. The model and the hardware interface are connected and interconnected at high speed by a standard bus. The functions of switching operation and rapid change of a plurality of types of equipment without debugging during the operation of the equipment of one type are realized; a rapid prototyping development method of dynamic simulation software. Namely, the graphical programming is based on matlab, and the rapid downloading is realized, so that the time for writing codes is saved. And the separation of model development and model development has stronger compatibility to burst tasks.
The universal satellite simulation test system provided by the invention standardizes the memory definition of bottom hardware, standardizes the protocol compiling principle, frames a protocol according to actual needs, quickly replaces the model, and decouples the functions of the model, the protocol, data storage and reading through the design thought of a software framework by the lower computer of the upper computer. The direct use of different types of software versions under the same hardware is realized, and the direct use of the same software version on different hardware is not carried out any more.
The universal satellite simulation test system provided by the invention can realize simulation and test of all subsystems on the satellite through full-system simulation. More professional systems can be simulated, and the mathematical meaning of the model needs to be continuously upgraded.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (9)
1. A generalized satellite simulation test system is characterized in that: the intelligent monitoring system comprises a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and an upper monitor, wherein the main controller board is connected with the upper monitor through an Ethernet port, and the main controller board is respectively connected with the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board through the bus motherboard.
2. The generalized satellite simulation test system of claim 1, wherein: the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board are respectively connected with the satellite borne machine system.
3. The generalized satellite simulation test system of claim 1, wherein: the first programmable intelligent interface board comprises a shared memory space, and the shared memory space is a section of continuous space allocated to each component.
4. The generalized satellite simulation test system of claim 3, wherein: the shared memory space is allocated with a communication space for each component.
5. The generalized satellite simulation test system of claim 3, wherein: the shared memory space comprises a component data area and a component protocol data area, the component data area is a component type code, the component protocol data area comprises a command verification data area, and the command verification data area is used for configuring a verification mode of the DSP board card for receiving command data sent by the satellite borne aircraft.
6. The generalized satellite simulation test system of claim 3, wherein: the first programmable intelligent interface board and the second programmable intelligent interface board have the same content definition, but the first programmable intelligent interface board and the second programmable intelligent interface board have different access functions called by the upper monitor when data is imported.
7. The generalized satellite simulation test system of claim 3, wherein: the third programmable smart interface board provides 64 paths of DA output.
8. The generalized satellite simulation test system of claim 1, wherein: the main controller board is a standard X86-structured board card and is responsible for specifying the implementation and operation of all models required by simulation, the model library comprises a dynamic model and a posture control component model load component model, and a programmable universal controller board required by dynamic specification of the component models is specified.
9. The generalized satellite simulation test system of claim 1, wherein: and the upper monitor cuts the model according to the simulation test requirement, downloads the real-time board card of the master control board, and performs component test and closed-loop simulation according to the simulation test requirement in the system running process.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112666847A (en) * | 2021-03-18 | 2021-04-16 | 长沙天仪空间科技研究院有限公司 | Satellite test system and method suitable for various simulation states |
| CN112947383A (en) * | 2021-03-18 | 2021-06-11 | 长沙天仪空间科技研究院有限公司 | Satellite simulation test system for data stream multi-directional transmission |
| CN113468054A (en) * | 2021-07-01 | 2021-10-01 | 中国科学院微小卫星创新研究院 | Automatic test system and method for satellite interface and function test |
| CN113885368A (en) * | 2021-08-26 | 2022-01-04 | 航天东方红卫星有限公司 | Integrated testing shelter for pico-nano satellite |
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| CN110850842A (en) * | 2019-11-05 | 2020-02-28 | 上海航天控制技术研究所 | Satellite full-function single-machine simulation system and method based on hardware-in-the-loop |
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| CN110673592A (en) * | 2019-10-25 | 2020-01-10 | 深圳航天东方红海特卫星有限公司 | Universal fault detection and test system for multiple subsystems of microsatellite |
| CN110850842A (en) * | 2019-11-05 | 2020-02-28 | 上海航天控制技术研究所 | Satellite full-function single-machine simulation system and method based on hardware-in-the-loop |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112666847A (en) * | 2021-03-18 | 2021-04-16 | 长沙天仪空间科技研究院有限公司 | Satellite test system and method suitable for various simulation states |
| CN112947383A (en) * | 2021-03-18 | 2021-06-11 | 长沙天仪空间科技研究院有限公司 | Satellite simulation test system for data stream multi-directional transmission |
| CN113885351A (en) * | 2021-03-18 | 2022-01-04 | 长沙天仪空间科技研究院有限公司 | Simulation test equipment and method for satellite simulation test |
| CN112947383B (en) * | 2021-03-18 | 2022-07-22 | 长沙天仪空间科技研究院有限公司 | Satellite simulation test system for data stream multi-directional transmission |
| CN113468054A (en) * | 2021-07-01 | 2021-10-01 | 中国科学院微小卫星创新研究院 | Automatic test system and method for satellite interface and function test |
| CN113468054B (en) * | 2021-07-01 | 2024-02-09 | 中国科学院微小卫星创新研究院 | Automatic test system and method for satellite interface and function test |
| CN113885368A (en) * | 2021-08-26 | 2022-01-04 | 航天东方红卫星有限公司 | Integrated testing shelter for pico-nano satellite |
| CN113885368B (en) * | 2021-08-26 | 2023-07-28 | 航天东方红卫星有限公司 | Integrated test shelter for pico-nano satellite |
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