CN111736008A - Bipolar input signal detection circuit - Google Patents

Bipolar input signal detection circuit Download PDF

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Publication number
CN111736008A
CN111736008A CN202010633535.8A CN202010633535A CN111736008A CN 111736008 A CN111736008 A CN 111736008A CN 202010633535 A CN202010633535 A CN 202010633535A CN 111736008 A CN111736008 A CN 111736008A
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resistor
input
input signal
module
capacitor
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CN202010633535.8A
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Chinese (zh)
Inventor
郭亮
曾涛
付晓君
陈雪
廖望
侯江
谢向阳
苏豪
刘凡
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CETC 24 Research Institute
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CETC 24 Research Institute
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Priority to CN202010633535.8A priority Critical patent/CN111736008A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16533Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
    • G01R19/16557Logic probes, i.e. circuits indicating logic state (high, low, O)
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/30Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/175Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

The invention provides a bipolar input signal detection circuit, comprising: inputting a signal; a positive pressure detection module for detecting a positive pressure portion of the input signal; the negative pressure detection module is used for detecting a negative pressure part of the input signal; the delay module is used for delaying the detection result of the positive pressure detection module or the detection result of the negative pressure detection module for a specified time, and performing OR operation on the detection result at the current moment and the delayed detection result to obtain an output level signal; the invention outputs effective control signals through automatic bipolar detection, thereby reducing the complexity of design.

Description

Bipolar input signal detection circuit
Technical Field
The invention relates to the field of integrated circuit design, in particular to a bipolar input signal detection circuit.
Background
In a wired communication system, when the whole device does not work, the whole system is usually expected to be in a standby state, so that power consumption is reduced, and the service life of a device is prolonged. However, enabling software configuration will certainly increase the design complexity, greatly affecting the work efficiency.
Disclosure of Invention
In view of the problems in the prior art, the invention provides a bipolar input signal detection circuit, which mainly solves the problem that the existing detection circuit depends on manual or software configuration and has high design complexity.
In order to achieve the above and other objects, the present invention adopts the following technical solutions.
A bipolar input signal detection circuit comprising:
inputting a signal;
a positive pressure detection module for detecting a positive pressure portion of the input signal;
the negative pressure detection module is used for detecting a negative pressure part of the input signal;
and the delay module is used for delaying the detection result of the positive pressure detection module or the detection result of the negative pressure detection module for a specified time, and performing OR operation on the detection result at the current moment and the delayed detection result to obtain an output level signal.
Optionally, the output end of the positive pressure detection module and the output end of the negative pressure detection module are respectively connected with the input end of the first and gate to perform and logic operation; the output end of the first AND gate is respectively connected with the input end of the delay module and one input end of the second AND gate; the other input end of the second AND gate is connected with the output end of the delay module; and the output end of the second AND gate is used as the output end of the whole detection circuit.
Optionally, the system further comprises an input protection module for clamping the input signal in a specified signal interval, an input end of the input protection module is connected with the input signal, an output end of the input protection module is respectively connected with an input end of the positive voltage detection module and an input end of the negative voltage detection module,
optionally, the input protection module includes a first resistor, a second resistor, a third resistor, a first triode, a second triode, and an MOS transistor; one end of the first resistor, one end of the second resistor and one end of the third resistor are connected, the other end of the first resistor is connected with the input signal, and the other end of the second resistor is connected with the emitting electrode of the first triode and the collecting electrode of the second triode to form the output end of the input protection module; the other end of the third resistor is grounded; the base electrode of the first triode is connected with the power supply, and the collector electrode of the first triode is grounded; the base electrode of the second triode is in short circuit with the collector electrode; and an emitter of the second triode is connected with a drain of the MOS tube, a grid of the MOS tube is in short circuit with the drain, and the body end and the source end of the MOS tube are grounded.
Optionally, the positive voltage detection module includes a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a first comparator, and a first inverter; one end of the fourth resistor, one end of the fifth resistor and one end of the first capacitor are connected to the non-inverting input end of the comparator through the same node; the other end of the fourth resistor is connected with a power supply; the other end of the fifth resistor is grounded; the other end of the first capacitor is grounded; the other end of the sixth resistor is connected with the output end of the first comparator and the input end of the first phase inverter; the reverse phase input end of the first comparator is used as the input end of the positive pressure detection module; and the output end of the first phase inverter is used as the output end of the positive pressure detection module.
Optionally, the negative voltage detection module includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, an operational amplifier, a second capacitor, and a second comparator; one end of the seventh resistor, one end of the eighth resistor and one end of the second capacitor are connected and are connected to the non-inverting input end of the operational amplifier; the other end of the seventh resistor is connected with a power supply; the other end of the eighth resistor and the other end of the second capacitor are grounded; the inverting input end of the operational amplifier is in short circuit with the output end and is connected with one end of the ninth resistor; the other end of the ninth resistor is connected with one end of the tenth resistor and is simultaneously connected with the reverse input end of the second comparator; the other end of the tenth resistor is used as the input end of the negative pressure detection module; the output end of the second comparator is connected with one end of the twelfth resistor to serve as the output end of the negative pressure detection module; the other end of the twelfth resistor is connected with one end of the eleventh resistor and is connected with the non-inverting input end of the second comparator; the other end of the eleventh resistor is grounded.
Optionally, the delay module includes a second inverter, a third inverter, and a third capacitor; the input end of the second inverter is used as the input end of the delay module; the output end of the second inverter is respectively connected with the input end of the third inverter and one end of a third capacitor; the other end of the third capacitor is grounded; and the output end of the third inverter is used as the output end of the delay module.
Optionally, the first transistor and the second transistor are PNP bipolar junction transistors.
Optionally, the MOS transistor is an NMOS transistor.
Optionally, the third capacitor is a variable capacitor.
As described above, the bipolar input signal detection circuit according to the present invention has the following advantageous effects.
The positive pressure detection module and the negative pressure detection module are used for respectively detecting the positive pressure part and the negative pressure part of the input signal, so that the aim of bipolar detection can be fulfilled; the detected signal is kept for a specified time through the delay module, so that whether the level change of the input signal exceeds the specified time or not is judged, and an effective signal is automatically output to control the working state.
Drawings
Fig. 1 is a schematic structural diagram of a bipolar input signal detection circuit according to an embodiment of the invention.
Fig. 2 is a schematic diagram of an input protection module according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of an operating waveform of a bipolar input signal detection circuit according to an embodiment of the invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Referring to fig. 1, the present invention provides a bipolar input signal detection circuit, which includes a positive voltage detection module 201, a negative voltage detection module 202, and a delay module 203.
In an embodiment, the input protection module 200 may be further connected to the input ends of the positive pressure detection module 201 and the negative pressure detection module. The input end of the input protection module 200 is connected to the input signal, and the output end is connected to the input end of the positive voltage detection module 201 and the input end of the negative voltage detection module 202, respectively.
The input protection circuit 200 receives an input signal RIN, and obtains an output signal RIN1 after clamping the RIN, and further provides RIN1 to the positive voltage detection module 201 and the negative voltage detection module 202, where the positive voltage detection module 201 is used to detect the situation when the input signal RIN1 is positive voltage, the negative voltage detection module 202 is used to detect the situation when the input signal RIN1 is negative voltage, the output signals VCO1 and VCO2 of the two detection circuits are connected to the input terminals of the delay module 203 and the second OR gate OR2 after passing through the first OR gate OR1 OR logic operation, the delay module 203 delays the output signal net4 of the first OR gate OR1 and outputs the delayed signal through the net6 and performs OR logic operation with the signal of the net4, and is used to ensure that the indication signal inn will give an effective signal of low level "0" when the input signal RIN is floating OR the input signal RIN is in a low state and reaches a specified time period t 0.
In one embodiment, the input protection module 200 comprises three resistors R1, R2 and R3, two PNP BJT transistors BP1 and BP2, and an NMOS transistor MN1, the positive terminal of the first resistor R1 is connected to the input terminal RIN, the negative terminal thereof is connected to the BJT 2, and the negative terminal of the third resistor R3, the negative terminal of the second resistor R2 is connected to the emitter of the first BJT transistor BP1, the base and the collector of the second BJT transistor BP2, the negative terminal of the third resistor R3 is connected to ground GND, the base of the first BJT transistor BP1 is connected to power VCC, the collector thereof is connected to ground GND, the emitter of the second BJT transistor BP2 is connected to the gate and the drain of the NMOS transistor MN1, the source terminal MN1 of the NMOS transistor, the terminal GND is connected to ground, the input protection module 200 is configured to receive the input signal RIN, and when the input signal RIN has an excessive amplitude, the protection circuit limits the input protection circuit to a certain interval, for protecting the devices at the receiving end.
In one embodiment, the positive voltage detection circuit includes three resistors R4, R5 and R6, a capacitor C1, an inverter INV1 and a comparator COMP 1. The resistor R4 and the resistor R5 form a voltage division network to provide an input reference voltage VCP1 for the comparator COMP1 to be input to the non-inverting input terminal, the positive terminal of the capacitor C1 is connected with the non-inverting input terminal of the comparator COMP1, the negative terminal of the capacitor C1 is grounded GND, two ends of the resistor R6 are respectively connected to the non-inverting input terminal and the output terminal net3 of the comparator COMP1, the inverting input terminal of the comparator COMP1 is connected with the input protection module 200, the output terminal of the comparator COMP1 is connected with the input terminal of the inverter INV1, and the output terminal of the inverter INV1 is the output signal terminal VCO1 of the positive voltage detection.
In one embodiment, the negative voltage signal detection circuit includes six resistors R7-R12, a capacitor C2, an operational amplifier OP1 and a comparator COMP 2. The resistor R7 and the resistor R8 form a voltage division network to provide an input reference voltage VIP for a non-inverting input terminal of the operational amplifier OP1, a positive terminal of the capacitor C2 is connected with a non-inverting input terminal of the operational amplifier OP1, a negative terminal of the capacitor C2 is connected to ground GND, an inverting input terminal VIN of the operational amplifier OP1 is connected with an output terminal and a positive terminal of the resistor R9, a inverting input terminal VCN2 of the comparator COMP2 is connected with a negative terminal of the resistor R9 and a positive terminal of the resistor R10, a negative terminal of the resistor R10 is connected with an output terminal of the input protection module 200, a non-inverting input terminal of the comparator COMP2 is connected with a positive terminal of the resistor R11 and a positive terminal of the resistor R12, a negative terminal of the resistor R11 is connected with ground GND, a negative terminal of the resistor R12 is connected with an output terminal of the comparator COMP2, wherein the output terminal of the comparator COMP2 is an.
In one embodiment, the delay module 203 includes two inverters INV2 and INV3 and a variable capacitor C3, the output signal VCO1 of the positive voltage detection module 201 and the output signal VCO2 of the negative voltage detection module 202 are respectively connected to the input terminal of the OR1, and after the OR logic operation, the output terminal of the OR1 is connected to the input terminal net4 of the inverter INV 2. The output end net5 of the inverter INV2 and the positive end of the capacitor C3 are connected to the input end of the inverter INV3, the output end of the inverter INV3 is the output end net6 of the delay module 203, and the delay module 203 is configured to delay the signal for a period of time.
Referring to the schematic diagram of the signal principle of the detection circuit in fig. 2, the input protection module limits the signal level received by the RIN terminal of the input signal to be between-V6 and + V3, when the receiving terminal is floating or the input signal is low, i.e., -V4 is less than or equal to RIN less than or equal to + V1, the detection circuit outputs the indication signal INVALIDN to be a low level "0", when the input signal RIN is greater than or equal to + V2 or RIN less than or equal to-V5, the detection circuit outputs the indication signal INVALIDN to be a high level "1", and when the input signal + V1 is less than or equal to RIN less than or equal to + V2 or-V5 is less than or equal to-V4, the interval is a detection hysteresis interval, and the state is indefinite.
Referring to the schematic diagram of the working waveform of the detection circuit in FIG. 3, the delay time of the delay module is Δ t1, where Δ t0 is equal to or less than Δ t1, Δ t2 is equal to or more than Δ t1, and the amplitude of the input signal RIN is-V6- + V3.
Time period 0 to t 0: INVALIDN is high level "1";
time period t 0-t 1: since the delta t0 is less than or equal to the delta t1, INVALIDN is high level 1;
time period t 1-t 2: INVALIDN is high level "1";
time period t 2-t 3: INVALIDN is high level "1";
time period t 3-t 5: since the delta t2 is more than or equal to the delta t1, INVALIDN is low level 0;
time period t 5-t 6: INVALIDN is high level "1";
time period t 6: INVALIDN is low "0".
In summary, according to the bipolar input signal detection circuit of the present invention, the positive voltage detection module can achieve the detection function when the input signal is positive voltage, and the negative voltage detection module can achieve the detection function under negative voltage, so as to achieve the purpose of bipolar detection; when the amplitude of the input signal is too large, the input protection module can effectively ensure that the input signal is limited in a certain range, so that the normal work of a circuit at a receiving end is ensured; when the signal received by the input end is changed from high amplitude to a signal with very low amplitude or in a suspended state, the indicating signal is changed from high level '1' to low level '0', if the input signal is quickly converted into a high amplitude signal, the indicating signal is always high level '1', wherein the indicating signal is changed into low level '0' only when the amplitude of the input signal is very low or the suspended state of the input end is kept for a certain time. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (10)

1. A bipolar input signal detection circuit, comprising:
inputting a signal;
a positive pressure detection module for detecting a positive pressure portion of the input signal;
the negative pressure detection module is used for detecting a negative pressure part of the input signal;
and the delay module is used for delaying the detection result of the positive pressure detection module or the detection result of the negative pressure detection module for a specified time, and performing OR operation on the detection result at the current moment and the delayed detection result to obtain an output level signal.
2. The bipolar input signal detection circuit according to claim 1, wherein the output terminal of the positive voltage detection module and the output terminal of the negative voltage detection module are respectively connected to the input terminal of the first and gate for performing an and logic operation; the output end of the first AND gate is respectively connected with the input end of the delay module and one input end of the second AND gate; the other input end of the second AND gate is connected with the output end of the delay module; and the output end of the second AND gate is used as the output end of the whole detection circuit.
3. The bipolar input signal detection circuit according to claim 1, further comprising an input protection module for clamping the input signal within a specified signal interval, wherein an input terminal of the input protection module is connected to the input signal, and an output terminal of the input protection module is connected to an input terminal of the positive voltage detection module and an input terminal of the negative voltage detection module, respectively.
4. The bipolar input signal detection circuit of claim 3, wherein the input protection module comprises a first resistor, a second resistor, a third resistor, a first triode, a second triode, and a MOS transistor; one end of the first resistor, one end of the second resistor and one end of the third resistor are connected, the other end of the first resistor is connected with the input signal, and the other end of the second resistor is connected with the emitting electrode of the first triode and the collecting electrode of the second triode to form the output end of the input protection module; the other end of the third resistor is grounded; the base electrode of the first triode is connected with the power supply, and the collector electrode of the first triode is grounded; the base electrode of the second triode is in short circuit with the collector electrode; and an emitter of the second triode is connected with a drain of the MOS tube, a grid of the MOS tube is in short circuit with the drain, and the body end and the source end of the MOS tube are grounded.
5. The bipolar input signal detection circuit of claim 1, wherein the positive voltage detection module comprises a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a first comparator, and a first inverter; one end of the fourth resistor, one end of the fifth resistor and one end of the first capacitor are connected to the non-inverting input end of the comparator through the same node; the other end of the fourth resistor is connected with a power supply; the other end of the fifth resistor is grounded; the other end of the first capacitor is grounded; the other end of the sixth resistor is connected with the output end of the first comparator and the input end of the first phase inverter; the reverse phase input end of the first comparator is used as the input end of the positive pressure detection module; and the output end of the first phase inverter is used as the output end of the positive pressure detection module.
6. The bipolar input signal detection circuit of claim 1, wherein the negative voltage detection module comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, an operational amplifier, a second capacitor, and a second comparator; one end of the seventh resistor, one end of the eighth resistor and one end of the second capacitor are connected and are connected to the non-inverting input end of the operational amplifier; the other end of the seventh resistor is connected with a power supply; the other end of the eighth resistor and the other end of the second capacitor are grounded; the inverting input end of the operational amplifier is in short circuit with the output end and is connected with one end of the ninth resistor; the other end of the ninth resistor is connected with one end of the tenth resistor and is simultaneously connected with the reverse input end of the second comparator; the other end of the tenth resistor is used as the input end of the negative pressure detection module; the output end of the second comparator is connected with one end of the twelfth resistor to serve as the output end of the negative pressure detection module; the other end of the twelfth resistor is connected with one end of the eleventh resistor and is connected with the non-inverting input end of the second comparator; the other end of the eleventh resistor is grounded.
7. The bipolar input signal detection circuit of claim 1, wherein the delay module comprises a second inverter, a third capacitor; the input end of the second inverter is used as the input end of the delay module; the output end of the second inverter is respectively connected with the input end of the third inverter and one end of a third capacitor; the other end of the third capacitor is grounded; and the output end of the third inverter is used as the output end of the delay module.
8. The bipolar input signal detection circuit of claim 4, wherein the first transistor and the second transistor are PNP bipolar junction transistors.
9. The bipolar input signal detection circuit of claim 4, wherein the MOS transistor is an NMOS transistor.
10. The bipolar input signal detection circuit of claim 7, wherein the third capacitor is a variable capacitor.
CN202010633535.8A 2020-07-02 2020-07-02 Bipolar input signal detection circuit Pending CN111736008A (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0664176U (en) * 1993-02-18 1994-09-09 横河電機株式会社 Abnormal signal monitoring circuit
CN101557211A (en) * 2009-04-30 2009-10-14 上海新茂半导体有限公司 Time sequence signal source circuit
CN201955363U (en) * 2010-12-20 2011-08-31 西安开容电子技术有限责任公司 Pulse width adjustable current generation and detection circuit
CN202513543U (en) * 2012-04-25 2012-10-31 吴雯雯 Overcurrent protection circuit
CN103873028A (en) * 2012-12-12 2014-06-18 南亚科技股份有限公司 Memory apparatus and signal delay circuit for generating delayed column select signal
US20170016948A1 (en) * 2015-07-15 2017-01-19 The Boeing Company Linear Variable Differential Transformer (LVDT) Excitation Wiring Intermittent Failure Monitor
US20170299637A1 (en) * 2016-04-18 2017-10-19 Lsis Co., Ltd. Analog signal detecting circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0664176U (en) * 1993-02-18 1994-09-09 横河電機株式会社 Abnormal signal monitoring circuit
CN101557211A (en) * 2009-04-30 2009-10-14 上海新茂半导体有限公司 Time sequence signal source circuit
CN201955363U (en) * 2010-12-20 2011-08-31 西安开容电子技术有限责任公司 Pulse width adjustable current generation and detection circuit
CN202513543U (en) * 2012-04-25 2012-10-31 吴雯雯 Overcurrent protection circuit
CN103873028A (en) * 2012-12-12 2014-06-18 南亚科技股份有限公司 Memory apparatus and signal delay circuit for generating delayed column select signal
US20170016948A1 (en) * 2015-07-15 2017-01-19 The Boeing Company Linear Variable Differential Transformer (LVDT) Excitation Wiring Intermittent Failure Monitor
US20170299637A1 (en) * 2016-04-18 2017-10-19 Lsis Co., Ltd. Analog signal detecting circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
郭宝清: "《电工电子技术基础》", 28 February 2019 *

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