CN111710273A

CN111710273A - Display device

Info

Publication number: CN111710273A
Application number: CN201910203590.0A
Authority: CN
Inventors: 黄冠宪; 张益诚; 王佑诚
Original assignee: Innolux Corp
Current assignee: Innolux Corp
Priority date: 2019-03-18
Filing date: 2019-03-18
Publication date: 2020-09-25
Anticipated expiration: 2039-03-18
Also published as: CN111710273B

Abstract

The invention provides a display device which comprises a first scanning line, a second scanning line, a signal control circuit and a grid circuit. The first scan line is coupled to a first number of the plurality of pixels. The second scanning line is coupled with a second number of a plurality of pixels. The signal control circuit outputs a first output start signal and a second output start signal. The gate circuit is coupled to the first scan line and the second scan line, and generates a first scan signal to the first scan line according to the first output enable signal, and generates a second scan signal to the second scan line according to the second output enable signal. Wherein the first number is smaller than the second number, and a first pulse width of the first output enable signal is larger than a second pulse width of the second output enable signal.

Description

Display device

Technical Field

The present invention relates to a display device, and more particularly, to a non-rectangular display device having uniform picture quality.

Background

Conventional display panels are all rectangular, but recently, non-rectangular displays have appeared in response to various designs of originality. The length of each pixel column in the non-rectangular display is different, and thus each pixel column may have different RC loading (RC loading), resulting in non-uniform picture quality of the display. Therefore, there is a need for a solution to the problem of non-uniform picture quality in non-rectangular display devices.

In view of the above problems, it is desirable to provide a non-rectangular display device to improve the uniformity of the display screen.

Disclosure of Invention

In order to solve the problem of uneven picture quality, the invention provides a display device.

A display device of the present invention includes a first scan line, a second scan line, a signal control circuit, and a gate circuit. The first scan line is coupled to a first number of the plurality of pixels. The second scanning line is coupled with a second number of a plurality of pixels. The signal control circuit outputs a first output start signal and a second output start signal. The gate circuit is coupled to the first scan line and the second scan line, and generates a first scan signal to the first scan line according to the first output enable signal, and generates a second scan signal to the second scan line according to the second output enable signal. Wherein the first number is smaller than the second number, and a first pulse width of the first output enable signal is larger than a second pulse width of the second output enable signal.

In an embodiment of the present invention, the signal control circuit includes a first buffer and a second buffer, wherein the first buffer outputs the first pulse width, and the second buffer outputs the second pulse width.

In an embodiment of the invention, the signal control circuit includes a first pulse counter and a second pulse counter, wherein the first pulse counter receives the first pulse width and outputs the first output start signal, and the second pulse counter receives the second pulse width and outputs the second output start signal.

In an embodiment of the present invention, the display apparatus further includes: a width controller and a selection circuit are electrically connected with the width controller.

In an embodiment of the invention, the signal control circuit includes a buffer, wherein the buffer alternately outputs the first pulse width of the first output enable signal or the second pulse width of the second output enable signal according to a clock signal.

In an embodiment of the invention, a width of the second scan signal corresponding to the second scan line is greater than a width of the first scan signal corresponding to the first scan line.

In an embodiment of the invention, the signal control circuit includes a pulse counter, wherein the pulse counter outputs the first output enable signal or the second output enable signal to the gate circuit according to the first pulse width or the second pulse width.

In an embodiment of the invention, the display device further includes a third scan line coupled to a third number of the plurality of pixels, wherein the third number is greater than the second number, and a third pulse width of a third output enable signal corresponding to the third scan line is smaller than the second pulse width of the second output enable signal.

The invention also provides a display device which comprises a first group of scanning lines, a second group of scanning lines, a signal control circuit and a grid circuit. The signal control circuit outputs a first output start signal and a second output start signal. The gate circuit is coupled to the first group of scan lines and the second group of scan lines, and generates a first scan signal to the first group of scan lines according to the first output enable signal, and generates a second scan signal to the second group of scan lines according to the second output enable signal. The number of pixels coupled to any one of the first group of scanning lines is less than the number of pixels coupled to any one of the second group of scanning lines, and a first pulse width of the first output enable signal is greater than a second pulse width of the second output enable signal.

In an embodiment of the present invention, the signal control circuit includes a buffer and a pulse counter.

Drawings

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below, wherein:

fig. 1 is a graph showing a relationship between a scanning signal of a scanning line and an output start signal.

FIG. 2 is a schematic front view of a non-rectangular display device.

Fig. 3 is a schematic block diagram of a scan line driving circuit according to an embodiment of the invention.

Fig. 4 is a signal waveform diagram showing a case where the scanning line driving circuit of fig. 3 drives a non-rectangular display device.

Fig. 5 is a flowchart of the scan line driver circuit of fig. 3 for changing the pulse width of the output enable signal.

FIG. 6 is a schematic block diagram of a scan line driving circuit according to another embodiment of the present invention.

Fig. 7 is a signal waveform diagram showing a case where the scanning line driving circuit of fig. 6 drives a non-rectangular display device.

Fig. 8 is a flowchart of the scanning line driving circuit of fig. 6 for changing the pulse width of the output start signal.

Element numbering in the figures:

1 non-rectangular display device

10 display area

20 non-display area

30. 30' signal control circuit

31. 31a, 31b, 31n buffer

32. 32a, 32b, 32n pulse counter

33 width controller

34 selection circuit

40-gate circuit

CKV frequency signal

SL, Ga +1, Gb +1, Gc, Gd scanning line

STV start signal

High potential widths of T, Ta +1, Tb +1, Tc and Td

t, ta, tb, tc, tn pulse widths

W, W1, W2, Wa, Wb, Wc, Wd scanning signal width

OE output enable signal

Detailed Description

The following description provides many different embodiments for implementing different features of the invention. The components and arrangements of the following embodiments are illustrative only and not intended to be limiting. For example, the description of a structure having a first feature over or on a second feature may include direct contact between the first and second features, or another feature disposed between the first and second features, such that the first and second features are not in direct contact.

The terms first and second, etc. in this specification are used for clarity of explanation only and do not correspond to and limit the scope of the claims. The terms first feature, second feature, and the like are not intended to be limited to the same or different features.

Spatially relative terms, such as above or below, are used herein for ease of description of one element or feature in relation to another element or feature. Devices used or operated in different orientations than those depicted in the figures are also contemplated. The shapes of the figures, dimensions, and thicknesses may be exaggerated for clarity and are not drawn to scale or simplified for illustrative purposes only.

Fig. 1 is a diagram illustrating a relationship between a scan signal of a scan line and an output enable signal. The output enable Signal (OutputEnable Signal) OE is an enable Signal for controlling the output time of the scan Signal of each scan line SL, and each scan line SL sequentially outputs the scan Signal to each pixel (not shown) on the scan line SL when each output enable Signal OE decreases from a high level to a low level. The gate (not shown) of each pixel starts to charge after receiving a scan signal, and when the potential of the gate is maintained at a high potential, the pixel starts to read an image signal. Since the pixel itself requires a certain time to charge and discharge, the scan signal width W is larger than the high potential width T when the pixel is at the high potential.

Fig. 2 is a schematic front view of a non-rectangular display device 1. The non-rectangular display device 1 in fig. 2 has a curved profile. The non-rectangular display device 1 has a display area 10 and a non-display area 20 disposed adjacent to the display area 10. The plurality of scan lines cross over from one side of the display area 10 to the other side, and since the periphery of the display area 10 is arc-shaped, the lengths of the scan lines may be the same or different, and the number of pixels (the number of transistors) driven by the scan lines may be the same or different. Here, four scanning lines Ga, Ga +1, Gb +1 are taken as an example among the plurality of scanning lines, where the scanning lines Ga, Ga +1 are adjacent, the scanning lines Gb, Gb +1 are adjacent, the scanning lines Gb and Ga +1 are not adjacent, and a plurality of scanning lines are spaced therebetween. In the non-rectangular display device 1 of fig. 2, since the lengths of the scanning lines Ga, Ga +1, Gb +1 are different, the number of pixels (the number of transistors) to be driven is different, and the RC load is also different.

When the RC load is larger, the charging and discharging time of each pixel on the scan line is increased, and the pulse width of the scan signal is insufficient. When the pulse width is insufficient, the time for reading the image voltage by the pixel is insufficient, so that the image voltage cannot reach the predetermined voltage and the image quality is affected.

Fig. 3 is a schematic block diagram of a scan line driving circuit according to an embodiment of the invention. And fig. 4 is a signal waveform diagram showing a case where the scanning line driving circuit of fig. 3 drives a non-rectangular display device. In the present embodiment, the scanning line driving circuit includes a Signal control circuit (Signal control circuit)30 and a Gate circuit (Gate circuit) 40. The signal control circuit 30 includes a first buffer (Register)31a, a second buffer 31b, a first Pulse counter (Pulse counter)32a, a second Pulse counter 32b, a Width controller (Width controller)33, and a selection circuit (Width selector) 34. The register 31a stores the first pulse width ta and supplies the pulse width to the pulse counter 32 a. The register 31b stores the second pulse width tb and provides the pulse width to the pulse counter 32 b. The width controller 33 can determine which scan line is currently driven according to the start signal STV and the clock signal CKV, and control the selection circuit 34 according to different scan lines. The selection circuit 34 selects the output enable signal OE of the first pulse counter 32a or the second pulse counter 32b, the first pulse counter 32a outputs the output enable signal OE including the first pulse width ta, and the second pulse counter 32b outputs the output enable signal OE including the second pulse width tb. The start signal STV, the clock signal CKV, and the output enable signal OE are output to the gate circuit 40, and the gate circuit 40 outputs the scan signals to the scan lines Ga, Ga +1, Gb +1 according to the level change of the output enable signal OE each time. It should be noted that, in the present invention, the gate circuit 40 may be a gate driver IC (gate driver IC) or a gate driver circuit directly fabricated in a display panel (not shown) of the display device 1. It should be noted that, in this embodiment, the scanning lines Ga, Ga +1 can be regarded as a first group of scanning lines, and the scanning lines Gb, Gb +1 are a second group of scanning lines, the number of pixels coupled to any one of the scanning lines Ga, Ga +1 of the first group is smaller than the number of pixels coupled to any one of the scanning lines Gb, Gb +1 of the second group, and the scanning signals output to the first group of scanning lines Ga, Ga +1 correspond to the first pulse width ta, and the scanning signals output to the second group of scanning lines Gb, Gb +1 correspond to the second pulse width tb.

The present embodiment is provided to illustrate the technical features of the present invention by using two sets of scan lines, but the present embodiment is not limited thereto. In some embodiments, the number of groups of scan lines, and the number of scan lines in each group, may be adjusted by the designer according to actual product requirements, and the number of scan lines in each group may be the same or different.

In this embodiment, the signal control circuit 30 outputs the output enable signal OE having the first pulse width ta to enable the scan signal for the first group of the scan lines Ga, Ga +1, and the signal control circuit 30 outputs the output enable signal OE having the second pulse width tb to enable the scan signal for the second group of the scan lines Gb, Gb + 1. Since the first pulse width Ta is larger than the second pulse width Tb, the second group of scanning lines Gb, Gb +1 can obtain a longer on-time (corresponding to a wider scanning signal width W2), and further the high potential widths Tb, Tb +1 of the scanning lines Gb, Gb +1 in the second group are increased to be close to the high potential widths Ta, Ta +1 of the scanning lines Ga, Ga +1 in the first group. Therefore, the problem that the display quality of the non-rectangular display device 1 is inconsistent due to inconsistent length of the scanning line is solved.

Fig. 5 is a flowchart of the scan line driver circuit of fig. 3 for changing the pulse width of the output enable signal. First, the setting width controller 33 sets the nth scanning line as the boundary for switching the pulse width of the output enable signal OE, and the pulse width of the output enable signal OE is default to ta in step S11. In step S12, the width controller 33 counts whether the current number of scan lines is greater than n according to the start signal STV and the clock signal CKV, and when the number of scan lines is less than or equal to n, the pulse width of the output enable signal OE corresponding to the scan line is still ta, and then the process proceeds to step S13. In step S13, the width controller 33 adds 1 to the counted number of scan lines according to the start signal STV and the clock signal CKV, and then returns to step S12 to determine whether the current number of scan lines is greater than n. When the number of scanning lines is greater than n, the process proceeds to step S14. In step S14, the width controller 33 controls the selection circuit 34 to select the output enable signal OE for outputting the pulse width tb, and then returns to step S13. Steps S12 through S14 are repeated until all the scan lines have the corresponding output enable signal OE generated. The above pulse width control flowchart of the output enable signal OE for driving a whole frame (frame) of the non-rectangular display device 1 must start from step S11 again when entering the next frame.

According to the above-described embodiment, the problem of picture quality unevenness of the non-rectangular display device 1 can be improved. It should be noted that the embodiments shown in fig. 3 to 5 only divide the scan lines of the non-rectangular display device 1 into two groups, but may also be divided into more scan line groups, and even in some embodiments, each scan line has a different output enable signal OE. Hereinafter, an example when the number of scan line groups is greater than 2 groups will be simply described.

FIG. 6 is a schematic block diagram of a scan line driving circuit according to another embodiment of the present invention. Fig. 7 is a diagram showing signal waveforms when a non-rectangular display device is driven with the scanning line driving circuit of fig. 6. In the present embodiment, the scan line driver circuit includes a signal control circuit 30' and a gate circuit 40. The gate circuit 40 is connected to the scanning lines Ga, Gb, Gc, Gd each located in a different group. The signal control circuit 30' includes

n registers

31a, 31b, … 31n, n pulse counters 32a, 32b, …, 32n, a width controller 33, and a selection circuit 34. The

registers

31a, 31b, … 31n store the pulse widths ta, tb, tc, …, tn of the output enable signal OE, respectively, and provide the pulse widths to the pulse counters 32a, 32b, …, 32n, respectively. The width controller 33 can determine which scan line is currently driven according to the start signal STV and the clock signal CKV, and control the selection circuit 34 according to different scan lines, and the selection circuit 34 selects one of the output pulse counters 32a, 32b, …, and 32n to output the enable signal OE. The start signal STV, the clock signal CKV, and the output enable signal OE are output to the gate circuit 40, and the gate circuit 40 outputs the scan signals to the scan lines Ga, Gb, Gc, Gd according to the level change of the output enable signal OE each time.

In the present embodiment, the display area 10 of the non-rectangular display device 1 is divided into n areas, and the signal control circuit 30' outputs the output enable signal OE containing different pulse widths ta, tb, tc, … tn for the scanning lines Ga, Gb, Gc, Gd respectively located in the respective areas to enable the scanning signals. In this embodiment, the RC load Ga < Gb < Gc < Gd of each scan line, and the pulse width Ta > Tb > Tc > tn of the output enable signal OE, therefore, the scan signal width Wa < Wb < Wc < Wn of each scan line Ga, Gb, Gc, Gd, that is, the scan line with the larger RC load can obtain a longer on-time, so that the high potential widths Ta, Tb, Tc, Td of the scan lines Ga, Gb, Gc, Gd are close to each other. In this way, by dividing the scan lines into a plurality of groups and providing the output enable signal OE pulse width for each group, the problem of inconsistent display quality of the non-rectangular display device 1 can be improved.

Fig. 8 is a flowchart of the scan line driver circuit in fig. 6 for changing the pulse width of the output enable signal OE. The 1 st to x th scanning lines are divided into a first group, the x +1 th to y th scanning lines are divided into a second group, the y +1 th to z th scanning lines are divided into a third group, and the q th to the last scanning lines are divided into an nth group. First, the width controller 33 is set such that the x, y, z, …, and q (q > z > y > x) th scanning lines are defined as boundaries for switching the pulse width of the output enable signal OE, and in step S21, the pulse width of the output enable signal OE is default to ta. In step S22, the width controller 33 counts whether the current scan line number is greater than x and less than or equal to y (x < the number of scan lines counted ≦ y) according to the start signal STV and the clock signal CKV. If the judgment formula in step S22 is not satisfied, the process proceeds to step S23. Step S23 further determines whether the number of scan lines counted at present is greater than y and less than or equal to z (y < the number of scan lines counted ≦ z), and proceeds to the step of the decision formula of the next interval if the decision formula of step S23 is not met. If the number of scan lines does not meet each decision formula, the process proceeds to step S24. If the counted number of scan lines does not satisfy the determination formula of step S24, it is determined that the scan line belongs to the first group (the pulse width of the output enable signal OE corresponding to the first group of scan lines is ta), and the process proceeds to step S25. According to the flow from step S22 to step S24, the grouping group corresponding to each scan line can be determined. When the number of scanning lines matches the judgment formula of step S22 (the number of counted scanning lines is greater than x and less than or equal to y), the process proceeds to step S26. In step S26, the width controller 33 controls the selection circuit 34 to select the output enable signal OE for outputting the pulse width tb, and then returns to step S25. Similarly, when the number of the coincidence scan lines coincides with the judgment formula of step S23, the flow proceeds to step S27. In step S27, the width controller 33 controls the selection circuit 34 to select the output enable signal OE for outputting the pulse width tc, and then returns to step S25. If the number of the matching scan lines matches the judgment formula of step S24, the process proceeds to step S28. In step S28, the width controller 33 controls the selection circuit 34 to select the output enable signal OE for outputting the pulse width tn, and then returns to step S25. In step S25, the width controller 33 increments the number of scan lines by 1 according to the start signal STV and the clock signal CKV, and then returns to step S22 to determine which group the current number of scan lines belongs to.

In this embodiment, the steps S22 to S28 are repeated until all the scan lines have the corresponding output enable signals OE generated. The above pulse width control flowchart of the output enable signal OE for driving a whole frame (frame) from top to bottom for the non-rectangular display device 1 has to start from step S21 again when entering the next frame.

Although the foregoing has described possible embodiments of the present invention, various modifications can be made to the present invention in the technical concept of outputting the output enable signals with different pulse widths corresponding to the scan lines with different lengths. For example, when the signal control circuit can write the corresponding pulse width into the buffer in real time in response to the clock signal, so that the buffer can alternately output different pulse widths of the output enable signal, the signal control circuit of the present invention also includes an embodiment using a single buffer in combination with a single pulse counter or a plurality of pulse counters. In other embodiments, when the signal control circuit can have a plurality of registers for storing different pulse widths of the output enable signal, but one of the output enable signals is selected by the selection circuit to be output to the single pulse counter, the output enable signal can be output to the gate circuit by the same pulse counter.

The display device of the present invention may be, for example, a liquid crystal display (LCD display), an organic light emitting diode display (OLED display), a quantum dot light emitting diode display (QLED display or QD-LED display), a submillimeter light emitting diode display (mini-LED display), a micro-LED display, or the like. The display of the present invention can be applied to various electronic devices such as televisions, electronic billboards, smart phones, tablet computers, and the like.

The above-described features may be combined, modified, replaced, or transposed with respect to one or more disclosed embodiments in any suitable manner, and are not limited to a particular embodiment.

While the present invention has been described with reference to various embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. Therefore, the above embodiments are not intended to limit the scope of the present invention, which is defined by the claims appended hereto.

Although the present invention has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A display device characterized by comprising:

a first scan line coupled to a first number of the plurality of pixels;

a second scan line coupled to a second number of the plurality of pixels;

a signal control circuit for outputting a first output start signal and a second output start signal; and

a gate circuit coupled to the first scan line and the second scan line, and generating a first scan signal to the first scan line according to the first output enable signal, and generating a second scan signal to the second scan line according to the second output enable signal, wherein the first number is smaller than the second number, and a first pulse width of the first output enable signal is greater than a second pulse width of the second output enable signal.

2. The display device of claim 1, wherein the signal control circuit comprises a first buffer and a second buffer, wherein the first buffer outputs the first pulse width and the second buffer outputs the second pulse width.

3. The display device of claim 1, wherein the signal control circuit comprises a first pulse counter and a second pulse counter, wherein the first pulse counter receives the first pulse width and outputs the first output enable signal, and the second pulse counter receives the second pulse width and outputs the second output enable signal.

4. The display device of claim 1, further comprising: a width controller and a selection circuit are electrically connected with the width controller.

5. The display apparatus of claim 1, wherein the signal control circuit comprises a buffer, wherein the buffer alternately outputs the first pulse width of the first output enable signal or the second pulse width of the second output enable signal according to a clock signal.

6. The display apparatus according to claim 1, wherein a width of the second scan signal corresponding to the second scan line is greater than a width of the first scan signal corresponding to the first scan line.

7. The display device of claim 1, wherein the signal control circuit comprises a pulse counter, wherein the pulse counter alternately outputs the first output enable signal or the second output enable signal to the gate circuit according to the first pulse width or the second pulse width.

8. The display device of claim 1, further comprising a third scan line coupled to a third number of the plurality of pixels, wherein the third number is greater than the second number, and a third pulse width of a third output enable signal corresponding to the third scan line is less than the second pulse width of the second output enable signal.

9. A display device characterized by comprising:

a first set of scan lines;

a second group of scanning lines;

a gate circuit coupled to the first group of scan lines and the second group of scan lines, for generating a first scan signal to the first group of scan lines according to the first output enable signal, generating a second scan signal to the second group of scan lines according to the second output enable signal,

the number of pixels coupled to any one of the first group of scanning lines is less than the number of pixels coupled to any one of the second group of scanning lines, and a first pulse width of the first output enable signal is greater than a second pulse width of the second output enable signal.

10. The display device of claim 9, wherein the signal control circuit comprises a buffer and a pulse counter.