CN111697940A - Low-loss double-frequency negative group delay circuit and design method - Google Patents

Low-loss double-frequency negative group delay circuit and design method Download PDF

Info

Publication number
CN111697940A
CN111697940A CN202010455343.2A CN202010455343A CN111697940A CN 111697940 A CN111697940 A CN 111697940A CN 202010455343 A CN202010455343 A CN 202010455343A CN 111697940 A CN111697940 A CN 111697940A
Authority
CN
China
Prior art keywords
group delay
delay circuit
negative group
circuit
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010455343.2A
Other languages
Chinese (zh)
Other versions
CN111697940B (en
Inventor
万发雨
吴丽丽
李宁东
布莱斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing University of Information Science and Technology
Original Assignee
Nanjing University of Information Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing University of Information Science and Technology filed Critical Nanjing University of Information Science and Technology
Priority to CN202010455343.2A priority Critical patent/CN111697940B/en
Publication of CN111697940A publication Critical patent/CN111697940A/en
Application granted granted Critical
Publication of CN111697940B publication Critical patent/CN111697940B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/30Time-delay networks
    • H03H7/32Time-delay networks with lumped inductance and capacitance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • H01P3/081Microstriplines
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

The invention discloses a low-loss double-frequency negative group delay circuit and a design method thereof. The center frequency points realized by the structure are respectively 1.9GHz and 2.55GHz, the actually measured reflection coefficient S11 is lower than-10 dB, and the loss S21 is better than-3 dB. The invention can generate double frequency points and keep low attenuation, realizes the miniaturization of a negative group delay circuit, reduces the loss and reflection of the circuit, improves the group delay bandwidth and delay, and can be used in an antenna array to eliminate beam tilt.

Description

Low-loss double-frequency negative group delay circuit and design method
Technical Field
The invention belongs to the field of microwave engineering, and particularly relates to a low-loss double-frequency negative group delay circuit and a design method thereof.
Background
Negative Group Delay (NGD) networks have attracted considerable attention in recent years due to their practical and potential use in various microwave systems. In phased array antenna systems, they are used to shorten or eliminate the delay line, improve the efficiency of feed forward linear amplifiers, and minimize beam squint of the array antenna. It is worth noting that most NGD microwave circuits are built on lumped RLC networks, and there are problems of parasitic parametric effects of lumped elements at radio and microwave frequencies.
Disclosure of Invention
The purpose of the invention is as follows: the first purpose of the invention is to provide a low-loss double-frequency negative group delay circuit which can reduce the loss and reflection of an NGD circuit, improve the group delay bandwidth and delay and realize multiple frequency points; the second objective of the present invention is to provide a low-loss double-frequency negative group delay circuit design method for optimizing the circuit.
The technical scheme is as follows: the microstrip antenna comprises a coupling microstrip line and a plurality of microstrip transmission lines, wherein a port 1 of the coupling microstrip line is an input port, a port 2 of the coupling microstrip line is an output port, a first microstrip transmission line is connected between a port 3 and a port 4 of the coupling microstrip line, a second microstrip transmission line is connected between a port 5 and a port 6 of the coupling microstrip line, and a third microstrip transmission line is connected between a port 7 and a port 8 of the coupling microstrip line.
The length of the first microstrip transmission line is smaller than that of the second microstrip transmission line, and the second microstrip transmission line and the third microstrip transmission line are the same in size.
The second microstrip transmission line and the third microstrip transmission line are semicircular in structure.
The circuit structure of the negative group delay circuit is a symmetrical structure.
The negative group delay circuit adopts FR4 board, the thickness of the board is 1.6mm, the size is 61mm multiplied by 98mm, the dielectric constant is 4.4, the tangent loss angle is 0.02, and the copper thickness is 0.035 mm.
The invention also comprises a design method of the low-loss double-frequency negative group delay circuit, which comprises the following steps:
(1) simulating and designing and optimizing various parameters of the coupling microstrip line and the plurality of microstrip transmission lines in the negative group delay circuit by using ADS simulation software to obtain the size of each electromagnetic parameter of the negative group delay circuit;
(2) and carrying out real object processing according to the optimized negative group delay circuit.
In the step (1), the negative group delay circuit realizes double frequency in the L frequency band and the S frequency band; when the central frequency is 1.9GHz, the measured group delay of the circuit is about-0.95 ns, and electricityMeasured loss S of road21About-2.05 dB, the measured reflection S of the circuit11Is-13.4 dB; when the central frequency is 2.55GHz, the actual group delay of the circuit is about-1.1 ns, and the actual loss S of the circuit21About-2.4 dB, the measured reflection S of the circuit11Is-15.2 dB.
Has the advantages that: compared with the prior art, the invention has the beneficial effects that: (1) the miniaturization of the NGD circuit is realized; (2) the loss and reflection of the circuit are reduced, the group delay bandwidth and the delay are improved, and the multi-frequency point negative group delay circuit is realized; (3) the double-frequency point can be generated, and low attenuation can be kept; (4) the problem of beam tilt in antenna arrays can be eliminated.
Drawings
FIG. 1 is a schematic diagram of a negative group delay circuit according to the present invention;
FIG. 2 is a circuit schematic of the negative group delay circuit of the present invention;
FIG. 3 is a circuit diagram of a negative group delay circuit according to the present invention;
FIG. 4 is a diagram illustrating a simulation result of the group delay of the negative group delay circuit according to the present invention;
FIG. 5 is S of the design method of negative group delay circuit according to the present invention21A simulation result schematic diagram;
FIG. 6 is S of the negative group delay circuit design method of the present invention11And (5) a simulation result schematic diagram.
Detailed Description
The invention is described in further detail below with reference to specific embodiments and the attached drawings.
As shown in fig. 1 to fig. 3, the microstrip transmission line structure of the present invention includes two identical coupling microstrip lines CL and a plurality of microstrip transmission lines TL, where a port 1 of the coupling microstrip line CL is an input port, a port 2 of the coupling microstrip line CL is an output port, a first microstrip transmission line TL1 is connected between a port 3 and a port 4 of the coupling microstrip line CL, a second microstrip transmission line TL2 is connected between a port 5 and a port 6 of the coupling microstrip line, and a third microstrip transmission line TL3 is connected between a port 7 and a port 8 of the coupling microstrip line. The coupling microstrip line CL is connected between the port 1 and the port 3, the coupling microstrip line CL is also connected between the port 4 and the port 2, and the double-frequency negative group delay circuit can be realized through the circuit structure. In this embodiment, the length of the first microstrip transmission line is smaller than that of the second microstrip transmission line, and the second microstrip transmission line and the third microstrip transmission line have the same size. The structure of the second microstrip transmission line and the structure of the third microstrip transmission line are both semicircular.
As shown in fig. 4, the circuit structure of the negative group delay circuit is a symmetric structure; the negative group delay circuit adopts FR4 board with thickness of 1.6mm, size of 61mm × 98mm, dielectric constant of 4.4, tangent loss angle of 0.02 and copper thickness of 0.035 mm.
The invention also comprises a design method of the low-loss double-frequency negative group delay circuit, which comprises the following steps:
(1) simulating and designing and optimizing various parameters of the coupling microstrip line and the plurality of microstrip transmission lines in the negative group delay circuit by using ADS simulation software to obtain the size of each electromagnetic parameter of the negative group delay circuit;
(2) and carrying out real object processing according to the optimized negative group delay circuit.
As shown in fig. 1 and 4, the circuit structure of the negative group delay circuit is a symmetric structure, and the optimization result of the ADS simulation software on the NGD circuit size is shown in the following table:
TABLE 1 NGD Circuit fundamental parameter dimensions
Figure BDA0002509144810000031
As shown in fig. 4 to 6, the negative group delay circuit of the present invention is a dual-frequency negative group delay circuit, and the negative group delay circuit realizes dual-frequency in the L-band and the S-band; when the central frequency is 1.9GHz, the actually measured group delay of the circuit is about-0.95 ns, and the actually measured loss S of the circuit21About-2.05 dB, the measured reflection S of the circuit11Is-13.4 dB; when the central frequency is 2.55GHz, the actual measurement group delay of the circuit is about-1.1 ns, and the actual measurement loss S of the circuit21About-2.4 dB, the measured reflection S of the circuit11Is-15.2 dB. From the simulation and the actual mapping, the second center frequency of the negative group delay circuit is simulatedThere is a true to measured deviation that can be related to machining errors of the sheet material and to deviations of the dielectric constant of the sheet material from the nominal value.

Claims (7)

1. A low-loss double-frequency negative group delay circuit is characterized in that: the microstrip line coupling structure comprises a coupling microstrip line and a plurality of microstrip transmission lines, wherein a port 1 of the coupling microstrip line is an input port, a port 2 of the coupling microstrip line is an output port, a first microstrip transmission line is connected between a port 3 and a port 4 of the coupling microstrip line, a second microstrip transmission line is connected between a port 5 and a port 6 of the coupling microstrip line, and a third microstrip transmission line is connected between a port 7 and a port 8 of the coupling microstrip line.
2. The low loss, dual frequency, negative group delay circuit of claim 1, wherein: the length of the first microstrip transmission line is smaller than that of the second microstrip transmission line, and the second microstrip transmission line and the third microstrip transmission line are the same in size.
3. The low loss, dual frequency, negative group delay circuit of claim 1, wherein: the second microstrip transmission line and the third microstrip transmission line are semicircular in structure.
4. The low loss, dual frequency, negative group delay circuit of claim 1, wherein: the circuit structure of the negative group delay circuit is a symmetrical structure.
5. The low loss, dual frequency, negative group delay circuit of claim 1, wherein: the negative group delay circuit adopts FR4 board, the thickness of the board is 1.6mm, the size is 61mm multiplied by 98mm, the dielectric constant is 4.4, the tangent loss angle is 0.02, and the copper thickness is 0.035 mm.
6. A method for designing a low loss dual frequency negative group delay circuit as claimed in claim 1, comprising the steps of:
(1) simulating and designing and optimizing various parameters of the coupling microstrip line and the plurality of microstrip transmission lines in the negative group delay circuit by using ADS simulation software to obtain the size of each electromagnetic parameter of the negative group delay circuit;
(2) and carrying out real object processing according to the optimized negative group delay circuit.
7. The design method of the low-loss dual-band negative group delay circuit of claim 6, wherein: in the step (1), the negative group delay circuit realizes double frequency in the L frequency band and the S frequency band; when the central frequency is 1.9GHz, the actually measured group delay of the circuit is about-0.95 ns, and the actually measured loss S of the circuit21About-2.05 dB, the measured reflection S of the circuit11Is-13.4 dB; when the central frequency is 2.55GHz, the actually measured group delay of the circuit is about-1.1 ns, and the actually measured loss S of the circuit21About-2.4 dB, the measured reflection S of the circuit11Is-15.2 dB.
CN202010455343.2A 2020-05-26 2020-05-26 Low-loss double-frequency negative group delay circuit and design method Active CN111697940B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010455343.2A CN111697940B (en) 2020-05-26 2020-05-26 Low-loss double-frequency negative group delay circuit and design method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010455343.2A CN111697940B (en) 2020-05-26 2020-05-26 Low-loss double-frequency negative group delay circuit and design method

Publications (2)

Publication Number Publication Date
CN111697940A true CN111697940A (en) 2020-09-22
CN111697940B CN111697940B (en) 2023-08-22

Family

ID=72478315

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010455343.2A Active CN111697940B (en) 2020-05-26 2020-05-26 Low-loss double-frequency negative group delay circuit and design method

Country Status (1)

Country Link
CN (1) CN111697940B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113328253A (en) * 2021-05-19 2021-08-31 大连海事大学 double-L-shaped negative group time delay microwave circuit based on asymmetric coplanar strip line
CN114500196A (en) * 2022-01-12 2022-05-13 大连海事大学 Balanced type double-frequency differential negative group time delay microwave circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110266284A (en) * 2019-06-27 2019-09-20 大连海事大学 The negative group delay microwave circuit of double frequency with low signal attenuation and optional frequency ratio

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110266284A (en) * 2019-06-27 2019-09-20 大连海事大学 The negative group delay microwave circuit of double frequency with low signal attenuation and optional frequency ratio

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
XIANG ZHOU等: "Analytical Design of Dual-Band Negative Group Delay Circuit With Multi-Coupled Lines" *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113328253A (en) * 2021-05-19 2021-08-31 大连海事大学 double-L-shaped negative group time delay microwave circuit based on asymmetric coplanar strip line
CN113328253B (en) * 2021-05-19 2022-07-12 大连海事大学 double-L-shaped negative group time delay microwave circuit based on asymmetric coplanar strip line
CN114500196A (en) * 2022-01-12 2022-05-13 大连海事大学 Balanced type double-frequency differential negative group time delay microwave circuit
CN114500196B (en) * 2022-01-12 2023-09-15 大连海事大学 Balanced double-frequency differential negative group delay microwave circuit

Also Published As

Publication number Publication date
CN111697940B (en) 2023-08-22

Similar Documents

Publication Publication Date Title
CN106911011B (en) Array antenna structure and design method
CN108511924B (en) Broadband end-fire antenna array for millimeter wave communication system
CN108550987B (en) Dual-frenquency gap array antenna based on SIW
US20040257168A1 (en) Coupling device
CN111697940B (en) Low-loss double-frequency negative group delay circuit and design method
Fante et al. Broadband microstrip patch antenna at 28 GHz for 5G wireless applications
CN112382856B (en) Low-cost broadband millimeter wave array antenna
CN110739518A (en) ultra-wideband multi-path microwave power divider
CN111916891A (en) Antenna structure
US7443266B2 (en) Variable power coupling device
CN112906188B (en) Optimal design method for shape of curved slot decoupling structure of array antenna
CN111697350B (en) Broadband SIW slot antenna based on 77GHz balanced symmetrical formula feed
CN115458892B (en) Four-way in-phase unequal power divider based on circular SIW resonant cavity
CN114498011B (en) High-performance microstrip array antenna
CN117154400A (en) Broadband vertical polarization plane end-fire antenna based on artificial surface plasmon
CN114284712B (en) Broadband high-gain plane end-fire antenna based on artificial surface plasmon
CN116191041A (en) Terahertz photon crystal slow wave horn antenna
CN107968261B (en) Multi-band antenna based on planar monopole and substrate integrated waveguide slotting
CN111029780B (en) Leaky-wave antenna periodic unit and leaky-wave antenna
CN209804867U (en) ware is divided to W wave band SIW merit
CN113488769A (en) Parallel plate waveguide power divider and CTS antenna
CN105071046A (en) Substrate integrated waveguide-based loaded type Ka-band horn antenna
CN111934638A (en) IC-shaped low-loss negative group delay circuit based on coupling microstrip line and implementation method
CN113764846A (en) Electronic product and forming method thereof
CN110707407A (en) High-power distribution ratio Gysel power distributor based on phase inverter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant