CN111682786A - Improved control method of cascaded PWM rectifier - Google Patents

Improved control method of cascaded PWM rectifier Download PDF

Info

Publication number
CN111682786A
CN111682786A CN202010416174.1A CN202010416174A CN111682786A CN 111682786 A CN111682786 A CN 111682786A CN 202010416174 A CN202010416174 A CN 202010416174A CN 111682786 A CN111682786 A CN 111682786A
Authority
CN
China
Prior art keywords
pwm rectifier
current
axis
voltage
cascade
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010416174.1A
Other languages
Chinese (zh)
Inventor
吴宗异
邹海荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Dianji University
Original Assignee
Shanghai Dianji University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Dianji University filed Critical Shanghai Dianji University
Priority to CN202010416174.1A priority Critical patent/CN111682786A/en
Publication of CN111682786A publication Critical patent/CN111682786A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007—Plural converter units in cascade

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The invention relates to a control method of an improved cascade PWM rectifier, which comprises the following steps: 1: establishing a corresponding mathematical model under a synchronous rotating shaft d-q coordinate system aiming at the cascade PWM rectifier; 2: aiming at a corresponding mathematical model, adopting double closed-loop control consisting of an improved deadbeat current inner loop and a PI voltage outer loop to obtain an improved deadbeat control system model; 3; obtaining a corresponding current prediction model and a corresponding performance function based on an improved dead beat control system model; 4: considering the time delay in the operation of the rectifier, solving the current values of the future 2 sampling moments; 5: optimizing and solving by utilizing a performance function based on the current values at the future 2 sampling moments obtained by solving to obtain the optimal increment of the output voltage of the cascade PWM rectifier; 6: and applying the obtained optimal increment result to a cascade PWM rectifier for control. Compared with the prior art, the invention has the advantages of good dynamic performance, high response speed and the like.

Description

Improved control method of cascaded PWM rectifier
Technical Field
The invention relates to the technical field of power electronics, in particular to a control method of an improved cascade PWM rectifier.
Background
In recent years, the PWM rectifier has been widely used in the fields of electric transmission and power conversion, etc. due to its characteristics of high efficiency, small volume and high reliability, and having the characteristics of bidirectional energy flow, reducing network-measured harmonic waves, and realizing single power factor operation. With the rapid development of the digital signal processor, a good hardware foundation is laid for improving the control performance and expanding the application field of the PWM rectifier, so that a plurality of high-performance controls and nonlinear intelligent controls are widely popularized in the PWM rectifier.
In practical applications, however, the performance of the PWM rectifier may be affected by various uncertain external disturbances, especially when the load changes, which may cause a large impact on the output of the rectifier.
Disclosure of Invention
The present invention is directed to overcoming the above-mentioned drawbacks of the prior art and providing an improved control method for a cascaded PWM rectifier.
The purpose of the invention can be realized by the following technical scheme:
an improved control method of a cascaded PWM rectifier, the method comprising the steps of:
step 1: establishing a corresponding mathematical model under a synchronous rotating shaft d-q coordinate system aiming at the cascade PWM rectifier;
step 2: aiming at a corresponding mathematical model under a synchronous rotating shaft d-q coordinate system, adopting double closed-loop control formed by an improved deadbeat current inner loop and a PI voltage outer loop to obtain an improved deadbeat control system model of the cascade PWM rectifier;
step 3; improving a dead-beat control system model based on a cascade PWM rectifier to obtain a corresponding current prediction model and a corresponding performance function;
and 4, step 4: considering the time delay in the operation of the rectifier, solving current values of 2 future sampling moments based on a current prediction model;
and 5: performing optimal solution on the basis of the current values of the future 2 sampling moments obtained by solution by utilizing a performance function to obtain the optimal increment of the output voltage of the cascade PWM rectifier;
step 6: and (5) applying the optimal increment result obtained in the step (5) to a cascade PWM rectifier to improve the control effect.
Further, the circuit equation of the cascade PWM rectifier in step 1 is described as follows:
uan＝ua1b1+ua2b2+…+uanbn
Figure BDA0002495159680000021
Figure BDA0002495159680000022
in the formula uanIs the input side voltage of a cascaded PWM rectifier1,…,uk,…,unFor the input side voltage, U, of each single-phase PWM rectifier in a cascade-type PWM rectifierC1,…,UCk,…,UCnIs the output side voltage u of each single-phase PWM rectifier in the cascade type PWM rectifiersAnd isRespectively, single-phase network side voltage and network side current, RsAnd LsRespectively, the net side equivalent resistance and the inductance.
Further, the switching function of the cascaded PWM rectifier in step 1 is described by the following formula:
Figure BDA0002495159680000023
in the formula, SkAs a function of switching, Sk1、Sk2、Sk3、Sk4In the cascade type PWM rectifier, k is 1,2,3, …, n corresponding to the on/off state of each switching tube in the rectifier.
Further, the current prediction model in step 3 is described by the formula:
Figure BDA0002495159680000024
in the formula isd(n +1) and isq(n +1) is the d and q axis network side current values at the time n +1, TsIs a sampling period, isd(n) and isq(n) d and q-axis grid-side current values at n-time, usd(n) and usq(n) are respectively the grid side voltage values of d and q axes at the time nabd(n) and uabq(n) d and q axis AC output voltages at n times, Δ uabd(n) and. DELTA.uabqAnd (n) is the increment of the alternating current output voltage of the d axis and the q axis at the time n.
Further, the performance function in step 3 is described by the following formula:
Figure BDA0002495159680000031
wherein, J (k)sAs a function of performance, n1、n2、λ1、λ2Respectively representing the weights of d-axis current error, q-axis current error, d-axis control voltage variation and q-axis control voltage variation in the performance function,
Figure BDA0002495159680000032
and
Figure BDA0002495159680000033
respectively as d and q axis network side current reference or given values at the moment of n +1,
Figure BDA0002495159680000034
and
Figure BDA0002495159680000035
and d and q-axis network side current predicted values at the moment n +1 are respectively obtained.
Further, the optimal increment of the output voltage of the cascaded PWM rectifier in step 5 is described by the following formula:
Figure BDA0002495159680000036
in the formula usd(n +1) and usqAnd (n +1) is the voltage value of the grid side of the n +1 time d and the q axis respectively.
Further, the performance function in step 5 is described by the following formula:
Figure BDA0002495159680000037
in the formula (I), the compound is shown in the specification,
Figure BDA0002495159680000038
and
Figure BDA0002495159680000039
respectively are d-axis network side current reference or given value at n moment and q-axis network side current reference or given value,
Figure BDA00024951596800000310
and
Figure BDA00024951596800000311
and d and q-axis network side current predicted values at the moment n +2 are respectively obtained.
Compared with the prior art, the invention has the following advantages:
(1) according to the technical scheme, a model prediction control strategy based on a difference equation is introduced on the basis of a dead-beat control algorithm by establishing a mathematical model of the cascade PWM rectifier under a synchronous rotating shaft d-q coordinate system, so that the influence of sampling errors in the dead-beat control algorithm on current control is reduced, and the current prediction accuracy is improved.
(2) In the method, the input of the voltage outer ring is the sampling voltage at the direct current side, and the output is the current set value. The current inner loop adopts a dead beat control algorithm based on differential equation model predictive control. The current values at the next two sampling moments are solved, and the performance function is utilized to carry out optimization solution, so that the dynamic performance of the load during sudden change can be effectively improved. The experimental result verifies the proposed current model predictive control, and improves the dynamic performance of the PWM rectifier.
Drawings
FIG. 1 is a topology of a single phase PWM rectifier;
FIG. 2 is a control block diagram of an improved deadbeat control system for a single phase PWM rectifier;
FIG. 3 is a topology of a cascaded PWM rectifier;
FIG. 4 is an approximate equivalent circuit diagram of a cascaded PWM rectifier;
FIG. 5 is a control block diagram of an improved deadbeat control system for a cascaded PWM rectifier;
fig. 6 is a waveform diagram of respective net side voltage and net side current when different control strategies are adopted, wherein fig. 6(a) is a waveform diagram of net side voltage and net side current when a traditional PI current inner loop control strategy is adopted, and fig. 6(b) is a waveform diagram of net side voltage and net side current when an improved deadbeat control strategy is adopted;
FIG. 7 is a waveform diagram of voltage output at the DC side of each of the two different control strategies, wherein FIG. 7(a) is a waveform diagram of voltage output at the DC side of the two different control strategies using a conventional PI current inner loop control strategy, and FIG. 7(b) is a waveform diagram of voltage output at the DC side of the two different control strategies using an improved deadbeat control strategy;
fig. 8 is a waveform diagram of a grid-side voltage and a grid-side current of each of different control strategies when the load is suddenly changed from 20 Ω to 10 Ω within 0.4s, fig. 8(a) is a waveform diagram of a grid-side voltage and a grid-side current when the traditional PI current inner loop control strategy is adopted when the load is suddenly changed from 20 Ω to 10 Ω within 0.4s, and fig. 8(b) is a waveform diagram of a grid-side voltage and a grid-side current when the improved deadbeat control strategy is adopted when the load is suddenly changed from 20 Ω to 10 Ω within 0.4 s;
fig. 9 is a waveform diagram of respective dc side voltage output when different control strategies are adopted after a load has a sudden change, wherein fig. 9(a) is a waveform diagram of the dc side voltage output when a conventional PI current inner loop control strategy is adopted after the load has a sudden change, and fig. 9(b) is a waveform diagram of the dc side voltage output when an improved deadbeat control strategy is adopted after the load has a sudden change.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of the present invention.
The invention aims to improve the current prediction precision, effectively eliminate control delay, improve the response speed of a system and improve the control performance of the system.
The basic technical principle of the method of the invention is as follows:
the invention adopts a cascade PWM rectifier formed by cascading n single-phase PWM rectifiers. Through analysis, the single-phase PWM rectifier and the cascade PWM rectifier have similar equivalent circuits, so that the control of the cascade PWM rectifier can refer to the control mode of the single-phase PWM rectifier and research the control strategy of the single-phase PWM rectifier, an improved dead-beat control strategy is provided, a differential equation is taken as a prediction model, the delay in the operation of the rectifier is considered in a performance function, the current values of 2 sampling moments in the future are solved, the performance function is utilized to carry out optimal solution, and the optimal solution is applied to the cascade PWM rectifier. The improved dead beat control algorithm can effectively eliminate control delay, improve the response speed of the system and improve the control performance of the system.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
As shown in fig. 1, the following equation is given:
Figure BDA0002495159680000051
in order to realize the decoupling control of active and reactive current, a synchronous rotating coordinate system (d-q coordinate system) needs to be constructed. The synchronous rotating coordinate system has phase difference with the two-phase static rectangular coordinate system (-coordinate system).
The transformation matrix between the two coordinate systems is:
Figure BDA0002495159680000052
usα、isαis a network side voltage usAnd net side current isVoltage and current components, u, at axis αsβ、isβVoltage and current components for the β axis, namely:
Figure BDA0002495159680000053
Figure BDA0002495159680000054
in the formula usmAnd ismThe peak value of the grid side voltage and the peak value of the grid side current are respectively obtained by bringing the formulas (3) and (4) into the formula (1)abVoltage component u in d-q coordinate systemabdAnd uabq。
Figure BDA0002495159680000055
Wherein u iss、isThe components in the d-q coordinate system are respectively usd、usqAnd isd、isq。
The system structure block diagram is shown in fig. 2.
In the following, the form, such as x, represents a sampled or actual value,
Figure BDA0002495159680000061
indicates the predicted value, x*Representing a reference value or a given value.
The discretization of the formula (5) can obtain a discrete mathematical model of the single-phase PWM rectifier, which is as follows:
Figure BDA0002495159680000062
Figure BDA0002495159680000063
the incremental prediction model obtained by arranging and changing the formula (7) is as follows:
Figure BDA0002495159680000064
in the formula isd(n +1) and isq(n +1) is the d and q axis network side current values at the time n +1, TsIs a sampling period, isd(n) and isq(n) d and q-axis grid-side current values at n-time, usd(n) and usq(n) are respectively the grid side voltage values of d and q axes at the time nabd(n) and uabq(n) d and q axis AC output voltages at n times, Δ uabd(n) and Δuabqand (n) is the increment of the alternating current output voltage of the d axis and the q axis at the time n.
The performance function is formula (9):
Figure BDA0002495159680000065
wherein, J (k)sAs a function of performance, n1、n2、λ1、λ2Respectively representing the weights of d-axis current error, q-axis current error, d-axis control voltage variation and q-axis control voltage variation in the performance function,
Figure BDA0002495159680000066
and
Figure BDA0002495159680000067
respectively as d and q axis network side current reference or given values at the moment of n +1,
Figure BDA0002495159680000068
and
Figure BDA0002495159680000069
and d and q-axis network side current predicted values at the moment n +1 are respectively obtained.
Through the optimization solution, the optimal increment of the rectifier alternating current output voltage can be obtained as the formula (10):
Figure BDA00024951596800000610
in the formula uabd(n-1) and uabqAnd (n-1) are respectively the d-axis alternating current output voltage and the q-axis alternating current output voltage at the n-1 moment.
Because there is a delay in the sampling period and the prediction control of the model is expected to be that the predicted value of the current at the second sampling time after the current sampling time is as close as possible to the current reference value without an excessive control quantity, the current prediction model is further calculated once forward, the current at the k +2 time is predicted, the current at the k +2 time is used for the performance function, and the formula (9) is rewritten into the formula (11) and the formula (12):
Figure BDA0002495159680000071
in the formula (I), the compound is shown in the specification,
Figure BDA0002495159680000072
and
Figure BDA0002495159680000073
respectively are d-axis network side current reference or given value at n moment and q-axis network side current reference or given value,
Figure BDA0002495159680000074
and
Figure BDA0002495159680000075
and d and q-axis network side current predicted values at the moment n +2 are respectively obtained.
Figure BDA0002495159680000076
In the formula usd(n +1) and usqAnd (n +1) is the voltage value of the grid side of the n +1 time d and the q axis respectively.
The parameters in fig. 3 are defined as:
(1)us、Usmvoltage peak of single-phase network side and network side, is、IsmRespectively the grid side current and the grid side current peak value;
(2)Rs、Lsrespectively, a network-side equivalent resistance and a network-side inductance, C1、C2、…CnA DC side capacitor R for each cascade H-bridge unit1、R2、…RnThe direct current side load of each cascade H bridge unit;
(3)u1、u2、…unfor the alternating voltage, U, at the input side of each cascaded H-bridge unitC1、UC2、…UC1For the DC component of the voltage at the output side of each cascaded H-bridge unit, U* CAnd each cascade H-bridge unit outputs a given value of the direct current output voltage.
At steady state, UC1＝UC2＝…＝UCn＝U* CThe output side of each cascade H-bridge unit has three voltage states, U* C、0、-U* C. The on-states of the upper and lower switching devices of each bridge arm of each cascade H-bridge unit are complementary, taking the first H-bridge unit as an example, when S is11And S14On opening, u1＝U* C(ii) a When S is12And S13On opening, u1＝-U* C(ii) a When S is11And S13Is turned on, or when S12And S14On opening, u 10. The remaining H-bridge units are similar to the first H-bridge unit. Combining the above analysis, n H-bridge units can generate 2n +1 level combinations through different combinations of switch states.
Defining the switching function equation (13) of the cascaded PWM rectifier:
Figure BDA0002495159680000077
in the formula, SkAs a function of switching, Sk1、Sk2、Sk3、Sk4In the cascade type PWM rectifier, k is 1,2,3, …, n corresponding to the on/off state of each switching tube in the rectifier.
For the k-th path H bridge unit: when the current i on the network sidesIf S is greater than 0k1, charging a direct-current side capacitor of a kth H-bridge unit by the alternating-current side voltage source to increase the voltage of the capacitor; if SkWhen the voltage source on the alternating current side is equal to-1, the capacitor on the direct current side of the kth H-bridge unit is discharged by the voltage source on the alternating current side, so that the voltage of the capacitor is reduced; when the current i on the network sidesBelow 0, the opposite is true. If SkWhen 0, no matter is> 0 or isThe < 0 AC side voltage source has no influence on the DC side capacitance voltage of the kth H-bridge unit.
According to the KCV law, the circuit equations of the cascaded PWM rectifier are formulas (14) to (16):
uan＝ua1b1+ua2b2+…+uanbn
Figure BDA0002495159680000081
Figure BDA0002495159680000082
in the formula uanIs the input side voltage of a cascaded PWM rectifier1,…,uk,…,unFor the input side voltage, U, of each single-phase PWM rectifier in a cascade-type PWM rectifierC1,…,UCk,…,UCnIs the output side voltage u of each single-phase PWM rectifier in the cascade type PWM rectifiersAnd isRespectively, single-phase network side voltage and network side current, RsAnd LsRespectively, the net side equivalent resistance and the inductance.
From equation (16), fig. 4 is an approximate equivalent circuit of the cascaded PWM rectifier: from the equation (13) and FIG. 4, the total voltage u on the AC sideanCan be controlled by controlling the action of a switch and regulating the total voltage u at the AC sideanCan control the network side current isPhase and amplitude of; while passing through control network side current isThe purpose of controlling the output voltage and the input power of the direct current side can be achieved.
From the above analysis, the single-phase PWM rectifier and the cascade PWM rectifier have similar equivalent circuits, so the control of the cascade PWM rectifier can refer to the control method of the single-phase PWM rectifier. In summary, the invention adopts a double closed-loop control mode formed by an improved deadbeat current inner loop and a PI voltage outer loop for the cascade type PWM rectifier, and the closed-loop control mode is as shown in FIG. 5;
because the control of the cascade type PWM rectifier is similar to that of the single-phase PWM rectifier, the single-phase PWM rectifier can be adopted to replace the cascade type PWM rectifier for simulation analysis, and when the load of a certain module of the cascade type PWM rectifier breaks suddenly, the load of the cascade type PWM rectifier can be similar to that of the single-phase PWM rectifier.
In order to verify whether the improved dead-beat control strategy can effectively eliminate control delay and improve the control effects of the response speed and the dynamic and static performances of the system, the invention builds a simulation model based on MATLAB/Simulink and analyzes the simulation result. Table 1 shows the main simulation parameters. Fig. 6(a), 6(b) -9 (a), 9(b) are simulation graphs comparing conventional PI current inner loop control with improved deadbeat control under various conditions.
TABLE 1 simulation parameters for single-phase PWM rectifiers
Figure BDA0002495159680000091
The method provided by the invention can enable the voltage of the power grid to have the same phase and high sine degree, effectively eliminates control delay and improves the response speed and the dynamic and static performances of the system. Taking fig. 6(a) and 6(b) as an example, it can be seen that both control algorithms can make the current and voltage in the same phase, have high waveform sine degree, and can keep operating at the unit power factor. However, when the traditional PI current inner loop control is carried out, a larger impact current exists in the first period, and only a small impact current exists when the improved dead-beat control is adopted, which shows that the system has better system performance when the improved dead-beat control is adopted. Taking fig. 7(a) and 7(b) as an example, the dc side voltage of the system is finally stabilized at 100V, and the time for entering the steady state by using the improved deadbeat control is shorter than the time for using the conventional PI current inner loop control, and there is almost no overshoot, which indicates that the improved deadbeat control has faster response speed and static stability. Taking fig. 8(a) and 8(b) as an example, the grid voltage and the grid current can still be kept in phase, and the operation is performed at the unity power factor. After the load is suddenly changed, the current on the network side changes, and the current on the network side enters a stable state faster when the improved dead-beat control is adopted than when the traditional PI current inner loop control is adopted, which shows that the improved dead-beat control has better dynamic characteristics and fast dynamic response speed. Taking fig. 9(a) and 9(b) as an example, the output voltage of the dc side of both control strategies can be recovered to the given voltage value of 100V after the load suddenly changes. However, compared with the traditional PI current inner loop control, the voltage change amplitude is smaller during adjustment by adopting the improved dead-beat control, and the adjustment time is shorter. The improved dead-beat control can effectively inhibit the fluctuation of the output voltage of the direct current side when the load suddenly changes, and has better dynamic performance.
The invention starts from the topological structure of the single-phase PWM rectifier when improving the system response speed and the dynamic and static performances of the cascade type PWM rectifier, and adopts a dead-beat control algorithm based on the differential equation model predictive control.
The improved dead-beat control strategy provided by the invention is applied to the cascade PWM rectifier, can effectively eliminate control delay, and can improve the response speed and dynamic performance of the system.
The invention is derived theoretically and verified by combining simulation software, and the provided cascaded PWM rectifier control strategy is suitable for the input and design of the power electronic transformer and has important significance on the aspects of improving the stability of a power system, improving the power quality and the like of the power electronic transformer.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (7)

1. An improved control method for a cascaded PWM rectifier, the method comprising the steps of:
step 1: establishing a corresponding mathematical model under a synchronous rotating shaft d-q coordinate system aiming at the cascade PWM rectifier;
step 2: aiming at a corresponding mathematical model under a synchronous rotating shaft d-q coordinate system, adopting double closed-loop control formed by an improved deadbeat current inner loop and a PI voltage outer loop to obtain an improved deadbeat control system model of the cascade PWM rectifier;
step 3; improving a dead-beat control system model based on a cascade PWM rectifier to obtain a corresponding current prediction model and a corresponding performance function;
and 4, step 4: considering the time delay in the operation of the rectifier, solving current values of 2 future sampling moments based on a current prediction model;
and 5: optimizing and solving by utilizing a performance function based on the current values at the future 2 sampling moments obtained by solving to obtain the optimal increment of the output voltage of the cascade PWM rectifier;
step 6: and (5) applying the optimal increment result obtained in the step (5) to a cascade PWM rectifier to improve the control effect.
2. The improved control method of the cascaded PWM rectifier according to claim 1, wherein the circuit equation of the cascaded PWM rectifier in step 1 is described by the following formula:
uan＝ua1b1+ua2b2+…+uanbn
Figure FDA0002495159670000011
Figure FDA0002495159670000012
in the formula uanIs the input side voltage of a cascaded PWM rectifier1,…,uk,…,unFor the input side voltage, U, of each single-phase PWM rectifier in a cascade-type PWM rectifierC1,…,UCk,…,UCnFor the output side voltage, u, of each single-phase PWM rectifier in a cascade-type PWM rectifiersAnd isRespectively, single-phase network side voltage and network side current, RsAnd LsRespectively, the net side equivalent resistance and the inductance.
3. The improved control method of the cascaded PWM rectifier according to claim 1, wherein the switching function of the cascaded PWM rectifier in step 1 is described by the formula:
Figure FDA0002495159670000021
in the formula, SkAs a function of switching, Sk1、Sk2、Sk3、Sk4In the cascade type PWM rectifier, k is 1,2,3, …, n corresponding to the on/off state of each switching tube in the rectifier.
4. The improved control method of the cascaded PWM rectifier according to claim 1, wherein the current prediction model in step 3 is described by the formula:
Figure FDA0002495159670000022
in the formula isd(n +1) and isq(n +1) is the d and q axis network side current values at the time n +1, TsIs a sampling period, isd(n) and isq(n) d and q-axis grid-side current values at n-time, usd(n) and usq(n) are respectively the grid side voltage values of d and q axes at the time nabd(n) and uabq(n) d and q axis AC output voltages at n times, Δ uabd(n) and. DELTA.uabqAnd (n) is the increment of the alternating current output voltage of the d axis and the q axis at the time n.
5. The method as claimed in claim 1, wherein the performance function in step 3 is described by the following formula:
Figure FDA0002495159670000023
wherein, J (k)sAs a function of performance, n1、n2、λ1、λ2Respectively representing the weights of d-axis current error, q-axis current error, d-axis control voltage variation and q-axis control voltage variation in the performance function,
Figure FDA0002495159670000024
and
Figure FDA0002495159670000025
respectively as d and q axis network side current reference or given values at the moment of n +1,
Figure FDA0002495159670000026
and
Figure FDA0002495159670000027
and d and q-axis network side current predicted values at the moment n +1 are respectively obtained.
6. The improved control method of the cascaded PWM rectifier according to claim 1, wherein the optimal increment of the output voltage of the cascaded PWM rectifier in step 5 is described by the formula:
Figure FDA0002495159670000028
in the formula usd(n +1) and usqAnd (n +1) is the voltage value of the grid side of the n +1 time d and the q axis respectively.
7. The method as claimed in claim 1, wherein the performance function in step 5 is described by the following formula:
Figure FDA0002495159670000031
in the formula (I), the compound is shown in the specification,
Figure FDA0002495159670000032
and
Figure FDA0002495159670000033
d-axis and q-axis network side currents at n timeThe reference or given value is,
Figure FDA0002495159670000034
and
Figure FDA0002495159670000035
and d and q-axis network side current predicted values at the moment n +2 are respectively obtained.
CN202010416174.1A 2020-05-17 2020-05-17 Improved control method of cascaded PWM rectifier Pending CN111682786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010416174.1A CN111682786A (en) 2020-05-17 2020-05-17 Improved control method of cascaded PWM rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010416174.1A CN111682786A (en) 2020-05-17 2020-05-17 Improved control method of cascaded PWM rectifier

Publications (1)

Publication Number Publication Date
CN111682786A true CN111682786A (en) 2020-09-18

Family

ID=72451899

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010416174.1A Pending CN111682786A (en) 2020-05-17 2020-05-17 Improved control method of cascaded PWM rectifier

Country Status (1)

Country Link
CN (1) CN111682786A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115118171A (en) * 2022-06-30 2022-09-27 福州大学 Dead-beat control method with time delay compensation for three-phase rectifier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107317490A (en) * 2017-07-03 2017-11-03 三峡大学 A kind of dead beat prediction direct Power Control method based on three-phase Vienna rectifiers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107317490A (en) * 2017-07-03 2017-11-03 三峡大学 A kind of dead beat prediction direct Power Control method based on three-phase Vienna rectifiers

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
吴宗异 等: ""一种改进的级联型PWM整流器控制策略"", 《新一代信息技术》 *
武琳: ""级联型电力电子变压器控制策略"", 《中国博士学位论文全文数据库（电子期刊） 工程科技II辑》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115118171A (en) * 2022-06-30 2022-09-27 福州大学 Dead-beat control method with time delay compensation for three-phase rectifier

Similar Documents

Publication Publication Date Title
Teodorescu et al. Proportional-resonant controllers and filters for grid-connected voltage-source converters
CN110601201B (en) UPFC system based on direct AC-AC converter H-MMC and passive control method thereof
Liang et al. Predictive control of a series-interleaved multicell three-level boost power-factor-correction converter
He et al. Linear active disturbance rejection control for three-phase voltage-source PWM rectifier
CN112653342B (en) Complex vector current loop decoupling control device and method under static coordinate system
CN107565840A (en) The harmonic compensation control method of Cascade H bridge type photovoltaic combining inverter
CN110429603B (en) Six-switch seven-level active power filter and compensation method
CN114785181A (en) Reliable parallel control system and method for efficient bidirectional power conversion modules
CN113285583A (en) Non-isolated photovoltaic inverter leakage current suppression method and system
CN112134478B (en) Neutral point potential balance control method of neutral point clamping three-level inverter based on 60-degree coordinate system
Essoussi et al. Power Quality Improvement using a New DPC Switching Table for a Three-Phase SAPF
CN111697857B (en) MPC control method of single-phase cascade rectifier suitable for direct-current micro-grid
CN111682786A (en) Improved control method of cascaded PWM rectifier
CN111262460B (en) Five-level rectifier sliding mode PIR control method based on coupling inductor
CN112003318A (en) Wind power grid-connected inverter direct-current bus voltage control method
CN113809967B (en) Permanent magnet synchronous motor modulation model prediction control method based on matrix converter
Arazm et al. Model predictive control on grid connected fifteen-level packed U-Cell (PUC15) inverter
CN114336660A (en) UPQC direct current prediction control method based on power angle
Cheng et al. A modified one cycle control of Vienna rectifier for neutral point voltage balancing control based on cycle-by-cycle correction
Talavat et al. Direct predictive control of asynchronous machine torque using matrix converter
He et al. Control strategy of high-performance active rectifier using modular multilevel converter without DC-link voltage sensors
Qiu et al. Cascaded power balancing mechanism based on resonant switched capacitor topology for photovoltaic systems
Li et al. Model predictive control of an inverter in UPS system
Jian et al. Optimal control for AC and DC power quality of VSC-HVDC
CN203219187U (en) Dual-PWM frequency converter with four-switch three-phase rectifier stage and control system thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20200918