CN111669129A - Amplifier chip - Google Patents
Amplifier chip Download PDFInfo
- Publication number
- CN111669129A CN111669129A CN202010504537.7A CN202010504537A CN111669129A CN 111669129 A CN111669129 A CN 111669129A CN 202010504537 A CN202010504537 A CN 202010504537A CN 111669129 A CN111669129 A CN 111669129A
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- Prior art keywords
- pcb
- substrate
- filter
- chip
- amplifier
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- 239000000758 substrate Substances 0.000 claims abstract description 124
- 239000010410 layer Substances 0.000 claims description 69
- 230000005540 biological transmission Effects 0.000 claims description 24
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 20
- 229910052737 gold Inorganic materials 0.000 claims description 20
- 239000010931 gold Substances 0.000 claims description 20
- 239000011229 interlayer Substances 0.000 claims description 11
- 238000001914 filtration Methods 0.000 claims description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 230000010354 integration Effects 0.000 abstract description 22
- 230000000694 effects Effects 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
- H03F3/183—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Multimedia (AREA)
- Amplifiers (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The present invention provides an amplifier chip, including: stacking the integrated first chip and the multi-layer PCB substrate; the first chip is printed with an amplifier circuit, each even-numbered layer of the multilayer PCB substrate is printed with a sub-filter circuit, and the sub-filter circuits printed on each even-numbered layer of the multilayer PCB substrate are connected in series to form a filter circuit; the input end of the amplifier circuit is the input end of the amplifier chip, the output end of the amplifier circuit is connected with the input end of the filter circuit, and the output end of the filter circuit is the output end of the amplifier chip. The amplifier chip provided by the invention has better integration level, and can keep the original integration effect when the number of integration layers is more.
Description
Technical Field
The invention belongs to the technical field of monolithic microwave integrated circuits, and particularly relates to an amplifier chip.
Background
Monolithic Microwave Integrated Circuits (MMICs), chip circuits for short, are microwave circuits in which active and passive components are fabricated on the same semiconductor substrate and are widely used in various circuit systems. The method plays a great role in promoting the miniaturization, high integration, high performance, low cost and other aspects of microwave circuit products. Among various chip circuits, an amplifier chip circuit is a very common circuit, and its main role is to achieve an increase in signal gain. Due to the nonlinear principle of semiconductor devices, harmonic components exist in the amplifier circuit, which has a certain influence on the purity of the output frequency, so in order to suppress harmonic or clutter signal interference, a filter is usually added behind the amplifier circuit to filter out harmonic signals, but this increases the loss and size of the whole amplifier chip circuit.
In the prior art, loss and size of an amplifier chip are usually reduced through three-dimensional integration of chips, but the three-dimensional integration in the prior art is realized on the same material or the same material, each layer of chip is of a single-layer structure, when the number of layers of the three-dimensional integration is large, the integration effect of the three-dimensional integration is reduced, the size cannot be effectively reduced, and the manufacturing cost of the chip is increased.
Therefore, how to improve the integration of the conventional amplifier chip to maintain the original integration effect when the number of integration layers is large is a problem to be solved in the art.
Disclosure of Invention
The invention aims to provide an amplifier chip which has better integration level and can keep the original integration effect when the number of integration layers is large.
To achieve the above object, the present invention provides an amplifier chip, including:
stacking the integrated first chip and the multi-layer PCB substrate;
the first chip is printed with an amplifier circuit, each even-numbered layer of the multilayer PCB substrate is printed with a sub-filter circuit, and the sub-filter circuits printed on each even-numbered layer of the multilayer PCB substrate are connected in series to form a filter circuit;
the input end of the amplifier circuit is the input end of the amplifier chip, the output end of the amplifier circuit is connected with the input end of the filter circuit, and the output end of the filter circuit is the output end of the amplifier chip.
Optionally, the amplifier chip further comprises a plurality of gold bumps; the first chip is also printed with a first signal bonding pad, a second signal bonding pad, a first transmission bonding pad, a second transmission bonding pad, at least one power supply bonding pad and a plurality of interconnection bonding pads;
the first signal bonding pad is connected with the input end of the amplifier circuit and serves as the input end of the amplifier chip; the second transmission bonding pad is connected with the second signal bonding pad and used as an output end of the amplifier chip;
the output end of the amplifier circuit is connected with the first transmission bonding pad, and the first transmission bonding pad is connected with the input end of the filter circuit through the gold bump; the output end of the filter circuit is connected with the second transmission bonding pad through the gold bump;
the power supply pad is connected with a power supply input end of the amplifier circuit and is used for providing an external power supply access port of the amplifier circuit; the interconnection bonding pad is used for being connected with the gold bump and is connected with the non-circuit area on the multilayer PCB substrate through the gold bump.
Optionally, the multilayer PCB substrate includes a PCB bottom substrate, a PCB top substrate, at least one PCB middle substrate, a PCB through hole, at least one first PCB blind hole, and a second PCB blind hole;
the first PCB blind hole is used for connecting the output end of a sub-filter circuit corresponding to a certain PCB middle layer substrate and the input end of the next sub-filter circuit corresponding to the PCB middle layer substrate; the PCB through hole is used for connecting the output end of the sub-filter circuit corresponding to the PCB top substrate and the PCB bottom substrate;
the second PCB blind hole is used for connecting the PCB bottom substrate and the input end of the sub-filter circuit corresponding to the first filter substrate so as to carry out interlayer transmission; the first filter substrate is the PCB middle layer substrate directly connected with the PCB bottom layer substrate.
Optionally, an input end of the sub-filter circuit corresponding to the first filter substrate is an input end of the filter circuit;
and the output end of the sub-filter circuit corresponding to the PCB top substrate is the output end of the filter circuit.
Optionally, the multilayer PCB substrate further comprises a plurality of third PCB blind holes;
the plurality of third PCB blind holes are used for connecting the PCB bottom substrate and the first filtering substrate so as to carry out interlayer grounding.
Optionally, the filter corresponding to the sub-filter circuit printed on the even-numbered substrate includes at least one of a stub filter, a comb line filter, an interdigital coupling filter, and a hairpin filter.
Optionally, the filter corresponding to the sub-filter circuit printed on the even-numbered substrate includes at least one of a low-pass filter and a band-pass filter.
Optionally, no circuit is printed on the odd-numbered substrate for interlayer shielding.
Optionally, the first chip is a gallium arsenide chip, or a silicon-based chip, or a gallium nitride chip, or an indium phosphide chip.
Optionally, the even number layers of the multi-layer PCB substrate are calculated in an order of a bottom layer to a top layer of the multi-layer PCB substrate.
The amplifier chip provided by the invention has the beneficial effects that: compared with a semiconductor chip, the PCB substrate has the performance index equivalent to that of the semiconductor chip, can realize a multilayer structure, and has higher circuit density. Therefore, in the embodiment of the invention, the three-dimensional stacking is realized by the semiconductor chip (namely the first chip) and the PCB substrate, and when the number of layers of the three-dimensional stacking is increased, only the number of layers of the PCB substrate is increased. Compared with the prior art, the amplifier chip provided by the embodiment of the invention has better integration level, and can keep the original integration effect when the number of integration layers is more.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed for the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a perspective cross-sectional view of an amplifier chip according to an embodiment of the invention;
fig. 2 is a schematic diagram of a stack of amplifier chips according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of a first chip according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a PCB top substrate according to an embodiment of the invention;
fig. 5 is a schematic structural diagram of an odd-numbered layer substrate of a PCB according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a first filter substrate according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of a PCB bottom substrate according to an embodiment of the invention.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an amplifier chip according to an embodiment of the invention. The amplifier chip includes: the integrated first chip 10 and the multi-layer PCB substrate 20 are stacked.
The amplifier circuit 11 is printed on the first chip 10, the sub-filter circuits 201 are printed on the even-numbered layers of the multilayer PCB substrate 20, and the sub-filter circuits 201 printed on the even-numbered layers of the substrate are connected in series to form a filter circuit.
In this embodiment, the even layers of the multi-layer PCB substrate 20 are calculated according to the sequence from the bottom layer to the top layer of the multi-layer PCB substrate, that is, the bottom layer of the multi-layer PCB substrate is the first layer, and so on.
In the present embodiment, the sub-filter circuits 201 printed on the even-numbered substrates may be the same or different.
The input end of the amplifier circuit 11 is the input end of the amplifier chip, the output end of the amplifier circuit 11 is connected with the input end of the filter circuit, and the output end of the filter circuit is the output end of the amplifier chip.
In this embodiment, the input terminal of the amplifier circuit 11 serves as the input terminal of the amplifier chip to receive an external signal, the external signal is amplified by the amplifier circuit 11 and then transmitted to the filter circuit by the amplifier circuit 11 for filtering (i.e. transmitted to each sub-filter circuit 201 by the amplifier circuit 11 for filtering), and after the amplified external signal is filtered by the filter circuit, the filtered signal is output through the output terminal of the filter circuit (i.e. the output terminal of the amplifier chip).
In this embodiment, the vertical interconnection of the first chip and the multi-layer PCB substrate may be achieved by using a hot-pressing ultrasonic flip-chip bonding process technique and gold bumps. Preferably, the multilayer PCB substrate may employ a BT resin substrate.
In this embodiment, the frequency of the amplifier chip can be set to be equal to or higher than the band X according to the relationship between the volume of the filter and the operating frequency and wavelength.
Compared with a semiconductor chip, the PCB substrate has the performance index equivalent to that of the semiconductor chip, can realize a multilayer structure, and has higher circuit density. Therefore, in the embodiment of the invention, the three-dimensional stacking is realized by the semiconductor chip (namely the first chip) and the PCB substrate, and when the number of layers of the three-dimensional stacking is increased, only the number of layers of the PCB substrate is increased. Compared with the prior art, the amplifier chip provided by the embodiment of the invention has better integration level, and can keep the original integration effect when the number of integration layers is more. In addition, the filter circuit is designed on the PCB multilayer substrate, so that harmonic waves and clutter in the amplified signal can be effectively filtered, the circuit area of the amplifier chip is not enlarged, and the structure is simple, the cost is low and the circuit performance is good.
Optionally, referring to fig. 1 to fig. 3, as a specific implementation of the amplifier chip provided in the embodiment of the present invention, the amplifier chip further includes a plurality of gold bumps 3. The first chip is further printed with a first signal pad 12, a second signal pad 13, a first transmission pad 14, a second transmission pad 15, at least one power pad 16, and a plurality of interconnection pads 17.
The first signal pad 12 is connected to an input terminal of the amplifier circuit 11 as an input terminal of the amplifier chip. The second transfer pad 15 is connected to the second signal pad 13 as an output terminal of the amplifier chip.
In this embodiment, the first signal pad 12 may be externally connected to a bonding wire for receiving an external signal as an input terminal of the amplifier chip.
In the present embodiment, the second transmission pad 15 is used for connecting to an output terminal of the filter circuit, and therefore, the second signal pad 13 may be connected to the second transmission pad as an output terminal of the amplifier chip to output the amplified-filtered external signal.
The output terminal of the amplifier circuit 11 is connected to the first transmission pad 14, and the first transmission pad 14 is connected to the input terminal of the filter circuit through the gold bump 3. The output terminal of the filter circuit is connected to the second transfer pad 15 through the gold bump 3.
In this embodiment, the amplifier circuit 11 sends the amplified external signal to the filter circuit through the first transmission pad 14 and the gold bump 3, and the filter circuit performs filtering processing on the amplified external signal and outputs the amplified-filtered external signal through the gold bump 3 and the second transmission pad 15. That is, in the present embodiment, the first transfer pad 14 and the second transfer pad 15 each function as signal transmission.
The power pad 16 is connected to a power input terminal of the amplifier circuit 11 for providing an external power access port to the amplifier circuit 11. The interconnection pads 17 are used for connecting with the gold bumps 3, and are connected with the non-circuit area on the multilayer PCB substrate 20 through the gold bumps 3.
In the present embodiment, a plurality of power supply pads 16 may be provided as external power access ports of the amplifier circuit 11.
In the present embodiment, the interconnection pads 17 are used to fix the gold bumps 3 to achieve stack integration of the first chip 10 and the multilayer PCB substrate 20.
Optionally, referring to fig. 1 to 7, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, the multi-layer PCB substrate 20 includes a PCB bottom substrate 41, a PCB top substrate 42, at least one PCB middle substrate 43, a PCB through hole 44, at least one first PCB blind hole 45, and a second PCB blind hole 46.
The first PCB blind hole 45 is used to connect the output terminal of the sub-filter circuit corresponding to a certain PCB middle layer substrate 43 and the input terminal of the next sub-filter circuit corresponding to the PCB middle layer substrate 43. The PCB through hole 44 is used for connecting the output end of the sub-filter circuit corresponding to the PCB top substrate 42 and the PCB bottom substrate 41.
In this embodiment, the sub-filter circuit corresponding to the nth layer of PCB substrate is a sub-filter circuit printed on the layer of PCB, and the next sub-filter circuit corresponding to the nth layer of PCB substrate is a sub-filter circuit printed on the (N + 2) th layer of PCB substrate. Wherein N is an integer not less than 2.
In the present embodiment, the first PCB blind via 45 is used to transmit the amplified external signal from the amplifying circuit 11 to the filter circuit, that is, the first PCB blind via 45 is used to continuously transmit the (amplified) external signal from the nth layer substrate to the (N + 2) th layer substrate until the external signal reaches the PCB top layer substrate.
In the present embodiment, the PCB via 44 is used to transmit the filtered external signal from the output terminal of the sub-filter circuit corresponding to the PCB top substrate 42 to a position on the PCB bottom substrate 41, and the position is connected to the second transmission pad 15 on the first chip 10 through the gold bump 3.
The second PCB blind hole 46 is used for connecting the PCB bottom substrate 41 and the input end of the sub-filter circuit corresponding to the first filter substrate for interlayer transmission. The first filter substrate is a PCB middle substrate directly connected to the PCB bottom substrate 41.
In the present embodiment, the second PCB blind via 46 is used for transmitting the amplified external signal transmitted by the amplifying circuit 11 from the bottom PCB substrate to the first filter substrate.
In this embodiment, the first PCB blind via 45 and the second PCB blind via 46 perform interlayer signal transmission, and the PCB through hole 44 may serve as a signal transmission channel and a ground via.
Optionally, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, an input end of the sub-filter circuit corresponding to the first filter substrate is an input end of the filter circuit.
And the output end of the sub-filter circuit corresponding to the PCB top substrate is the output end of the filter circuit.
Optionally, referring to fig. 1 to fig. 7 (since there are more third PCB blind holes, a detailed position is not shown in fig. 7), as a specific implementation of the amplifier chip provided in the embodiment of the present invention, the multi-layer PCB substrate 20 further includes a plurality of third PCB blind holes 47.
The plurality of third PCB blind holes 47 are used to connect the PCB bottom substrate and the first filter substrate for interlayer grounding.
Optionally, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, the filter corresponding to the sub-filter circuit printed on the even-numbered substrate includes at least one of a stub filter, a comb line filter, an interdigital coupling filter, and a hairpin filter.
In this embodiment, the sub-filter circuits printed on the even-numbered substrate may include various filter forms, which are not limited herein.
In the present embodiment, the distributed filter principle mainly has a quarter-wavelength resonant form and a half-wavelength coupling form, and therefore, a stub filter, a comb line filter, an interdigital filter, a hairpin filter, or the like can be used as the sub-filter circuit.
In this embodiment, referring to fig. 4 and 6, the sub-filter circuit printed on the PCB middle substrate may be in the form of a stripline filter, and the sub-filter circuit printed on the PCB top substrate may be in the form of a microstrip line.
Optionally, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, the filter corresponding to the sub-filter circuit printed on the even-numbered substrate includes at least one of a low-pass filter and a band-pass filter.
In this embodiment, in terms of performance, the sub-filter circuits printed on the even-numbered layer substrate may also include filters of various performances, and are not limited herein.
Alternatively, referring to fig. 5, as a specific implementation manner of the amplifier chip provided by the embodiment of the present invention, no circuit is printed on the odd-numbered substrate for interlayer shielding.
In this embodiment, no circuit is printed on the odd-numbered layer substrate, and is used for interlayer shielding between adjacent even-numbered layer substrates.
Optionally, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, the first chip is a gallium arsenide chip, a silicon-based chip, a gallium nitride chip, or an indium phosphide chip.
Optionally, as a specific implementation manner of the amplifier chip provided in the embodiment of the present invention, the even number layers of the multilayer PCB substrate are calculated according to an order from the bottom layer to the top layer of the multilayer PCB substrate.
In this embodiment, the even layers of the multi-layer PCB substrate are calculated according to the sequence from the bottom layer to the top layer of the multi-layer PCB substrate, that is, the bottom layer substrate of the multi-layer PCB substrate is the first layer, and so on.
While the invention has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. An amplifier chip, comprising:
stacking the integrated first chip and the multi-layer PCB substrate;
the first chip is printed with an amplifier circuit, each even-numbered layer of the multilayer PCB substrate is printed with a sub-filter circuit, and the sub-filter circuits printed on each even-numbered layer of the multilayer PCB substrate are connected in series to form a filter circuit;
the input end of the amplifier circuit is the input end of the amplifier chip, the output end of the amplifier circuit is connected with the input end of the filter circuit, and the output end of the filter circuit is the output end of the amplifier chip.
2. The amplifier chip of claim 1, wherein said amplifier chip further comprises a plurality of gold bumps; the first chip is also printed with a first signal bonding pad, a second signal bonding pad, a first transmission bonding pad, a second transmission bonding pad, at least one power supply bonding pad and a plurality of interconnection bonding pads;
the first signal bonding pad is connected with the input end of the amplifier circuit and serves as the input end of the amplifier chip; the second transmission bonding pad is connected with the second signal bonding pad and used as an output end of the amplifier chip;
the output end of the amplifier circuit is connected with the first transmission bonding pad, and the first transmission bonding pad is connected with the input end of the filter circuit through the gold bump; the output end of the filter circuit is connected with the second transmission bonding pad through the gold bump;
the power supply pad is connected with a power supply input end of the amplifier circuit and is used for providing an external power supply access port of the amplifier circuit; the interconnection bonding pad is used for being connected with the gold bump and is connected with the non-circuit area on the multilayer PCB substrate through the gold bump.
3. The amplifier chip of claim 1, wherein the multi-layer PCB substrate comprises a PCB bottom substrate, a PCB top substrate, at least one PCB middle substrate, a PCB through hole, at least one first PCB blind hole, a second PCB blind hole;
the first PCB blind hole is used for connecting the output end of a sub-filter circuit corresponding to a certain PCB middle layer substrate and the input end of the next sub-filter circuit corresponding to the PCB middle layer substrate; the PCB through hole is used for connecting the output end of the sub-filter circuit corresponding to the PCB top substrate and the PCB bottom substrate;
the second PCB blind hole is used for connecting the PCB bottom substrate and the input end of the sub-filter circuit corresponding to the first filter substrate so as to carry out interlayer transmission; the first filter substrate is the PCB middle layer substrate directly connected with the PCB bottom layer substrate.
4. The amplifier chip of claim 3, wherein the input terminal of the sub-filter circuit corresponding to the first filter substrate is the input terminal of the filter circuit;
and the output end of the sub-filter circuit corresponding to the PCB top substrate is the output end of the filter circuit.
5. The amplifier chip of claim 3, wherein the multilayer PCB substrate further comprises a plurality of third PCB blind holes;
the plurality of third PCB blind holes are used for connecting the PCB bottom substrate and the first filtering substrate so as to carry out interlayer grounding.
6. The amplifier chip of claim 1, wherein the filters corresponding to the sub-filter circuits printed on the even-numbered substrate include at least one of a stub filter, a comb filter, an interdigital filter, and a hairpin filter.
7. The amplifier chip as set forth in claim 1, wherein the filters corresponding to the sub-filter circuits printed on the even-numbered substrate include at least one of a low-pass filter and a band-pass filter.
8. The amplifier chip of claim 1, wherein no circuitry is printed on said odd-numbered substrate for interlayer shielding.
9. The amplifier chip of claim 1, wherein the first chip is a gallium arsenide chip, or a silicon based chip, or a gallium nitride chip, or an indium phosphide chip.
10. The amplifier chip of claim 1, wherein even layers of the multilayer PCB substrate are counted in a bottom-to-top order of the multilayer PCB substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010504537.7A CN111669129B (en) | 2020-06-05 | 2020-06-05 | Amplifier chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010504537.7A CN111669129B (en) | 2020-06-05 | 2020-06-05 | Amplifier chip |
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| Publication Number | Publication Date |
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| CN111669129A true CN111669129A (en) | 2020-09-15 |
| CN111669129B CN111669129B (en) | 2023-06-20 |
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| CN202010504537.7A Active CN111669129B (en) | 2020-06-05 | 2020-06-05 | Amplifier chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20050230812A1 (en) * | 2002-06-25 | 2005-10-20 | Andreas Przadka | Electronic component comprising a multilayer substrate and corresponding method of production |
| US20130194754A1 (en) * | 2010-10-05 | 2013-08-01 | Samsung Electronics Co. Ltd. | Transmission line transition having vertical structure and single chip package using land grip array coupling |
| CN204189798U (en) * | 2014-11-17 | 2015-03-04 | 成都泰格微电子研究所有限责任公司 | A kind of novel TR assembly based on LTCC |
| CN105070699A (en) * | 2015-07-31 | 2015-11-18 | 中国电子科技集团公司第二十六研究所 | Radio frequency front simulation integrated chip of heterogeneous integrated passive radio frequency filter |
| CN105304604A (en) * | 2015-10-09 | 2016-02-03 | 株洲宏达天成微波有限公司 | Multi-layer bonding method for multi-pad chip bonding |
| US20170047312A1 (en) * | 2015-08-13 | 2017-02-16 | International Business Machines Corporation | Packaging optoelectronic components and cmos circuitry using silicon-on-insulator substrates for photonics applications |
| CN108598254A (en) * | 2018-04-19 | 2018-09-28 | 嘉盛半导体(苏州)有限公司 | Filter package method and encapsulating structure |
-
2020
- 2020-06-05 CN CN202010504537.7A patent/CN111669129B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050230812A1 (en) * | 2002-06-25 | 2005-10-20 | Andreas Przadka | Electronic component comprising a multilayer substrate and corresponding method of production |
| US20130194754A1 (en) * | 2010-10-05 | 2013-08-01 | Samsung Electronics Co. Ltd. | Transmission line transition having vertical structure and single chip package using land grip array coupling |
| CN204189798U (en) * | 2014-11-17 | 2015-03-04 | 成都泰格微电子研究所有限责任公司 | A kind of novel TR assembly based on LTCC |
| CN105070699A (en) * | 2015-07-31 | 2015-11-18 | 中国电子科技集团公司第二十六研究所 | Radio frequency front simulation integrated chip of heterogeneous integrated passive radio frequency filter |
| US20170047312A1 (en) * | 2015-08-13 | 2017-02-16 | International Business Machines Corporation | Packaging optoelectronic components and cmos circuitry using silicon-on-insulator substrates for photonics applications |
| CN105304604A (en) * | 2015-10-09 | 2016-02-03 | 株洲宏达天成微波有限公司 | Multi-layer bonding method for multi-pad chip bonding |
| CN108598254A (en) * | 2018-04-19 | 2018-09-28 | 嘉盛半导体(苏州)有限公司 | Filter package method and encapsulating structure |
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| Publication number | Publication date |
|---|---|
| CN111669129B (en) | 2023-06-20 |
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