CN111668324A - 一种集成光栅反射结构的光探测器 - Google Patents
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Abstract
本申请公开了一种集成光栅反射结构的光探测器,包括:衬底和设于所述衬底上的主动层,所述衬底与所述主动层之间设有光栅结构;所述衬底临近所述光栅结构的位置形成有第一掺杂区;所述主动层远离所述光栅结构的表层形成有第二掺杂区;所述第二掺杂区与所述第一掺杂区的掺杂类型不同。本申请在衬底与主动层之间集成了光栅反射结构,具有近全反射的效果和较宽的吸收光谱范围,以及更大的光接收角度,在提升了带宽的同时也提高了光响应度。
Description
技术领域
本申请涉及光通信技术领域,尤其涉及一种集成光栅反射结构的光探测器。
背景技术
高性能的光探测器(photodetector)是高速光通讯的核心器件之一,面射型光接收器件对于空间光或者低功率接收有很大的优势,其光响应度(responsivity)和灵敏度(sensitivity)是很重要的指标。但是随着带宽的需求越来越高,需要降低RC延迟时间或者加速光产生载子(photo-generated carrier)的渡越时间(transit time),在有限优化RC延迟时间下,减少光学吸收层来提升渡越时间(transit time)的方式,反而牺牲了光学响应度。
在硅光技术的光模块与光收发器上,为了解决光模块封装的空间光学与降低偏振相关损耗(Polarization dependent loss,PDL)的问题,光接收端的部分以面射型(normalincident)的锗光探测器(Germanium photodetector)为主,透过光纤的空间光照射在大面积的面射型接收器上,可以减少大量光纤耦合的损耗,增加接收端的灵敏度和光电响应度。现在的器件操作带宽以25G为主,如果想要提升面射型光探测器的速度,必须缩短光产生载子(photo-generated carrier)的渡越时间(transit time),光吸收层的厚度则要小于1微米。但是光吸收层变薄会另外造成光学吸收效率不足的光电响应度问题。
近期,许多团队采用光学谐振腔(optical resonator)来提升光学吸收率,主要是在光接收器中增加高反射镜。如图1所示,是在吸收层20’底面重复多层SOI(Silicon-On-Insulator,绝缘体上硅)形成DBR(distributed Bragg reflectors,分布布拉格反射器)结构,即衬底10’的硅基板11’上重复了多层掩埋绝缘层12’和顶层硅13’的层叠。图示采用了两层SOI形成反射镜,大概有70~80%的反射效果,如需要更高的反射效果,则需要更多层的SOI,至少三至四层,其工艺成本极高,而且也无法把入射光完全束缚在吸收层内,吸收率也达不到100%。
如图2所示,则是在传统SOI(Silicon-On-Insulator,绝缘体上硅)衬底10’上的掩埋绝缘层12’下面挖洞再镀金属反射镜30’,其光学谐振腔的腔长延伸到金属反射镜30’的反射面,包含了SOI的厚度,由于工艺限制,在SOI的BOX(掩埋绝缘层12’)上挖洞时无法保证高精度的平整度,使得BOX的厚度误差在10%左右,即不同位置的谐振腔长度不一致,导致吸收光谱不稳定。而且也同样无法把入射光完全束缚在吸收层20’内,吸收率无法达到最佳。
发明内容
本申请的目的在于提供一种集成光栅反射结构的光探测器,同时具备了高带宽和高响应度的优点。
为了实现上述目的之一,本申请提供了一种集成光栅反射结构的光探测器,包括:
衬底和设于所述衬底上的主动层,所述衬底与所述主动层之间设有光栅结构;
所述衬底临近所述光栅结构的位置形成有第一掺杂区;
所述主动层远离所述光栅结构的表层形成有第二掺杂区;
所述第二掺杂区与所述第一掺杂区的掺杂类型不同。
作为实施方式的进一步改进,所述光栅结构为一光栅介电质层。
作为实施方式的进一步改进,所述光栅介电质层的材料为折射率低于所述主动层折射率的介电质材料。
作为实施方式的进一步改进,所述光栅结构与所述衬底之间还设有缓冲层。
作为实施方式的进一步改进,所述缓冲层为具有结晶或单晶的介电质层;所述第一掺杂区临近所述光栅结构,设于所述缓冲层上,或者设于所述缓冲层和所述衬底上。
作为实施方式的进一步改进,所述缓冲层为外延硅层;所述第一掺杂区设于所述衬底临近所述缓冲层的上表层;所述外延硅层临近所述光栅结构的上表层形成第三掺杂区;所述第三掺杂区与所述第二掺杂区的掺杂类型相同,所述第二掺杂区、第三掺杂区和第一掺杂区形成PIPIN结构或NINIP结构。
作为实施方式的进一步改进,所述衬底至少包括一硅层,所述硅层临近所述主动层的表面形成所述光栅结构。
作为实施方式的进一步改进,所述主动层由所述光栅结构的光栅间隙底部延伸至所述光栅结构上方。
作为实施方式的进一步改进,所述光栅结构的光栅间隙内设有折射率低于所述硅层折射率的介电质。
作为实施方式的进一步改进,所述主动层高出所述光栅结构的部分的厚度在0.1λ~1λ范围内,所述λ为所述光探测器吸收光谱的中心波长。
作为实施方式的进一步改进,所述主动层高出所述光栅介电质层的部分的厚度在50nm~1000nm范围内。
作为实施方式的进一步改进,所述主动层包括硅层、锗硅层、锗层或锗锡层其中的一种或多种的组合。
作为实施方式的进一步改进,所述锗硅层为SixGe1-x,其中x≤10%;所述锗锡层为SnxGe1-x,其中x≤10%。
作为实施方式的进一步改进,所述光栅结构的光栅高度在0.1λ~1λ范围内,光栅周期在0.1λ~1λ范围内,占空比在0.1~0.9范围内,所述λ为所述光探测器吸收光谱的中心波长。
作为实施方式的进一步改进,所述光栅结构为一维光栅或者二维光栅。
本申请还提供了一种集成光栅反射结构的光探测器制作方法,包括如下步骤:
提供一衬底;
对所述衬底进行掺杂形成第一掺杂区,在所述第一掺杂区上方制作光栅结构;
或者在所述衬底上制作光栅结构,对所述光栅结构下方的衬底进行掺杂形成第一掺杂区;
在所述光栅结构上外延生长主动层;
对所述主动层的上表层进行掺杂形成第二掺杂区;
所述第一掺杂区和第二掺杂区的掺杂类型不同,与所述主动层形成PIN结构。
本申请的有益效果:在衬底与主动层之间集成了光栅反射结构,具有近全反射的效果和较宽的吸收光谱范围,以及更大的光接收角度,在提升了带宽的同时也提高了光响应度。
附图说明
图1为常用技术带DBR结构的光探测器示意图;
图2为常用技术带金属反射镜的光探测器示意图;
图3为本申请的光探测器实施例1芯片结构示意图;
图4为本申请集成光栅反射结构的光探测器的反射率曲线;
图5为本申请集成光栅反射结构的光探测器的吸收光谱;
图6为本申请集成光栅反射结构的光探测器的光接收角度范围;
图7为图3中截面A-A结构1示意图;
图8为图3中截面A-A结构2示意图;
图9为图3中截面A-A结构3示意图;
图10为图3中截面A-A结构4示意图;
图11为本申请的光探测器实施例1结构示意图;
图12为本申请的光探测器实施例2芯片结构示意图;
图13为本申请的光探测器实施例3芯片结构示意图;
图14为本申请的光探测器实施例4芯片结构示意图;
图15为本申请的光探测器实施例5芯片结构示意图;
图16为本申请的光探测器实施例6芯片结构示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本申请进行详细描述。但这些实施方式并不限制本申请,本领域的普通技术人员根据这些实施方式所做出的结构、方法、或功能上的变换均包含在本申请的保护范围内。
在本申请的各个图示中,为了便于图示,结构或部分的某些尺寸会相对于其它结构或部分夸大,因此,仅用于图示本申请的主题的基本结构。
另外,本文使用的例如“上”、“上方”、“下”、“下方”等表示空间相对位置的术语是出于便于说明的目的来描述如附图中所示的一个单元或特征相对于另一个单元或特征的关系。空间相对位置的术语可以旨在包括设备在使用或工作中除了图中所示方位以外的不同方位。例如,如果将图中的设备翻转,则被描述为位于其他单元或特征“下方”或“之下”的单元将位于其他单元或特征“上方”。因此,示例性术语“下方”可以囊括上方和下方这两种方位。设备可以以其他方式被定向(旋转90度或其他朝向),并相应地解释本文使用的与空间相关的描述语。当元件或层被称为在另一部件或层“上”、与另一部件或层“连接”时,其可以直接在该另一部件或层上、连接到该另一部件或层,或者可以存在中间元件或层。
本申请的光探测器在衬底与主动层之间集成了光栅反射结构,具有近全反射的效果和较宽的吸收光谱范围,以及更大的光接收角度,在提升了带宽的同时也提高了光响应度。具体的,本申请提供了一种集成光栅反射结构的光探测器,包括:衬底和设于衬底上的主动层,该衬底与主动层之间设有光栅结构。其中,衬底临近光栅结构的位置形成有第一掺杂区,主动层远离光栅结构的表层形成有第二掺杂区,该第二掺杂区与第一掺杂区的掺杂类型不同,形成PIN结。其具体结构以下面的各实施例为例进行阐述。
实施例1
如图3所示,为本申请实施例1的集成光栅反射结构的光探测器结构示意图,该实施例中,上述光栅结构形成于一介质层上,构成一光栅介电质层,叠置于衬底上。具体的,该探测器包括依次层叠的衬底10、光栅介电质层30和主动层20(即光吸收层)。该实施例中,衬底10包括一硅基板11;光栅介电质层30设于衬底10上,主动层20则由光栅介电质层30的光栅间隙底部延伸至光栅介电质层30上面并覆盖光栅介电质层30。在衬底10上靠近光栅介电质层30的上表层掺杂形成第一掺杂区41,作为第一电极层;在主动层20上远离光栅介电质层30的上表层掺杂形成第二掺杂区42,作为第二电极层。这里,第一掺杂区41可以是P型掺杂,第二掺杂区42为N型掺杂;或者第一掺杂区41为N型掺杂,第二掺杂区42为P型掺杂。
该实施例中,主动层20高出光栅介电质层30的部分的厚度D在0.1λ~1λ范围内,这里λ为该光探测器吸收光谱的中心波长,为了进一步提高光探测器的探测速度,即缩短光生载流子的渡越时间,还可以将主动层20高出光栅介电质层30的部分的厚度D设置在50nm~1000nm范围内,比如800nm、600nm、340nm、280nm等。该实施例中主动层20的上下表面,即光栅介电质层与主动层20的上表面之间形成一谐振腔,构成光的吸收层。由于在主动层20底部集成了光栅反射结构——光栅介电质层30,而集成的光栅介电质层30的光栅结构在谐振腔底面形成导模共振增强的效果,使得入射到主动层20内的光信号被束缚在主动层20内传播,进而被主动层20吸收,达到接近100%的反射效果,有效提升了光吸收效率。该实施例中,光信号可以从主动层的上面入射,也可以从硅基板的下面入射。
如图4所示,为450nm厚度的锗主动层底部集成了二氧化硅的光栅介电质层的光反射率曲线,图5为相应的吸收光谱,图6为相应的光接收角度范围,这里锗主动层的厚度是从光栅间隙底部到主动层上表面的间距。从图中可以看出,光栅介电质层在通信波段1310nm附近具有近全反射的效果和较宽的吸收光谱范围,大于100nm,以及更大的光接收角度-50°~50°左右,不仅能接收垂直入射的光,还可以接收偏离一定角度内的入射光。在提升了速度、带宽的同时也提高了光响应度。该实施例中,光栅介电质层采用的是二氧化硅,光栅高度为250nm,光栅周期为680nm,占空比为0.54。光栅介电质层的光栅结构可以根据实际需要设计,其光栅高度d可以在0.1λ~1λ范围内调整,光栅周期可以在0.1λ~1λ范围内调整,占空比可以在0.1~0.9范围内调整,这里λ为该光探测器吸收光谱的中心波长。
上述主动层20采用的是外延的锗层,在其它实施例中还可以采用硅层、锗硅层、锗层或锗锡层其中的一种或多种的组合,其中锗硅层为SixGe1-x,x≤10%,锗锡层为SnxGe1-x,x≤10%。同样的,在其它实施例中,上述光栅介电质层30还可以采用氮化硅等折射率低于主动层折射率的介电质材料。该实施例中,光栅介电质层30的光栅采用的是一维光栅,如图7所示。在其它实施例中,也可以采用二维光栅,如图8和9所示的轴对称和/或中心对称的二维光栅。在二维光栅中,各光栅单元的截面可以是圆形、多边形或其它形状的立柱或锥状体,还可以如图10所示的多个中心对称的环形光栅单元形成的光栅。
设计的时候,根据需要的探测速度,以及宽的吸收光谱或窄的吸收光谱,先确定主动层的厚度,一般在50~1600nm的范围内,之后再调整光栅的参数以获得最佳的反射率和吸收率。可以根据应用需要设计成吸收范围(△λ1dB)大于100nm的宽吸收频带探测器,也可以设计成吸收范围极窄的窄吸收频带探测器。
上述集成光栅反射结构的光探测器可以采用如下制作方法,包括以下步骤:
提供一衬底
对上述衬底进行掺杂形成第一掺杂区,在该第一掺杂区上方制作光栅结构;
在光栅结构上外延生长主动层;
对主动层的上表层进行掺杂形成第二掺杂区;
第一掺杂区和第二掺杂区的掺杂类型不同,与主动层形成PIN结构。
该实施例中,是在上述衬底的上表层进行掺杂形成第一掺杂区;然后在上述第一掺杂区上制作一介电质层,并在该介电质层上刻蚀出光栅结构形成光栅介电质层;之后在光栅介电质层上外延生长主动层,并在该主动层的上表层进行掺杂形成第二掺杂区。
制作的时候,光栅介电质层30可以通过在衬底10上外延生长或沉积介电质层,再对介电质层进行刻蚀形成光栅结构,之后在光栅结构上继续外延生长主动层20。外延生长主动层20的时候,光栅介电质层30起到了外延生长与缺陷阻挡的作用,将主动层20与衬底10的晶格不匹配的缺陷限制在光栅间隙内,降低整体器件的暗电流,提升了主动层的质量。该结构制作工艺与半导体工艺兼容,不需要客制化晶圆,也不需要对晶圆背面做另外的处理,流程简单,工艺成熟,可大批量生产,成本相对较低。
如图11所示,光探测器的主动层20上还覆盖有包层60,主动层20外周的包层60内设有第一导电通道71,第一导电通道71与第一掺杂区41导电连接;主动层20上方的包层60内设有第二导电通道72,第二导电通道72与第二掺杂区42导电连接。第一导电通道71和第二导电通道72分别接外部的正负电极。图示为本申请的光探测器电结构的一种示意,当然还可以采用其它方式引出第一掺杂区和第二掺杂区上的电信号,例如将导电通道设置在侧面,从侧面引出第一掺杂区和第二掺杂区的电信号等。这里包层可以是二氧化硅或氮化硅等折射率低于主动层的介电质层,使得入射光在主动层的上表面与光栅介电质层之间形成更好的谐振。
实施例2
如图12所示的实施例2,与实施例1不同的是,该实施例中衬底10还包括依次叠置于硅基板11上的掩埋绝缘层12(BOX)和顶层硅13,即衬底10采用SOI(绝缘体上硅)的结构。在SOI的顶层硅13上表层掺杂形成第一掺杂区41,作为第一电极层,与主动层20上表层的第二掺杂区42形成PIN结构。该实施例中,由于衬底采用的是SOI结构,所以光信号从主动层的上面入射,不能从硅基板的下面入射。
上述各实施例中,还可在光栅介电质层与衬底之间设置缓冲层。这里衬底可以如实施例1中采用的硅基板,也可以如实施例2中采用的SOI结构。缓冲层的结构可以如下面的实施例3和4所示。
实施例3
如图13所示,该实施例中的缓冲层为一外延硅层50,上述第一掺杂区41设于衬底10靠近外延硅层50的上表层,而外延硅层50靠近上述光栅介电质层30的上表层掺杂形成第三掺杂区43,该第三掺杂区43与上述第二掺杂区42的掺杂类型相同。第二掺杂区42、第三掺杂区43和第一掺杂区41形成PIPIN结构或NINIP结构,各掺杂区分别与不同的导电通道导电连接,构成集成光栅反射结构的APD(雪崩光电二极管,光探测器的一种)。
实施例4
如图14所示,该实施例中的缓冲层为具有结晶或单晶的介电质层80,上述第一掺杂区41包括该介电质层80,或者第一掺杂区41设于该介电质层80靠近光栅介电质层30的上表层。即在该介电质层80上靠近光栅介电质层30的位置掺杂形成第一掺杂区41,根据该介电质层80的厚度情况,第一掺杂区41的掺杂深度可能只在介电质层80的上表层,也可能在整个介电质层80的厚度上,还可能渗透至衬底10的上表层。该实施例中,作为缓冲层的介电质层80可以是硅、锗硅或者锗等具有结晶或单晶的材料,可以起到调节光学折射率的作用,或者作为外延缓冲层增加外延的品质。
实施例5
如图15所示,与上述各实施例不同的是,该实施例的集成光栅反射结构的光探测器包括衬底10和设于衬底10上的主动层20,其中衬底10至少包括一硅层,该实施例中,硅层为一硅基板11,在该硅基板11临近主动层20的表面形成光栅结构31;在该光栅结构31下方的硅基板11上形成有第一掺杂区41,在主动层20远离光栅结构31的上表层形成第二掺杂区42,该第二掺杂区42和第一掺杂区41的掺杂类型不同,形成PIN结构。其工作原理同实施例1,在这里不再赘述。
该实施例中,光栅结构41的光栅间隙32内设有折射率低于硅基板折射率的介电质,如氧化硅等。制作的时候,可以在硅基板11上刻蚀形成光栅结构31,然后采用如STI(shallow trench isolation,浅槽隔离)等半导体制作工艺在光栅间隙32内填充或沉积折射率低于硅的介电质,再在光栅结构31上外延生长主动层20。可以在刻蚀光栅结构31之前先在硅基板11上采用离子注入等方式掺杂形成第一掺杂区41,也可以在刻蚀形成光栅结构31之后再在硅基板11上掺杂形成第一掺杂区41。
实施例6
如图16所示的光探测器,与实施例5不同的是,该实施例中光栅结构31的光栅间隙32内不再添加介电质,主动层20由光栅结构31的光栅间隙32底部延伸至光栅结构31上方,节省了填充沉积介电质的步骤,制作流程更简单。
上述实施例5和6中,还可在形成光栅结构的硅层上表层形成低掺杂区,该低掺杂区的掺杂浓度低于或等于上述第一掺杂区的低掺杂区,该低掺杂区的掺杂类型与第一掺杂区的掺杂类型相同。这里,低掺杂区的掺杂浓度在1×1015~1×1019范围内。
上述各实施例中,还可在主动层的光入射面上镀上抗反射膜,以减少光***损耗,进一步提高光响应度。
上文所列出的一系列的详细说明仅仅是针对本申请的可行性实施方式的具体说明,它们并非用以限制本申请的保护范围,凡未脱离本申请技艺精神所作的等效实施方式或变更均应包含在本申请的保护范围之内。
Claims (16)
1.一种集成光栅反射结构的光探测器,其特征在于,包括:
衬底和设于所述衬底上的主动层,所述衬底与所述主动层之间设有光栅结构;
所述衬底临近所述光栅结构的位置形成有第一掺杂区;
所述主动层远离所述光栅结构的表层形成有第二掺杂区;
所述第二掺杂区与所述第一掺杂区的掺杂类型不同。
2.根据权利要求1所述的光探测器,其特征在于:所述光栅结构为一光栅介电质层。
3.根据权利要求2所述的光探测器,其特征在于:所述光栅介电质层的材料为折射率低于所述主动层折射率的介电质材料。
4.根据权利要求2所述的光探测器,其特征在于:所述光栅结构与所述衬底之间还设有缓冲层。
5.根据权利要求4所述的光探测器,其特征在于:所述缓冲层为具有结晶或单晶的介电质层;所述第一掺杂区临近所述光栅结构,设于所述缓冲层上,或者设于所述缓冲层和所述衬底上。
6.根据权利要求4所述的光探测器,其特征在于:所述缓冲层为外延硅层;所述第一掺杂区设于所述衬底临近所述缓冲层的上表层;所述外延硅层临近所述光栅结构的上表层形成第三掺杂区;所述第三掺杂区与所述第二掺杂区的掺杂类型相同,所述第二掺杂区、第三掺杂区和第一掺杂区形成PIPIN结构或NINIP结构。
7.根据权利要求1所述的光探测器,其特征在于:所述衬底至少包括一硅层,所述硅层临近所述主动层的表面形成所述光栅结构。
8.根据权利要求7所述的光探测器,其特征在于:所述主动层由所述光栅结构的光栅间隙底部延伸至所述光栅结构上方。
9.根据权利要求7所述的光探测器,其特征在于:所述光栅结构的光栅间隙内设有折射率低于所述硅层折射率的介电质。
10.根据权利要求1-9任一项所述的光探测器,其特征在于:所述主动层高出所述光栅结构的部分的厚度在0.1λ~1λ范围内,所述λ为所述光探测器吸收光谱的中心波长。
11.根据权利要求10所述的光探测器,其特征在于:所述主动层高出所述光栅介电质层的部分的厚度在50nm~1000nm范围内。
12.根据权利要求1-9任一项所述的光探测器,其特征在于:所述主动层包括硅层、锗硅层、锗层或锗锡层其中的一种或多种的组合。
13.根据权利要求12所述的光探测器,其特征在于:所述锗硅层为SixGe1-x,其中x≤10%;所述锗锡层为SnxGe1-x,其中x≤10%。
14.根据权利要求1-9任一项所述的光探测器,其特征在于:所述光栅结构的光栅高度在0.1λ~1λ范围内,光栅周期在0.1λ~1λ范围内,占空比在0.1~0.9范围内,所述λ为所述光探测器吸收光谱的中心波长。
15.根据权利要求1-9任一项所述的光探测器,其特征在于:所述光栅结构为一维光栅或者二维光栅。
16.一种集成光栅反射结构的光探测器制作方法,其特征在于,包括如下步骤:
提供一衬底;
对所述衬底进行掺杂形成第一掺杂区,在所述第一掺杂区上方制作光栅结构;
或者在所述衬底上制作光栅结构,对所述光栅结构下方的衬底进行掺杂形成第一掺杂区;
在所述光栅结构上外延生长主动层;
对所述主动层的上表层进行掺杂形成第二掺杂区;
所述第一掺杂区和第二掺杂区的掺杂类型不同,与所述主动层形成PIN结构。
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CN114188426A (zh) * | 2022-02-17 | 2022-03-15 | 福建慧芯激光科技有限公司 | 一种高带宽高响应度的光电探测器 |
US20220099803A1 (en) * | 2020-09-25 | 2022-03-31 | Beijing Voyager Technology Co., Ltd. | Scanner covered by a diffraction grating for an optical sensing system |
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CN112582495B (zh) * | 2020-12-03 | 2024-04-09 | 无锡中微晶园电子有限公司 | 红外增强型硅基光电探测器 |
CN112768550A (zh) * | 2020-12-18 | 2021-05-07 | 中国电子科技集团公司第四十四研究所 | 一种用于提高背照式光电二极管响应度的结构及制作方法 |
CN113097335B (zh) * | 2021-03-04 | 2023-02-10 | 西安电子科技大学 | 波导耦合等离增强型Ge基红外光电探测器及其制备方法 |
CN117637871A (zh) * | 2022-08-11 | 2024-03-01 | 华为技术有限公司 | Ⅲ-ⅴ族半导体光电探测器和光接收模块 |
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