CN111651128A - OTP (one time programmable) implementation method for common memory and memory - Google Patents
OTP (one time programmable) implementation method for common memory and memory Download PDFInfo
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- CN111651128A CN111651128A CN202010584125.9A CN202010584125A CN111651128A CN 111651128 A CN111651128 A CN 111651128A CN 202010584125 A CN202010584125 A CN 202010584125A CN 111651128 A CN111651128 A CN 111651128A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0626—Reducing size or complexity of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The invention discloses a method for realizing OTP of a common memory and the memory which is formed by simply reforming the common memory, so that the common memory has a one-time programmable function, and has simple structure and low manufacturing cost. The method for realizing the OTP of the common memory comprises the following steps: (10) dividing a storage space: dividing the storage space of the common memory into a special space and a common space for storing the number of times that the memory can be programmed; (20) and (3) special space configuration: configuring the number N of times that the memory stored in the special space can be burnt into 1; (30) programming control: when data are to be programmed, determining whether the programming is allowed according to the number N of times that the memory can be programmed; (40) data reading and writing: and when the programming is allowed, writing the data to be programmed into the memory, and reducing the number N of times that the memory can be programmed by one. The memory comprises a common memory (1), a programming control module (2) and a data reading and writing module (3).
Description
Technical Field
The invention belongs to the technical field of integrated circuit memories, and particularly relates to a method for realizing OTP (one time programmable) of a common memory and a memory obtained by the method.
Background
In integrated circuits, a wide variety of memories are required. The memory device can be divided into a general memory and a One Time Programmable (OTP) memory, i.e., an OTP memory, according to the number of allowed programming times.
OTP memories are more commonly used. Are often used to store security-related critical data such as user keys, critical IDs, etc.
However, compared with the common memory, the conventional OTP memory has a complex structure and is expensive.
Therefore, the prior art has the problems that: how to realize the same function as the OTP memory by using a common memory with simple structure and low manufacturing cost, thereby reducing the manufacturing cost and simplifying the difficulty of selecting the stream slice.
Disclosure of Invention
The invention aims to provide a method for realizing OTP of a common memory, which enables the common memory to have a one-time programmable function.
Another objective of the present invention is to provide a memory, which is formed by simply modifying a common memory, has a one-time programmable function, and has a simple structure and a low cost.
The technical solution for realizing the purpose of the invention is as follows:
a common memory OTP implementation method comprises the following steps:
(10) dividing a storage space: dividing the storage space of the common memory into a special space and a common space, wherein the special space is used for storing the number of times that the memory can be written, and the common space is used for storing key data including a user key;
(20) and (3) special space configuration: configuring the number N of times that the memory stored in the special space can be burnt into 1;
(30) programming control: when data are to be programmed, determining whether the programming is allowed according to the number N of times that the memory stored in the special space can be programmed;
(40) data reading and writing: when the programming is allowed, writing the data to be programmed into the corresponding address of the memory through the read-write port, and reducing the number N of times of programming of the memory stored in the special space by one.
The technical solution for realizing another purpose of the invention is as follows:
a memory comprises a common memory 1, a programming control module 2 and a data reading and writing module 3;
the storage space of the ordinary memory 1 is divided into a dedicated space and an ordinary space;
the read and write ports of the programming control module 2 are connected with the special space of the common memory 1, and the read and write control ports are connected with the read and write enabling ports of the data read-write module 3;
the read and write ports of the data read-write module 3 are connected with the common space of the common memory 1;
the special space of the ordinary memory 1 is used for storing the memory programming times, the memory programming times N is configured to be 1, and the ordinary space is used for storing key data including a user key;
the programming control module 2 is used for determining whether to allow the programming according to the number N of times that the memory can be programmed and stored in the special space when the data is to be programmed;
and the data reading and writing module 3 is used for writing the data to be programmed into the address corresponding to the memory through the reading and writing port when the programming is allowed, and reducing the number N of times of programming of the memory stored in the special space by one.
Compared with the prior art, the invention has the following remarkable advantages:
the invention enables the common memory to have the one-time programmable function, and the OTP memory with the one-time programmable function is obtained by simply transforming the common memory, thereby reducing the manufacturing cost of the OTP memory and simplifying the difficulty of selecting the stream chip.
The invention is described in further detail below with reference to the figures and the detailed description.
Drawings
Fig. 1 is a main flow chart of a general memory OTP implementation method of the present invention.
FIG. 2 is a flowchart of the determination step of the programming authorization in FIG. 1.
FIG. 3 is a block diagram of the structure of the memory of the present invention.
In the figure, 1 a common memory, 2 a programming control module and 3 a data reading and writing module.
Detailed Description
As shown in fig. 1, the method for implementing an ordinary memory OTP of the present invention includes the following steps:
(10) dividing a storage space: dividing the storage space of the common memory into a special space and a common space, wherein the special space is used for storing the number of times that the memory can be written, and the common space is used for storing key data including a user key;
(20) and (3) special space configuration: configuring the number N of times that the memory stored in the special space can be burnt into 1;
(30) programming control: when data are to be programmed, determining whether the programming is allowed according to the number N of times that the memory stored in the special space can be programmed;
as shown in fig. 2, the step (30) of determining the programming permission includes:
(31) and (3) writing a legality check: reading a write address when data is to be programmed, and refusing the programming when the write address belongs to a special space;
(32) and (3) reading the number of times of programming: when the write address does not belong to the special space, reading the memory programming times N stored in the special space of the memory;
(33) programming allows: if the number N of times that the memory can be programmed is 1, setting the write enable to be high level 1;
(34) rejection of programming: if the number of times N of memory programming is 0, the write enable is set to 0.
(40) Data reading and writing: when the programming is allowed, writing the data to be programmed into the corresponding address of the memory through the read-write port, and reducing the number N of times of programming of the memory stored in the special space by one.
As shown in fig. 3, the memory of the present invention includes a normal memory 1, a programming control module 2 and a data reading and writing module 3;
the storage space of the ordinary memory 1 is divided into a dedicated space and an ordinary space;
the read and write ports of the programming control module 2 are connected with the special space of the common memory 1, and the read and write control ports are connected with the read and write enabling ports of the data read-write module 3;
the read and write ports of the data read-write module 3 are connected with the common space of the common memory 1;
the special space of the ordinary memory 1 is used for storing the memory programming times, the memory programming times N is configured to be 1, and the ordinary space is used for storing key data including a user key;
the programming control module 2 is used for determining whether to allow the programming according to the number N of times that the memory can be programmed and stored in the special space when the data is to be programmed;
the process of determining whether to allow the programming of this time by the programming control module 2 includes:
reading a write address when data is to be programmed, and refusing the programming when the write address belongs to a special space;
when the write address does not belong to the special space, reading the memory programming times N stored in the special space of the memory;
if the number N of times that the memory can be programmed is 1, setting the write enable to be high level 1;
if the number of times N of memory programming is 0, the write enable is set to 0.
And the data reading and writing module 3 is used for writing the data to be programmed into the address corresponding to the memory through the reading and writing port when the programming is allowed, and reducing the number N of times of programming of the memory stored in the special space by one.
In the implementation process of the method, a user is not allowed to read and write the special space, the programmable number of times is firstly written into the special space of the memory, and when the user writes data, the write enable is generated according to the programmable number of times; and when the user reads data, generating read enable according to the read address.
The method adopts two control modules, a programming control module and a data reading and writing module; the programming control module is used for reading and writing the special space of the memory, judging whether the memory is allowed to be programmed and generating programming enabling signals, wherein the ports comprise a programming enabling port, a special space reading data port, a special space writing data port and a special space address port; the data read-write module is used for executing read-write operation on the common space of the memory, controlling the read-write operation on the special space, and determining whether to execute the programming operation on the common space of the memory according to the programming enable signal of the programming control module, wherein the ports comprise a writing enable input port, a writing data input port, a reading data output port, an address port, a memory writing data port, a memory reading data port and a memory address port.
The data read-write module and the programming control module share one address port, when a user requests to read data, the programming control module judges whether the data is a special space address or not according to a read address, and if the data is read from a common space, the read enable is 1; if the space data is read, the read enable is 0, and the read is not allowed. When a user requests to write data, the writing control module generates a writing enable according to a writing address and the number of times of writing in the special space, and if the writing address is the writing special space or the number of times of writing is 0, the writing enable is 0; if the space is a common space and the number of times of writing is 1, the write enable is 1.
Claims (4)
1. A method for realizing OTP (one time programmable) of a common memory is characterized by comprising the following steps:
(10) dividing a storage space: dividing the storage space of the common memory into a special space and a common space, wherein the special space is used for storing the number of times that the memory can be written, and the common space is used for storing key data including a user key;
(20) and (3) special space configuration: configuring the number N of times that the memory stored in the special space can be burnt into 1;
(30) programming control: when data are to be programmed, determining whether the programming is allowed according to the number N of times that the memory stored in the special space can be programmed;
(40) data reading and writing: when the programming is allowed, writing the data to be programmed into the corresponding address of the memory through the read-write port, and reducing the number N of times of programming of the memory stored in the special space by one.
2. The OTP method of claim 1 wherein the (30) programming authority determining step comprises:
(31) and (3) writing a legality check: reading a write address when data is to be programmed, and refusing the programming when the write address belongs to a special space;
(32) and (3) reading the number of times of programming: when the write address does not belong to the special space, reading the memory programming times N stored in the special space of the memory;
(33) programming allows: if the number N of times that the memory can be programmed is 1, setting the write enable to be high level 1;
(34) rejection of programming: if the number of times N of memory programming is 0, the write enable is set to 0.
3. A memory, characterized by:
the device comprises a common memory (1), a programming control module (2) and a data read-write module (3);
the storage space of the ordinary memory (1) is divided into a special space and an ordinary space;
the read and write ports of the programming control module (2) are connected with the special space of the common memory (1), and the read and write control ports are connected with the read and write enabling ports of the data read-write module (3);
the read and write ports of the data read-write module (3) are connected with the common space of the common memory (1);
the special space of the ordinary memory (1) is used for storing the memory programming times, the memory programming times N is configured to be 1, and the ordinary space is used for storing key data including a user key;
the programming control module (2) is used for determining whether to allow the programming according to the number N of times that the memory can be programmed and stored in the special space when the data is to be programmed;
and the data reading and writing module (3) is used for writing the data to be programmed into the corresponding address of the memory through the reading and writing port when the programming is allowed, and reducing the number N of times of programming of the memory stored in the special space by one.
4. The memory according to claim 3, wherein the process of determining whether to allow the current programming by the programming control module (2) comprises the following steps:
reading a write address when data is to be programmed, and refusing the programming when the write address belongs to a special space;
when the write address does not belong to the special space, reading the memory programming times N stored in the special space of the memory;
if the number N of times that the memory can be programmed is 1, setting the write enable to be high level 1;
if the number of times N of memory programming is 0, the write enable is set to 0.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010584125.9A CN111651128A (en) | 2020-06-24 | 2020-06-24 | OTP (one time programmable) implementation method for common memory and memory |
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| CN202010584125.9A CN111651128A (en) | 2020-06-24 | 2020-06-24 | OTP (one time programmable) implementation method for common memory and memory |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050105331A1 (en) * | 2003-11-13 | 2005-05-19 | Lee Chul-Ho | Memory system having flash memory where a one-time programmable block is included |
| CN102866864A (en) * | 2012-08-24 | 2013-01-09 | 深圳市江波龙电子有限公司 | One-time programmable storage implementation method and storage equipment |
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- 2020-06-24 CN CN202010584125.9A patent/CN111651128A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050105331A1 (en) * | 2003-11-13 | 2005-05-19 | Lee Chul-Ho | Memory system having flash memory where a one-time programmable block is included |
| CN102866864A (en) * | 2012-08-24 | 2013-01-09 | 深圳市江波龙电子有限公司 | One-time programmable storage implementation method and storage equipment |
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