CN111628849A - Interleaving mapping method and de-interleaving de-mapping method of LDPC code words - Google Patents
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Abstract
An interleaving mapping method and a de-interleaving de-mapping method of LDPC code words comprise the steps of carrying out first bit interleaving on a check part in the LDPC code words to obtain check bit streams; splicing the information bit part in the code word and the check bit stream into a code word after first bit interleaving; dividing the code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to corresponding bit exchange patterns to form a code word after the second bit interleaving; dividing the code word after the second bit interleaving into two parts, writing the two parts in the sequence of columns and reading out the two parts in the sequence of rows to obtain the code word after the third bit interleaving; carrying out constellation mapping on the code word after the third bit interleaving according to a constellation diagram to obtain a symbol stream; the LDPC code tables with different code rates adopt the same bit exchange patterns and constellation diagrams to carry out interleaving mapping processing. The technical scheme reduces the receiving threshold of the receiving end.
Description
Technical Field
The invention relates to the technical field of digital televisions, in particular to an interleaving mapping method and a de-interleaving de-mapping method of LDPC code words.
Background
In the existing broadcast communication standard, LDPC coding, bit interleaving and constellation mapping are the most common coding modulation methods. In different transmission systems, LDPC coding, bit interleaving and constellation mapping all need to be designed separately and debugged jointly to achieve the best channel performance. Therefore, how to select a constellation mapping mode with better performance to form targeted bit interleaving for different LDPC codewords is a technical problem in the art, so as to reduce the receiving threshold of the receiving end.
Disclosure of Invention
The invention solves the problem of reducing the receiving threshold of the receiving end.
In order to solve the above problem, an embodiment of the present invention provides an interleaving and mapping method for LDPC codewords, which is characterized by including the following steps:
carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to the length of 360 bits, and transforming the arrangement sequence of the bit sub-blocks according to corresponding bit exchange patterns to form the LDPC code word after the second bit interleaving;
dividing the LDPC code word after the second bit interleaving into two parts, writing the first part into a storage space according to the sequence of columns and reading the first part from the storage space according to the sequence of rows, writing the second part into the storage space according to the sequence of columns and reading the second part from the storage space according to the sequence of rows, and splicing the results of the two readings to obtain the LDPC code word after the third bit interleaving;
performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding QPSK constellation diagram to obtain a symbol stream; wherein the code length of the LDPC code word is 16200 bits, and the code rate is 4/15 or 8/15 or 11/15 or 12/15;
the bit-swapping patterns used are all:
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 79 11 13 1517 19 21 23 25 27 29 31 33 35 37 39 41 43 44，
wherein each value in the bitswap pattern represents a position of the bit sub-block before bitswap.
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code word, which comprises the following steps: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding QPSK constellation diagram to obtain bit soft value data; the symbol stream soft value data is a symbol stream obtained by the receiving end by receiving the LDPC code word interleaving and mapping method;
dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving;
dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to the length of 360 bits, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data;
the bit-swapping patterns used are all:
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 79 11 13 1517 19 21 23 25 27 29 31 33 35 37 39 41 43 44，
wherein each value in the bitswap pattern represents a position of the bit sub-block before bitswap.
Compared with the prior art, the technical scheme of the invention has the following advantages:
aiming at different code rates and corresponding LDPC code tables, an interleaving mapping method and a de-interleaving de-mapping method with better performance are selected, and the receiving threshold of a receiving end is reduced, so that the system performance is better improved.
Furthermore, the embodiment of the present invention provides corresponding bit interleaving patterns and QPSK constellations for different LDPC code tables with code rates of 4/15, 8/15, 11/15, and 12/15, respectively, so that in practice, the receiving threshold of the receiving end can be effectively reduced, thereby improving the system performance.
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FIG. 1 is a flowchart illustrating an embodiment of an interleaving and mapping method for LDPC code words according to the present invention;
FIG. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC code words according to the present invention;
FIG. 3 is a schematic diagram of a first bit interleaving of a check portion in an LDPC codeword to obtain a check bit stream in the LDPC codeword interleaving and mapping method of the present invention;
fig. 4 is a schematic diagram of transforming the arrangement order of the bit sub-blocks according to the bit exchange pattern in the LDPC codeword interleaving and mapping method of the present invention.
Detailed Description
The inventor finds that in the prior art, targeted bit interleaving cannot be formed according to a specific LDPC code word and a constellation mapping mode.
In view of the above problems, the inventors have studied and provided an interleaving mapping method and a de-interleaving de-mapping method for LDPC codewords, and select an interleaving mapping method and a de-interleaving de-mapping method with better performance for different code rates and corresponding LDPC code tables, so as to reduce the receiving threshold of the receiving end, thereby better improving the system performance.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
In the embodiment of the invention, the transmitter end is as follows: firstly, inputting a bit stream after source coding and BCH coding into an LDPC coder to code an LDPC code word with a specific code rate code length, then inputting the bit stream into a bit interleaver to carry out interleaving processing according to a certain specific bit interleaving pattern method, then carrying out QPSK constellation mapping of a corresponding code rate on data after the bit interleaving processing, then carrying out modulation and emission, and experiencing a channel. The receiver end is: and demodulating the data after passing through the channel, and inputting the demodulated data into a demapping module to perform QPSK demapping. And then inputting the bit soft value information output by the demapping module into a deinterleaving module for deinterleaving, then outputting the bit soft value information to an LDPC decoder, decoding the bit soft value information based on a specific LDPC code word, and finally decoding and outputting a bit stream.
Fig. 1 is a flowchart illustrating an embodiment of an LDPC codeword interleaving and mapping method according to the present invention. Referring to fig. 1, the interleaving mapping method of the LDPC codeword includes the steps of:
step S11: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
step S12: splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
step S13: dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;
step S14: dividing the LDPC code word after the second bit interleaving into two parts, writing the first part into a storage space according to the sequence of columns and reading the first part from the storage space according to the sequence of rows, writing the second part into the storage space according to the sequence of columns and reading the second part from the storage space according to the sequence of rows, and splicing the results of the two readings to obtain the LDPC code word after the third bit interleaving;
step S15: and carrying out constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding QPSK constellation diagram to obtain a symbol.
In this embodiment, the step S11 specifically includes the following steps: and writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.
Specifically, the check portion that generates the LDPC codeword is bit interleaved: the check portion of the LDPC codeword has M bits, and is written into one memory space by columns, Q bits per column, and L columns, that is, M ═ Q × L, and then read out in row order. The specific implementation process is shown in fig. 3.
In step S13, the LDPC codeword after the first bit interleaving is divided into a plurality of consecutive bit sub-blocks according to a predetermined length, where the predetermined length is 360. Further, the arrangement order of the bit sub-blocks is transformed according to the corresponding bit exchange pattern to form the LDPC code word after the second time of bit interleaving. The detailed process is shown in FIG. 4, (m)0,m1,...,mN/360-1) Is a bit swap pattern for a 360 length bit sub-block.
Specifically, the LDPC codeword in the LDPC code table has a code length of 16200 and code rates of 4/15, 8/15, 11/15, and 12/15.
The corresponding bit-swapping pattern is:
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 79 11 1315 17 19 21 23 25 27 29 31 33 35 37 39 41 43 44
it should be noted that, in this embodiment, each numerical value in the bit swap pattern refers to a position of the bit sub-block before bit swap. For example, the second value 2 in the bit swap pattern means that the 3 rd bit sub-block that was not bit swapped now becomes the second bit sub-block.
The corresponding QPSK constellation is:
in step S14, for example, for an LDPC codeword with a code length of 16200 bits (an LDPC codeword after second bit interleaving), the LDPC codeword is divided into a first part and a second part, wherein the first part has a length of 15840 bits, and the second part has a length of 360 bits, and both of the first part and the second part are written into a storage space in a column order and read out from the storage space in a row order, wherein each column has 8100 bits, and there are two columns.
Then, the bit interleaved bit stream data (b)0,b1,...,bN-1) According to the QPSK constellation diagram, the decimal numbers corresponding to every two binary bit sequences are mapped to a certain constellation point to obtain a symbol stream (each complex symbol corresponds to a constellation point). Taking the code rate of 4/15 as an example, if the inputted two bits '10' correspond to decimal number of 2, the decimal number corresponds to the constellation point of-1 + i of 4/15 code rate in the QPSK constellation diagram, and the constellation points are displayed on the real number axis and the imaginary number axis as real number axis-1 and imaginary number axis 1. The OFDM symbols are then generated at the modulation module using the symbol stream and finally transmitted.
In this embodiment, the LDPC codeword is obtained by performing a specific LDPC encoding on the source-encoded bit stream, where the specific LDPC encoding can be implemented by using the prior art.
Specifically, the specific LDPC codeword is one of four, the four LDPC codewords are sub-block sizes of L × L (L is usually 360), and the code tables are as follows:
TABLE 1 Rate 4/15Nldpc＝16200,L×L＝360×360
TABLE 2 Rate 8/15Nldpc＝16200,L×L＝360×360,Q＝21
TABLE 3 Rate 11/15Nldpc＝16200,L×L＝360×360,Q＝12
TABLE 4 Rate 12/15Nldpc＝16200,L×L＝360×360,Q＝9
The coding method comprises the following steps:
splitting a source coded bit stream into information blocks, wherein each information block consists of K information bits and is represented as S ═ S (S)0,s1,...,sK-1). According to the specific LDPC encoding of FIG. 1, it is based on S ═ S0,s1,...,sK-1) Generating M parity bits P ═ (P)0,p1,...,pM-1) I.e. the N-bit code word Λ ═ (λ)0,λ1,...,λN-1) Where N + K + M Λ may also be represented as, Λ ═ s0,s1,...,sK-1,p0,p1,...,pM-1)。
The encoding steps are as follows:
1) initializing lambdai＝si，i＝0,1,...,K-1。pj＝0，j＝0,1,...,M-1
2) For information bit lambda0The check bits addressed to the first row number in the code table are accumulated.
3) For the next L-1 information bits, (typically L360), λ m1, 2.. said, L-1, each information bit is accumulated with a check bit addressed as y as follows:
y＝{x+(m mod 360)×Q}mod M
wherein x is and λ0The associated check bit address.
And wherein
M is the number of check bits and also the number of check matrix rows, and L is the size of the sub-block in the check matrix, typically 360.
4) For the L-th information bit lambdaLThe check bits are accumulated according to the second row digital address in the code table. Same for the L-th information bit lambdaLAnd accumulating the check bits according to the formula in the step 3) continuously for the next L-1 information bits, wherein x of the formulas in the three steps is the number of the second row in the code table.
5) Similarly, for the 2L, 3L, 4L … iL … information bits, the parity bits are accumulated according to the addresses of the 3 rd, 4 th, 5 th, …, (i +1) L …) rows in the code table, respectively, and the L-1 information bits after the information bits are accumulated according to the formula in step 3), note that at this time, x of the formula in the three steps corresponds to the row in the code table corresponding to the current iL information bit, such as the L-1 bits after the iL information bit, and the address of the corresponding x when the formula in step 3) is applied is the (i +1) th row in the code table.
6) After the step 5), the following operations are carried out:
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code words. Fig. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC codewords according to the present invention. Referring to fig. 2, the method for de-interleaving and de-mapping the LDPC codeword includes the steps of:
step S21: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding QPSK constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is a symbol stream obtained by the receiving end by receiving the interleaving mapping method of the LDPC code word;
step S22: dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving;
step S23: dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
step S24: performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
step S25: splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
step S26: and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
In this embodiment, the step S24 specifically includes: and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.
Claims (11)
1. An interleaving mapping method for LDPC code words is characterized by comprising the following steps:
carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to the length of 360 bits, and transforming the arrangement sequence of the bit sub-blocks according to corresponding bit exchange patterns to form the LDPC code word after the second bit interleaving;
dividing the LDPC code word after the second bit interleaving into two parts, writing the first part into a storage space according to the sequence of columns and reading the first part from the storage space according to the sequence of rows, writing the second part into the storage space according to the sequence of columns and reading the second part from the storage space according to the sequence of rows, and splicing the results of the two readings to obtain the LDPC code word after the third bit interleaving;
performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding QPSK constellation diagram to obtain a symbol stream; wherein the code length of the LDPC code word is 16200 bits, and the code rate is 4/15, 8/15, 11/15 or 12/15;
the bit-swapping patterns used are all:
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 7 9 1113 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 44，
wherein each value in the bitswap pattern represents a position of the bit sub-block before bitswap.
2. The interleaving mapping method of LDPC codewords according to claim 1, wherein the first bit interleaving of the check portions in the LDPC codeword to obtain the check bit stream comprises:
and writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.
3. The interleaving mapping method of LDPC codeword according to claim 1, wherein the code length of the LDPC codeword in the LDPC code table is 16200 bits, and the code rate is 4/15; the code table is as follows:
4. the interleaving mapping method of LDPC codeword according to claim 1, wherein the code length of the LDPC codeword in the LDPC code table is 16200 bits, and the code rate is 8/15; the code table is as follows:
5. the interleaving mapping method of LDPC codeword according to claim 1, wherein the code length of the LDPC codeword in the LDPC code table is 16200 bits, and the code rate is 11/15; the code table is as follows:
6. the interleaving mapping method of LDPC codeword according to claim 1, wherein the code length of the LDPC codeword in the LDPC code table is 16200 bits, and the code rate is 12/15; the code table is as follows:
7. the interleaving mapping method of LDPC codewords according to claim 1, characterized in that the constellation employed is:
8. the interleaving mapping method of LDPC codeword according to claim 1, wherein the length of the LDPC codeword after the second bit interleaving is 16200 bits, the first portion is 15840 bits, and the second portion is 360 bits.
9. The interleaving mapping method of LDPC codewords according to claim 1, wherein the number in the column order is 2 columns.
10. A method for de-interleaving and de-mapping LDPC code words is characterized by comprising the following steps:
carrying out soft demapping processing on the symbol stream soft value data according to a corresponding QPSK constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is a symbol stream obtained by a receiving end by receiving the interleaving mapping method of the LDPC code words according to claim 1;
dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving;
dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to the length of 360 bits, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data;
the bit-swapping patterns used are all:
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 7 9 1113 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 44，
wherein each value in the bitswap pattern represents a position of the bit sub-block before bitswap.
11. The method for deinterleaving and demapping an LDPC codeword according to claim 10, wherein the performing third bit deinterleaving on the bit soft value data corresponding to the check portion in the LDPC codeword in the bit soft value data after the second bit deinterleaving to obtain third bit deinterleaved bit soft value data includes:
and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
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