CN111624563A - Radar revolving stage school north control system - Google Patents
Radar revolving stage school north control system Download PDFInfo
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- CN111624563A CN111624563A CN202010440661.1A CN202010440661A CN111624563A CN 111624563 A CN111624563 A CN 111624563A CN 202010440661 A CN202010440661 A CN 202010440661A CN 111624563 A CN111624563 A CN 111624563A
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- 230000001360 synchronised effect Effects 0.000 claims description 4
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4004—Means for monitoring or calibrating of parts of a radar system
- G01S7/4026—Antenna boresight
- G01S7/403—Antenna boresight in azimuth, i.e. in the horizontal plane
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention relates to the technical field of radars, in particular to a radar rotary table north-checking control system with a north-checking function. The invention relates to a radar turntable north-checking control system.A clock module is an external clock module, and continuously inputs clock frequency signals for a position counter, a north-checking module, a data communication module, a data storage module and an azimuth pulse output module; the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module; the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter; and the north checking module is associated with the data storage module, acquires the current position signal and compares the current position signal with the originally stored position signal to check north. The command system is integrated with the existing command system, so that the command system has a north checking function, the north checking system does not need to be separately and independently designed, and the delay effect is greatly reduced based on FPGA (field programmable gate array) work.
Description
Technical Field
The invention relates to the technical field of radars, in particular to a radar rotary table north-checking control system with a north-checking function.
Background
In an airplane command system, in order to locate the position of an airplane and improve the safety performance of the airplane, a command system is generally arranged on the ground. The current command system has perfect self-checking, state monitoring and reporting functions; the turntable has the function of driving the turntable to move; the device has the function of sound alarm; the device has the local/remote control switching function; the device has the function of Ethernet communication UDP protocol; the control method has the function of receiving the control command of the upper computer through the Ethernet interface to control the turntable; the function of returning the working state and the fault information of the rotary table in real time through an Ethernet interface is provided; the emergency stop operation system has the function of realizing safety protection. The functions are integrated together, and positioning is performed by matching with a north calibrating system, so that the system is quite complicated, and a radar turntable north calibrating control system with a north calibrating function is needed.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a radar turntable north-checking control system with a north-checking function.
The technical scheme adopted by the invention is as follows: the radar rotary table north-checking control system comprises a position counter, a north-checking module, a data communication module, a data storage module and an azimuth pulse output module which are arranged in an FPGA and work in parallel; the external clock frequency doubling module is respectively connected with the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the external clock module is used for continuously inputting clock frequency signals for the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module;
the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter;
and the north checking module is associated with the data storage module, acquires the current position signal, compares the current position signal with the originally stored position signal and checks north.
In order to better realize the invention, the external clock frequency doubling module adopts an external active crystal oscillator as a clock source, and generates a global synchronous clock and a clock for generating output pulses through an FPGA internal phase-locking frequency doubling module.
In order to better realize the invention, the position counter module collects encoder signals for counting, the encoder is an incremental encoder, and output signals are square wave signals and zero signals with 90-degree phase difference.
After the encoder signals are quadrupled, 32768 positions exist in each circle, and 16384 counting pulse signals need to be generated in each circle by the radar host.
In order to better realize the invention, the square wave signals form a state machine, the state machine is subjected to up-down counting when the state of the state machine changes, and when a zero pulse signal appears, the counter value is cleared.
In order to better realize the invention, the counting operation is carried out when the state of the state machine is changed, and the counting operation is not carried out when the state is maintained or discontinuous change occurs.
In order to better realize the invention, the state is provided with the anti-jitter module, namely the state is confirmed when the state is judged to be the same in a plurality of continuous clock cycles.
In order to better implement the invention, the square wave signals are output according to a strict orthogonal relation.
In order to better implement the invention, the output process of the azimuth pulse output module comprises the following steps:
when the data of the position counter module changes, judging the rotation direction of the equipment;
if the rotation direction of the equipment is correct, the azimuth pulse output module outputs azimuth pulses comprising an azimuth counting pulse signal and an azimuth resetting pulse signal;
setting the azimuth counting pulse signal high, judging whether the counting passes through a relative zero point according to a zero-crossing mark of the counter, and setting the reset pulse signal high if the counting passes through the relative zero point; simultaneously, a clock timing counter starts to work;
after timing for 10 mus, the azimuth counting pulse signal and the azimuth resetting pulse signal are set low, the zero mark is cleared, and the enabling is finished.
In order to better realize the invention, the data communication module adopts RS485 serial communication.
The invention has the beneficial effects that: the invention relates to a radar turntable north-checking control system.A clock module is an external clock module, and continuously inputs clock frequency signals for a position counter, a north-checking module, a data communication module, a data storage module and an azimuth pulse output module; the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module; the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter; and the north checking module is associated with the data storage module, acquires the current position signal and compares the current position signal with the originally stored position signal to check north. The command system is integrated with the existing command system, so that the command system has a north checking function, the north checking system does not need to be separately and independently designed, and the delay effect is greatly reduced based on FPGA (field programmable gate array) work.
Drawings
In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
FIG. 1 is a schematic structural diagram of a radar turntable north-checking control system of the present invention;
FIG. 2 is a schematic diagram of a square wave signal and a zero position signal of the radar turntable north-checking control system of the present invention;
fig. 3 is a schematic diagram of a square wave signal of the radar turntable north-checking control system according to the present invention performing quadruple frequency.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which the invention pertains.
Example 1:
as shown in fig. 1 to 3, the radar turntable north-checking control system of the present invention includes a position counter, a north-checking module, a data communication module, a data storage module and an azimuth pulse output module, which are arranged in an FPGA and work in parallel; the external clock frequency doubling module is respectively connected with the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the external clock module is used for continuously inputting clock frequency signals for the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module;
the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter;
and the north checking module is associated with the data storage module, acquires the current position signal, compares the current position signal with the originally stored position signal and checks north. The invention relates to the technical field of radars, in particular to a radar rotary table north-checking control system with a north-checking function. The invention relates to a radar turntable north-checking control system.A clock module is an external clock module, and continuously inputs clock frequency signals for a position counter, a north-checking module, a data communication module, a data storage module and an azimuth pulse output module; the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module; the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter; and the north checking module is associated with the data storage module, acquires the current position signal and compares the current position signal with the originally stored position signal to check north. The command system is integrated with the existing command system, so that the command system has a north checking function, the north checking system does not need to be separately and independently designed, and the delay effect is greatly reduced based on FPGA (field programmable gate array) work. The invention collects the signals of the azimuth encoder, counts and converts the signals into 14-bit pulse signals required by a radar host, and outputs the signals through two level modes of RS422 and TTL; the system can perform RS485 serial communication with the PLC, receive the instruction of the PLC and return corresponding data; the positive north offset value can also be stored in the ferroelectric memory, and the current position can be corrected by positive north.
Example 2:
on the basis of the above embodiment, in order to further implement the present invention, the external clock frequency doubling module uses an external active crystal oscillator as a clock source, and generates a global synchronous clock and a clock for generating output pulses through the FPGA internal phase-locking frequency doubling module. The invention needs to output azimuth counting pulse signals and reset pulse signals, which are divided into TTL level and RS422 level, signals of each level adopt backup redundancy processing, wherein the azimuth counting pulse is 16384P/r, the reset pulse is 1P/r, the pulse width is 10 +/-0.5 mu s, the synchronization error among the counting pulses is not more than 50ns, and the synchronization error among the reset pulses is not more than 50 ns. The FPGA chip adopts an external active crystal oscillator as a clock source, the frequency is 50MHz, and a global synchronous clock (50MHz) and a clock (2MHz) for generating output pulses are generated through an FPGA internal phase-locking frequency-doubling module; in addition, a 57600Hz baud rate clock of the communication between the SCK and the RS485 of the ferroelectric memory of 1MHz is generated by the frequency division of the global clock in the program.
Example 3:
on the basis of the above embodiment, in order to further better implement the present invention, the position counter module collects encoder signals for counting, the encoder is an incremental encoder, and the output signals are square wave signals and zero signals with a 90-degree phase difference. The encoder is an incremental encoder, and the output signals are a square wave signal A, B and a zero position signal Z which are different by 90 degrees, as shown in fig. 2.
Example 4:
on the basis of the above embodiment, in order to further better implement the present invention, after the encoder signals are quadrupled, 32768 positions are provided for each circle, and 16384 count pulse signals are required for each circle by the radar host; the square wave signals form a state machine, the state machine is subjected to up-down counting when the state of the state machine changes, and when a zero pulse signal appears, the value of the counter is cleared; and counting operation is carried out when the state of the state machine is changed, and the counting operation is not carried out when the state is maintained unchanged or discontinuous change occurs.
In FPGA, A, B signal constitutes state machine, which is changed to count up and down, and when zero pulse signal Z appears, the counter is cleared. Because the encoder is 8192P/r (13 bits), the quadruple count is 15 bits, i.e. 32768 can be counted per turn. The state change of the state machine can only change according to the state and the sequence shown in the figure strictly, the counting operation is carried out when the state of the state machine changes, and the counting operation is not carried out when the state is maintained unchanged or discontinuous change (for example, the state is changed from 00 to 11 directly or from 01 to 10 directly) (when 2-bit simultaneous jump occurs, the abnormal situation of the encoder is shown, namely, the orthogonal relation does not exist any more).
The state of the state machine only changes 1 bit at each time, and the situation that the 2-bit state changes simultaneously can not occur. The anti-jitter function can be added, namely, the state is confirmed when the state is judged to be the same in a plurality of continuous clock cycles. When the angular speed changes, only the period of the output pulse changes, and the duty ratio is kept unchanged, and only when the rotation direction changes, the duty ratio of the output pulse of the A or B path changes. When the device rotates, A, B signals are output in strict quadrature relationship; when the two circuits are still, the relationship between the two circuits is uncertain, for example, the A circuit has pulse output, and the B circuit maintains a fixed state. When the counter counts zero crossing, a zero crossing mark is generated and provided for the azimuth pulse generation module to use. Different numbers of pulse signals are generated in the data module depending on the current encoder position. After the encoder signal is quadrupled, 32768 positions (15 bits) are needed in each circle, and the number of the counting pulse signals required by the radar host is 16384 (14 bits) in each circle, so that the encoder generates one counting pulse every 2 positions (1 bit), and the pulse width is generated by a 2MHz clock to be 10 mus wide (20 clock periods) according to the protocol requirement. The radar rotary table rotates all the time in the same direction when working normally, if the middle part has a rotation condition, a new counting pulse is not generated in the rotation process, so that redundant pulses are prevented from occurring in the counting pulse, and the number of counting pulses in each circle is wrong.
Example 5:
on the basis of the above embodiments, in order to further implement the present invention, the anti-jitter module is disposed in the state, that is, the state is confirmed only when the state is determined to be the same for several consecutive clock cycles.
Example 6:
on the basis of the above embodiment, in order to further better implement the present invention, the output process of the azimuth pulse output module includes the following steps:
when the data of the position counter module changes, judging the rotation direction of the equipment;
if the rotation direction of the equipment is correct, the azimuth pulse output module outputs azimuth pulses comprising an azimuth counting pulse signal and an azimuth resetting pulse signal;
setting the azimuth counting pulse signal high, judging whether the counting passes through a relative zero point according to a zero-crossing mark of the counter, and setting the reset pulse signal high if the counting passes through the relative zero point; simultaneously, a clock timing counter starts to work;
after timing for 10 mus, the azimuth counting pulse signal and the azimuth resetting pulse signal are set low, the zero mark is cleared, and the enabling is finished.
Azimuth Count Pulse (ACP) and Azimuth Reset Pulse (ARP) generation methods:
1) when the data of the counter changes, judging the rotation direction of the equipment;
2) enabling the azimuth pulse generation module when the rotation direction of the equipment is correct;
3) setting the ACP signal high, and meanwhile, judging whether the counting is zero-crossing (passes through a relative zero point) according to a zero-crossing mark of the counter, if so, setting the ARP signal high; simultaneously, a clock timing counter starts to work;
after timing for 10 mus, the ACP and ARP signals are set low, the zero mark is cleared, and the enabling is finished.
Example 7:
on the basis of the above embodiment, in order to further better implement the present invention, the data communication module adopts RS485 serial communication. The RS485 serial communication is a data communication mode between a data module and a PLC controller, controls the internal communication of the extension, has the baud rate of 56700Hz, a 1-bit start bit, an 8-bit data bit and a 1-bit stop bit, and has no parity check. Adopting a two-way asynchronous mode of one question and one answer, wherein the received instruction is 6 bytes, and the returned data is 7 or 12 bytes, which is as follows:
the data module RS485 receives an instruction:
a) return data format
The data module has two types of return data, one is return data when a normal instruction (correction or data reading) is received, and the other is return data when a debugging instruction is received. The method comprises the following specific steps:
note: (1) instruction conflict: both correction and data read are enabled in the same instruction.
(2) An invalid instruction: neither correction nor reading of data is enabled in the instruction.
(3) The absolute zero is valid: indicating that after power up, the encoder has found the absolute zero.
(4) The true north position is valid: indicating that after power up, the system has read the last valid north position from memory.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.
Claims (10)
1. Radar revolving stage school north control system, its characterized in that: the device comprises a position counter, a north checking module, a data communication module, a data storage module and an azimuth pulse output module which are arranged in an FPGA and work in parallel; the external clock frequency doubling module is respectively connected with the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the external clock module is used for continuously inputting clock frequency signals for the position counter, the north checking module, the data communication module, the data storage module and the azimuth pulse output module;
the position counter module records an encoder signal input by the encoder according to the clock frequency signal, converts the encoder signal into a position signal and stores the position signal into the data storage module;
the azimuth pulse output module outputs a pulse signal according to the position signal recorded by the position counter;
and the north checking module is associated with the data storage module, acquires the current position signal, compares the current position signal with the originally stored position signal and checks north.
2. The radar turntable north-checking control system according to claim 1, wherein: the external clock frequency doubling module adopts an external active crystal oscillator as a clock source, and generates a global synchronous clock and a clock for generating output pulses through the FPGA internal phase-locking frequency doubling module.
3. The radar turntable north-checking control system according to claim 1, wherein: the position counter module collects encoder signals to count, the encoder is an incremental encoder, and output signals are square wave signals and zero signals with 90-degree phase difference.
4. The radar turntable north-checking control system according to claim 3, wherein: after the encoder signals are quadrupled, 32768 positions exist in each circle, and 16384 counting pulse signals need to be generated in each circle by the radar host.
5. The radar turntable north-checking control system according to claim 4, wherein: the square wave signals form a state machine, the state machine is subjected to up-down counting when the state of the state machine changes, and when a zero pulse signal appears, the counter value is cleared.
6. The radar turntable north-checking control system according to claim 5, wherein: and counting operation is carried out when the state of the state machine is changed, and counting operation is not carried out when the state is maintained unchanged or discontinuous change occurs.
7. The radar turntable north-checking control system of claim 6, wherein: the state is provided with an anti-jitter module, namely the state is confirmed when the state is judged to be the same in a plurality of continuous clock cycles.
8. The radar turntable north-checking control system according to claim 3, wherein: the square wave signals are output according to an orthogonal relation strictly.
9. The radar turntable north-checking control system according to claim 1, wherein: the output process of the azimuth pulse output module comprises the following steps:
when the data of the position counter module changes, judging the rotation direction of the equipment;
if the rotation direction of the equipment is correct, the azimuth pulse output module outputs azimuth pulses comprising an azimuth counting pulse signal and an azimuth resetting pulse signal;
setting the azimuth counting pulse signal high, judging whether the counting passes through a relative zero point according to a zero-crossing mark of the counter, and setting the reset pulse signal high if the counting passes through the relative zero point; simultaneously, a clock timing counter starts to work;
after timing for 10 mus, the azimuth counting pulse signal and the azimuth resetting pulse signal are set low, the zero mark is cleared, and the enabling is finished.
10. The radar turntable north-checking control system according to claim 1, wherein: and the data communication module adopts RS485 serial communication.
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CN202310348911.2A CN116359864A (en) | 2020-05-22 | 2020-05-22 | Radar turntable north-correcting control system |
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