CN111614410A - Transmitting circuit and transmitting method for ATC (automatic train control) and DME (DME) testing system - Google Patents

Transmitting circuit and transmitting method for ATC (automatic train control) and DME (DME) testing system Download PDF

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Publication number
CN111614410A
CN111614410A CN202010504991.2A CN202010504991A CN111614410A CN 111614410 A CN111614410 A CN 111614410A CN 202010504991 A CN202010504991 A CN 202010504991A CN 111614410 A CN111614410 A CN 111614410A
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signal
switch
calibration
signal transmitting
module
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CN111614410B (en
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周科吉
曹勇
梁木生
文红
谢礼军
吴泳帅
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Chengdu Jiujin Technology Co ltd
University of Electronic Science and Technology of China
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Chengdu Jiujin Technology Co ltd
University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/11Monitoring; Testing of transmitters for calibration
    • GPHYSICS
    • G08SIGNALLING
    • G08GTRAFFIC CONTROL SYSTEMS
    • G08G5/00Traffic control systems for aircraft, e.g. air-traffic control [ATC]
    • GPHYSICS
    • G08SIGNALLING
    • G08GTRAFFIC CONTROL SYSTEMS
    • G08G5/00Traffic control systems for aircraft, e.g. air-traffic control [ATC]
    • G08G5/0043Traffic management of multiple aircrafts from the ground

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses a transmitting circuit and a transmitting method for an ATC (automatic train control) and DME (DME) testing system, wherein the circuit comprises an FPGA (field programmable gate array) module, a DAC (digital-to-analog converter) module, a calibration output port and a plurality of signal transmitting channels; the FPGA module is used for generating calibration signals and respectively transmitting the calibration signals to each signal transmitting channel in the process of calibrating each signal transmitting channel, outputting the calibration signals through a calibration signal output port after passing through each signal transmitting channel, acquiring signals output by the calibration signal output port, comparing the signals with the generated calibration signals and generating an offset compensation table of each signal transmitting channel; when signal transmission is carried out, the transmitted signals are compensated in advance based on the offset compensation table of each signal transmitting channel, and then the signals are sent to the outside through the signal transmitting channels and the corresponding signal output interfaces. The invention can obtain the offset compensation table of each path of transmitting channel so as to calibrate the signal to be transmitted before the signal is transmitted, thereby effectively improving the accuracy of signal transmission.

Description

Transmitting circuit and transmitting method for ATC (automatic train control) and DME (DME) testing system
Technical Field
The invention relates to signal transmission calibration of an ATC (automatic train control) and DME (DME) test system, in particular to a transmission circuit and a transmission method for the ATC and DME test system.
Background
An Air Traffic Control System (ATC System for short) is an Air Traffic Control and management System widely used in the aviation department. The ATC system is mainly used for managing and controlling various flight affairs, effectively adjusting a flight affair plan, and controlling and preventing flight traffic accidents. The on-board unit responds to the interrogation signal by transmitting an interrogation signal via the ground system, providing the air traffic controller with information (typically A, C mode) regarding the location and identity of the aircraft within the airspace. With the increasingly busy air traffic, the functional requirements on the system are more and more, and the defects of the A/C mode single pulse technology cannot meet the requirements of new aviation communication.
A Distance measuring system (DME for short) can provide Distance information of each approaching airplane relative to a guide point, and the approaching, landing and sliding of each approaching airplane according to a required track in the full-automatic approaching and landing process are guaranteed. At present, a precision distance measurement System (DME/P) is an important component of a Microwave Landing System (MLS), and precision distance measurement airborne equipment cooperates with Microwave Landing airborne equipment to complete approach Landing of an aircraft, that is, when the aircraft uses the MLS to perform approach Landing, the DME/P is required to provide precision distance information at each stage of approach. In the DME system, ground equipment receives an inquiry signal sent by airborne equipment, and replies a response signal to the airborne equipment according to the inquiry signal to complete a ranging function.
The ATC system and the DME system are special, real-time and safe aviation major systems, and have high requirements on the performance of the systems, so that the quality guarantee of the systems has high requirements. With the continuous and high-speed development of the air transportation industry, the number of aerial airplanes is increased, the demand of equipment of an ATC system and a DME system is continuously increased, the airborne electronic equipment becomes more and more precise, the testing requirement on the airborne electronic equipment is higher and higher, and the accuracy of transmitting circuits of the ATC system and the DME system is very important.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a transmitting circuit and a transmitting method for an ATC (automatic train control) and DME (DME) testing system, which can acquire an offset compensation table of each transmitting channel so as to calibrate a signal to be transmitted before signal transmission and effectively improve the accuracy of signal transmission.
The invention aims to realize the technical scheme that the transmitting circuit for the ATC and DME testing system comprises an FPGA module, a DAC module, a calibration output port and a plurality of signal transmitting channels;
each path of signal transmitting channel comprises a filtering control module, an output amplitude control module and a change-over switch, wherein the input end of the filtering control module is connected with the FPGA module through a DAC module, the output end of the filtering control module is connected with the change-over switch through the output amplitude control module, and the first path of output end of the change-over switch is connected with the signal output port of the path of signal transmitting channel;
the input end of the calibration output port is connected to the output end of the channel selection switch through the gating switch, and the input end of the channel selection switch is respectively connected with the second output ends of the transfer switches in the signal transmitting channels;
the FPGA module is used for generating calibration signals and respectively transmitting the calibration signals to each signal transmitting channel in the process of calibrating each signal transmitting channel, outputting the calibration signals through a calibration signal output port after passing through each signal transmitting channel, acquiring signals output by the calibration signal output port, comparing the signals with the generated calibration signals and generating an offset compensation table of each signal transmitting channel; when signal transmission is carried out, the transmitted signals are compensated in advance based on the offset compensation table of each signal transmitting channel, and then the signals are sent to the outside through the signal transmitting channels and the corresponding signal output interfaces.
The DAC module comprises a plurality of paths of DA conversion units, the DA conversion units are the same in number with the signal transmitting channels and are in one-to-one correspondence, the input end of each path of DA conversion unit is connected with the FPGA module, and the output end of each path of DA conversion unit is connected with the filtering control module in the corresponding signal transmitting channel.
The filtering control module comprises a low-pass filter, a first amplifier, a first single-pole multi-throw switch, a second single-pole multi-throw switch and a plurality of band-pass filters with different passbands; the input end of the low-pass filter is connected with the DAC module, the output end of the low-pass filter is connected with a first amplifier, the output end of the first amplifier is respectively connected with each band-pass filter through a first single-pole multi-throw switch, and the output end of each band-pass filter is connected with the output amplitude control module through a second single-pole multi-throw switch.
The output amplitude control module comprises three amplitude control units which are sequentially connected, and each amplitude control unit comprises a first single-pole double-throw switch, a second amplifier and an amplitude controller;
in each amplitude control unit, the output end of the amplitude controller is connected with a first single-pole double-throw switch, the first output end of the first single-pole double-throw switch is connected with the first input end of a second single-pole double-throw switch through a second amplifier, and the second output end of the first single-pole double-throw switch is connected with the second input end of the second single-pole double-throw switch;
in the first amplitude control unit, the input end of an amplitude controller is connected with the output end of a filtering control module; in the second amplitude control unit and the third amplitude control unit, the input end of the amplitude controller is connected with the output end of the second single-pole double-throw switch in the last amplitude control unit; in the third amplitude control unit, the output end of the second single-pole double-throw switch and the input end of the change-over switch.
The channel selection switch comprises a third single-pole multi-throw switch, the input end of the third single-pole multi-throw switch is respectively connected with the second path of output end of the change-over switch in each channel, and the output end of the third single-pole multi-throw switch is connected with the gating switch.
The gate switch comprises a third single-pole double-throw switch and a load resistor, one input end of the third single-pole double-throw switch is connected with the output end of the channel selection switch, the other input end of the third single-pole double-throw switch is grounded through the load resistor, and the output end of the third single-pole double-throw switch is connected with the calibration output port.
The transmitting circuit further comprises an ADC module, wherein the input end of the ADC module is connected with the calibration signal output port, and the output end of the ADC module is connected with the FPGA module.
A signal transmission method for an ATC and DME test system, comprising a calibration step S1 and a signal transmission step S2;
the calibration step S1 includes the following sub-steps:
s101, controlling the gating switch to communicate the calibration signal output port with a channel selection switch;
s102, controlling the input end of a channel selection switch to be switched to any one signal transmitting channel, and simultaneously controlling the action of a change-over switch of the signal transmitting channel to enable the change-over switch to be communicated with the input end of the channel selection switch;
s103, the FPGA module generates a calibration signal, and the calibration signal is converted by the DAC module and then transmitted to a signal transmitting channel which is connected with a channel selection switch;
s104, after the signal transmitting channel carries out filtering control conditioning and amplitude control conditioning on the signal, the signal is transmitted to a calibration signal output port through a channel selection switch and a gating switch;
s105, converting the signal output by the calibration signal output port through an ADC module, and then transmitting the converted signal back to the FPGA module; the FPGA module compares the signal output by the ADC module with the generated calibration signal to obtain an offset compensation table of the current signal transmitting channel;
and S106, switching the channel selection switch to each signal transmitting channel in sequence, and repeating the steps S102-S105 in each switching process to obtain an offset compensation table of each signal transmitting channel.
The signal transmitting step S2 includes the following sub-steps:
s201, controlling the gating switch to connect the calibration signal output port with a load resistor;
s202, controlling the action of the change-over switch of each signal transmitting channel to enable the change-over switch of each signal transmitting channel to be communicated with the signal output port;
s203, the FPGA module generates a signal to be transmitted, and compensates the signal to be transmitted by respectively utilizing the offset compensation table of each signal transmission channel to obtain a transmission signal compensated by each signal transmission channel;
and S204, converting the compensated signal of each signal transmitting channel through the DAC module, transmitting the converted signal to the corresponding signal transmitting channel for processing, and outputting the processed signal to the outside through a signal output port connected with the signal transmitting channel.
The invention has the beneficial effects that: the offset compensation table of each path of transmitting channel can be obtained, so that the signals to be transmitted are conveniently calibrated before the signals are transmitted, and the accuracy of signal transmission is effectively improved.
Drawings
FIG. 1 is a functional block diagram of the present invention;
FIG. 2 is a flow chart of the method of the present invention.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
As shown in fig. 1, a transmitting circuit for an ATC and DME testing system includes an FPGA module, a DAC module, a calibration output port, and multiple signal transmitting channels;
each path of signal transmitting channel comprises a filtering control module, an output amplitude control module and a change-over switch, wherein the input end of the filtering control module is connected with the FPGA module through a DAC module, the output end of the filtering control module is connected with the change-over switch through the output amplitude control module, and the first path of output end of the change-over switch is connected with the signal output port of the path of signal transmitting channel;
the input end of the calibration output port is connected to the output end of the channel selection switch through the gating switch, and the input end of the channel selection switch is respectively connected with the second output ends of the transfer switches in the signal transmitting channels;
the FPGA module is used for generating calibration signals and respectively transmitting the calibration signals to each signal transmitting channel in the process of calibrating each signal transmitting channel, outputting the calibration signals through a calibration signal output port after passing through each signal transmitting channel, acquiring signals output by the calibration signal output port, comparing the signals with the generated calibration signals and generating an offset compensation table of each signal transmitting channel; when signal transmission is carried out, the transmitted signals are compensated in advance based on the offset compensation table of each signal transmitting channel, and then the signals are sent to the outside through the signal transmitting channels and the corresponding signal output interfaces.
The DAC module comprises a plurality of paths of DA conversion units, the DA conversion units are the same in number with the signal transmitting channels and are in one-to-one correspondence, the input end of each path of DA conversion unit is connected with the FPGA module, and the output end of each path of DA conversion unit is connected with the filtering control module in the corresponding signal transmitting channel.
The filtering control module comprises a low-pass filter, a first amplifier, a first single-pole multi-throw switch, a second single-pole multi-throw switch and a plurality of band-pass filters with different passbands; the input end of the low-pass filter is connected with the DAC module, the output end of the low-pass filter is connected with a first amplifier, the output end of the first amplifier is respectively connected with each band-pass filter through a first single-pole multi-throw switch, and the output end of each band-pass filter is connected with the output amplitude control module through a second single-pole multi-throw switch.
The output amplitude control module comprises three amplitude control units which are sequentially connected, and each amplitude control unit comprises a first single-pole double-throw switch, a second amplifier and an amplitude controller;
in each amplitude control unit, the output end of the amplitude controller is connected with a first single-pole double-throw switch, the first output end of the first single-pole double-throw switch is connected with the first input end of a second single-pole double-throw switch through a second amplifier, and the second output end of the first single-pole double-throw switch is connected with the second input end of the second single-pole double-throw switch;
in the first amplitude control unit, the input end of an amplitude controller is connected with the output end of a filtering control module; in the second amplitude control unit and the third amplitude control unit, the input end of the amplitude controller is connected with the output end of the second single-pole double-throw switch in the last amplitude control unit; in the third amplitude control unit, the output end of the second single-pole double-throw switch and the input end of the change-over switch.
The channel selection switch comprises a third single-pole multi-throw switch, the input end of the third single-pole multi-throw switch is respectively connected with the second path of output end of the change-over switch in each channel, and the output end of the third single-pole multi-throw switch is connected with the gating switch.
The gate switch comprises a third single-pole double-throw switch and a load resistor, one input end of the third single-pole double-throw switch is connected with the output end of the channel selection switch, the other input end of the third single-pole double-throw switch is grounded through the load resistor, and the output end of the third single-pole double-throw switch is connected with the calibration output port.
The transmitting circuit further comprises an ADC module, wherein the input end of the ADC module is connected with the calibration signal output port, and the output end of the ADC module is connected with the FPGA module.
As shown in fig. 2, a signal transmission method for an ATC and DME test system includes a calibration step S1 and a signal transmission step S2;
the calibration step S1 includes the following sub-steps:
s101, controlling the gating switch to communicate the calibration signal output port with a channel selection switch;
s102, controlling the input end of a channel selection switch to be switched to any one signal transmitting channel, and simultaneously controlling the action of a change-over switch of the signal transmitting channel to enable the change-over switch to be communicated with the input end of the channel selection switch;
s103, the FPGA module generates a calibration signal, and the calibration signal is converted by the DAC module and then transmitted to a signal transmitting channel which is connected with a channel selection switch;
s104, after the signal transmitting channel carries out filtering control conditioning and amplitude control conditioning on the signal, the signal is transmitted to a calibration signal output port through a channel selection switch and a gating switch;
s105, converting the signal output by the calibration signal output port through an ADC module, and then transmitting the converted signal back to the FPGA module; the FPGA module compares the signal output by the ADC module with the generated calibration signal to obtain an offset compensation table of the current signal transmitting channel;
and S106, switching the channel selection switch to each signal transmitting channel in sequence, and repeating the steps S102-S105 in each switching process to obtain an offset compensation table of each signal transmitting channel.
The signal transmitting step S2 includes the following sub-steps:
s201, controlling the gating switch to connect the calibration signal output port with a load resistor;
s202, controlling the action of the change-over switch of each signal transmitting channel to enable the change-over switch of each signal transmitting channel to be communicated with the signal output port;
s203, the FPGA module generates a signal to be transmitted, and compensates the signal to be transmitted by respectively utilizing the offset compensation table of each signal transmission channel to obtain a transmission signal compensated by each signal transmission channel;
and S204, converting the compensated signal of each signal transmitting channel through the DAC module, transmitting the converted signal to the corresponding signal transmitting channel for processing, and outputting the processed signal to the outside through a signal output port connected with the signal transmitting channel.
It is to be understood that the above-described embodiments are illustrative only and not restrictive of the broad invention, and that various other modifications and changes in light thereof will be suggested to persons skilled in the art based upon the above teachings. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the spirit or scope of the invention.

Claims (8)

1. A transmitter circuit for an ATC and DME test system, characterized by: the device comprises an FPGA module, a DAC module, a calibration output port and a plurality of signal transmitting channels;
each path of signal transmitting channel comprises a filtering control module, an output amplitude control module and a change-over switch, wherein the input end of the filtering control module is connected with the FPGA module through a DAC module, the output end of the filtering control module is connected with the change-over switch through the output amplitude control module, and the first path of output end of the change-over switch is connected with the signal output port of the path of signal transmitting channel;
the input end of the calibration output port is connected to the output end of the channel selection switch through the gating switch, and the input end of the channel selection switch is respectively connected with the second output ends of the transfer switches in the signal transmitting channels;
the FPGA module is used for generating calibration signals and respectively transmitting the calibration signals to each signal transmitting channel in the process of calibrating each signal transmitting channel, outputting the calibration signals through a calibration signal output port after passing through each signal transmitting channel, acquiring signals output by the calibration signal output port, comparing the signals with the generated calibration signals and generating an offset compensation table of each signal transmitting channel; when signal transmission is carried out, the transmitted signals are compensated in advance based on the offset compensation table of each signal transmitting channel, and then the signals are sent to the outside through the signal transmitting channels and the corresponding signal output interfaces.
2. The transmit circuit for an ATC and DME test system of claim 1, wherein: the DAC module comprises a plurality of paths of DA conversion units, the DA conversion units are the same in number with the signal transmitting channels and are in one-to-one correspondence, the input end of each path of DA conversion unit is connected with the FPGA module, and the output end of each path of DA conversion unit is connected with the filtering control module in the corresponding signal transmitting channel.
3. The transmit circuit for an ATC and DME test system of claim 1, wherein: the filtering control module comprises a low-pass filter, a first amplifier, a first single-pole multi-throw switch, a second single-pole multi-throw switch and a plurality of band-pass filters with different passbands; the input end of the low-pass filter is connected with the DAC module, the output end of the low-pass filter is connected with a first amplifier, the output end of the first amplifier is respectively connected with each band-pass filter through a first single-pole multi-throw switch, and the output end of each band-pass filter is connected with the output amplitude control module through a second single-pole multi-throw switch.
4. The transmit circuit for an ATC and DME test system of claim 1, wherein: the output amplitude control module comprises three amplitude control units which are sequentially connected, and each amplitude control unit comprises a first single-pole double-throw switch, a second amplifier and an amplitude controller;
in each amplitude control unit, the output end of the amplitude controller is connected with a first single-pole double-throw switch, the first output end of the first single-pole double-throw switch is connected with the first input end of a second single-pole double-throw switch through a second amplifier, and the second output end of the first single-pole double-throw switch is connected with the second input end of the second single-pole double-throw switch;
in the first amplitude control unit, the input end of an amplitude controller is connected with the output end of a filtering control module; in the second amplitude control unit and the third amplitude control unit, the input end of the amplitude controller is connected with the output end of the second single-pole double-throw switch in the last amplitude control unit; in the third amplitude control unit, the output end of the second single-pole double-throw switch and the input end of the change-over switch.
5. The transmit circuit for an ATC and DME test system of claim 1, wherein: the channel selection switch comprises a third single-pole multi-throw switch, the input end of the third single-pole multi-throw switch is respectively connected with the second path of output end of the change-over switch in each channel, and the output end of the third single-pole multi-throw switch is connected with the gating switch.
6. The transmit circuit for an ATC and DME test system of claim 1, wherein: the gate switch comprises a third single-pole double-throw switch and a load resistor, one input end of the third single-pole double-throw switch is connected with the output end of the channel selection switch, the other input end of the third single-pole double-throw switch is grounded through the load resistor, and the output end of the third single-pole double-throw switch is connected with the calibration output port.
7. The transmit circuit for an ATC and DME test system of claim 1, wherein: the transmitting circuit further comprises an ADC module, wherein the input end of the ADC module is connected with the calibration signal output port, and the output end of the ADC module is connected with the FPGA module.
8. A signal transmission method for an ATC and DME test system using the transmission circuit of any one of claims 1 to 7, wherein: comprises a calibration step S1 and a signal transmission step S2;
the calibration step S1 includes the following sub-steps:
s101, controlling the gating switch to communicate the calibration signal output port with a channel selection switch;
s102, controlling the input end of a channel selection switch to be switched to any one signal transmitting channel, and simultaneously controlling the action of a change-over switch of the signal transmitting channel to enable the change-over switch to be communicated with the input end of the channel selection switch;
s103, the FPGA module generates a calibration signal, and the calibration signal is converted by the DAC module and then transmitted to a signal transmitting channel which is connected with a channel selection switch;
s104, after the signal transmitting channel carries out filtering control conditioning and amplitude control conditioning on the signal, the signal is transmitted to a calibration signal output port through a channel selection switch and a gating switch;
s105, converting the signal output by the calibration signal output port through an ADC module, and then transmitting the converted signal back to the FPGA module; the FPGA module compares the signal output by the ADC module with the generated calibration signal to obtain an offset compensation table of the current signal transmitting channel;
s106, switching the channel selection switch to each signal transmitting channel in sequence, and repeating the steps S102-S105 in each switching process to obtain an offset compensation table of each signal transmitting channel:
the signal transmitting step S2 includes the following sub-steps:
s201, controlling the gating switch to connect the calibration signal output port with a load resistor;
s202, controlling the action of the change-over switch of each signal transmitting channel to enable the change-over switch of each signal transmitting channel to be communicated with the signal output port;
s203, the FPGA module generates a signal to be transmitted, and compensates the signal to be transmitted by respectively utilizing the offset compensation table of each signal transmission channel to obtain a transmission signal compensated by each signal transmission channel;
and S204, converting the compensated signal of each signal transmitting channel through the DAC module, transmitting the converted signal to the corresponding signal transmitting channel for processing, and outputting the processed signal to the outside through a signal output port connected with the signal transmitting channel.
CN202010504991.2A 2020-06-05 2020-06-05 Transmitting circuit and transmitting method for ATC (automatic train control) and DME (DME) testing system Active CN111614410B (en)

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US9577708B1 (en) * 2014-10-21 2017-02-21 Marvell International Ltd. Systems and methods for a twisted pair transceiver with correlation detection
CN107994958A (en) * 2017-11-27 2018-05-04 成都九洲迪飞科技有限责任公司 A kind of the channel phase consistency debugging system and method for broadband detecting receiver
CN108111184A (en) * 2016-11-23 2018-06-01 北京遥感设备研究所 A kind of ultra wide band compact radio frequency component

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2774088A1 (en) * 2011-04-14 2012-10-14 Thales Method for locating aircraft which is independent of any satellite navigation system
US9577708B1 (en) * 2014-10-21 2017-02-21 Marvell International Ltd. Systems and methods for a twisted pair transceiver with correlation detection
CN105162536A (en) * 2015-08-21 2015-12-16 西安空间无线电技术研究所 System and method for correcting on-orbit amplitude phase of phased-array antenna
CN108111184A (en) * 2016-11-23 2018-06-01 北京遥感设备研究所 A kind of ultra wide band compact radio frequency component
CN107994958A (en) * 2017-11-27 2018-05-04 成都九洲迪飞科技有限责任公司 A kind of the channel phase consistency debugging system and method for broadband detecting receiver

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