CN111584368A - Method for forming concave points at top end of high-density micro indium column array for infrared focal plane device - Google Patents
Method for forming concave points at top end of high-density micro indium column array for infrared focal plane device Download PDFInfo
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- CN111584368A CN111584368A CN202010324633.3A CN202010324633A CN111584368A CN 111584368 A CN111584368 A CN 111584368A CN 202010324633 A CN202010324633 A CN 202010324633A CN 111584368 A CN111584368 A CN 111584368A
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- top end
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- focal plane
- column array
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- 229910052738 indium Inorganic materials 0.000 title claims abstract description 29
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000010437 gem Substances 0.000 claims description 16
- 229910001751 gemstone Inorganic materials 0.000 claims description 16
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 14
- 239000011135 tin Substances 0.000 claims description 14
- 229910052718 tin Inorganic materials 0.000 claims description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 239000011651 chromium Substances 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 6
- 229910052594 sapphire Inorganic materials 0.000 claims description 5
- 239000010980 sapphire Substances 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 238000005520 cutting process Methods 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 2
- 238000001035 drying Methods 0.000 claims description 2
- 238000011049 filling Methods 0.000 claims description 2
- 238000011065 in-situ storage Methods 0.000 claims description 2
- 238000001659 ion-beam spectroscopy Methods 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000001771 vacuum deposition Methods 0.000 claims description 2
- 238000003466 welding Methods 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000007738 vacuum evaporation Methods 0.000 description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 2
- 229910000661 Mercury cadmium telluride Inorganic materials 0.000 description 2
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910000846 In alloy Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- MCMSPRNYOJJPIZ-UHFFFAOYSA-N cadmium;mercury;tellurium Chemical compound [Cd]=[Te]=[Hg] MCMSPRNYOJJPIZ-UHFFFAOYSA-N 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- GPYPVKIFOKLUGD-UHFFFAOYSA-N gold indium Chemical compound [In].[Au] GPYPVKIFOKLUGD-UHFFFAOYSA-N 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Ceramic Engineering (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
The invention discloses a method for forming concave points at the top end of a high-density micro indium column array for an infrared focal plane device. The invention is characterized in that; the technology is mature, the use is novel, the difficulty and the problem of the hybrid interconnection of the infrared focal plane devices are well solved, and the requirements of the area array devices can be better met.
Description
Technical Field
The invention relates to the field of semiconductor devices, in particular to the field of manufacturing of infrared focal plane array devices. In particular to a method for forming concave points at the top end of a high-density micro indium column array on a silicon (Si) signal processing circuit chip and a sapphire circuit substrate chip in the manufacturing of an infrared focal plane array device.
Technical Field
One of the main performance parameters of an infrared focal plane array device is its imaging spatial resolution. The imaging spatial resolution characteristics of an infrared focal plane array device depend on the number of photosensitive elements included and their arrangement. An M x N photo-sensitive element infrared focal plane array device contains M x N (M and N are positive integers) pixels.
The infrared focal plane array device mainly adopts a hybrid structure, and the hybrid structure realizes mechanical and electrical connection of a manufactured MxN photosensitive element array chip and a silicon signal processing circuit chip with MxN input nodes through an indium column array, so that signal sensitivity, signal reading and electronic scanning are completed in one device. The hybrid structure has the advantages that the infrared detector array chip and the silicon signal processing circuit can be respectively subjected to process improvement and performance selection, so that the overall performance of the infrared focal plane array device is ensured to be optimized. However, the realization of the hybrid structure is difficult, and one of the key points is to grow indium column arrays with high density, fine diameter, sufficient height and good consistency on the infrared detector array chip and the silicon signal processing circuit chip respectively so as to perform hybrid interconnection.
With the development of the infrared focal plane device manufacturing industry, two-dimensional staring type 640 x 512-element, 1024 x 1024-element and above and one-dimensional scanning type 2048 x 1-element and above indium column arrays are prepared on a detector array chip, a silicon CMOS read-out circuit chip and a sapphire circuit substrate which are prepared from materials such as mercury cadmium telluride (HgCdTe), indium gallium arsenide (InGaAs), gallium nitride (GaN) and the like, the top ends of the indium columns are made into concave points, the requirement of mixing and interconnecting is facilitated, and the reliability is improved more firmly.
The technical requirements for forming the top concave points of the high-density fine indium column array for the infrared focal plane device comprise certain scale sizes, such as 128 × 128 yuan, 256 × 256 yuan, 640 × 512 yuan and the like, and high density, such as (2 × 10 yuan)4～1×105) Per cm2(ii) a Of very small diameter, e.g.
(16-18) um; sufficient height and uniformity, e.g., (8-15) um, with height uniformity of + -1 um; sufficient recess depth, e.g., (5-7) um.
Disclosure of Invention
The invention aims to provide a preparation method for forming concave points at the top end of a high-density fine indium column array of an infrared focal plane device compatible with a common silicon integrated circuit process, which is used for meeting the requirement of blending and interconnection of the infrared focal plane device.
The preparation method of the high-density micro indium column array top concave point molding is realized by the following technical process:
preparing a chip; cleaning the surface, coating thick photoresist, controlling the temperature of an oven to dry the chip, exposing and developing, depositing an indium layer by vacuum evaporation, stripping the redundant indium layer by a dry method, washing the thick photoresist coated in the previous period by acetone, and forming the indium column array.
Preparing a baibao stone sheet tin sharp column; taking a white gem piece with the thickness of more than 1 mm, cutting according to the required size, cleaning two surfaces, selecting one surface to be coated with a thick photoresist, controlling the temperature of an oven to dry the white gem piece, exposing and developing, sputtering a chromium layer and a gold layer by ion beams, depositing a tin layer by vacuum evaporation, stripping redundant chromium, gold and tin layers by a dry method, washing off the thick photoresist coated in advance by acetone, forming a tin column array, and dissolving back to pull the tin column array to change the shape of a tip.
The invention mainly extrudes the pointed array on the white gem corresponding to the indium column array on the chip, separates the two slices by vacuum suction, leaves a concave shape on the top of the indium column on the chip, and forms the infrared focal plane device by the concave point on the top of the high-density micro indium column array.
Drawings
FIG. 1 is a chip process flow diagram.
Fig. 2 is a flow chart of a white gem piece process.
FIG. 3 is a schematic cross-sectional view of the alignment of a chip and a sapphire wafer to a wafer array.
FIG. 4 is a schematic cross-sectional view of the aligned compression of the chip and the sapphire wafer to the array of wafers.
FIG. 5 is a schematic drawing showing a vacuum suction pull-off section of the chip and the white gem piece.
FIG. 6 is a schematic cross-sectional view of a top dimple forming process of a high-density fine indium pillar array.
Detailed Description
The following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings:
1. preparing a chip; coating a photoresist layer with the thickness of 14 microns, photoetching and etching a 16 multiplied by 16 micron square composite indium column hole, depositing a gold layer of about 600A by thermal evaporation, depositing an indium layer by using indium vacuum evaporation of 3-4 g, stripping a redundant indium layer and a redundant gold-indium alloy layer, leveling the end face of an indium column, corroding by nitric acid to remove the fuzz edge of the indium column, and removing the photoresist indium column array for forming (figure 1).
2. Preparing a white gem tablet; cutting 1 mm thick white gem into required size, cleaning two sides; selecting one surface to be coated with a thick photoresist, and carrying out limit exposure and development to obtain a photoetching pattern with an array aperture of 16-18 um; filling and plating a 300-400 nm metal chromium layer on the photoetched pattern by using an LJX700 ion beam sputtering film plating machine, and plating a 1um gold layer in situ; depositing a 15-20 um tin layer on the white gem piece by using a 300B type high vacuum coating machine; stripping redundant chromium, gold and tin layers by a wet method; drying by nitrogen; putting the tin layer into a remelting furnace at 180 ℃, touching the top end of the tin layer with the surface of the metal plate until the tin layer is pointed, closing the remelting furnace, cooling and taking down the tin layer (figure 2).
3. Chip and white gem piece yuan are aimed at the unit array through automatic device reverse welding equipment (figure 3) extrusion (figure 4), and the depth of pushing down controls about 5 ~ 7um, and reuse vacuum suction pulls open white gem piece and chip (figure 5), and chip indium post array top leaves complete concave point (figure 6).
Claims (1)
1. A method for forming concave points at the top end of a high-density micro indium column array for an infrared focal plane detector is characterized by comprising the following steps:
1) preparing an indium column array on the chip;
2) preparing a white gem piece; cutting a 1 mm thick sapphire sheet into required sizes, cleaning two surfaces, selecting one surface to be coated with a thick photoresist, and carrying out limit exposure and development to obtain a photoetching pattern with an array aperture of 16-18 um; filling and plating a 300-400 nm metal chromium layer on the photoetched pattern by using an LJX700 ion beam sputtering film plating machine, and plating a 1um gold layer in situ; depositing a 15-20 um tin layer on the white gem piece by using a 300B type high vacuum coating machine; stripping redundant chromium, gold and tin layers by a wet method, and drying by nitrogen; putting the white gem pieces into a remelting furnace at 180 ℃, touching the top end of the tin layer with a metal plate surface until the top end is sharp, closing the remelting furnace, cooling and taking down the white gem pieces;
3) extruding the chip prepared in the step 1) and the white gem piece element prepared in the step 2) to the element array through automatic device reverse welding equipment, controlling the pressing depth to be about 5-7 um, pulling the white gem piece and the chip apart by using vacuum suction, and leaving a complete concave point at the top end of the chip indium column array.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010324633.3A CN111584368B (en) | 2020-04-23 | 2020-04-23 | Method for forming concave points at top end of high-density micro indium column array for infrared focal plane device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010324633.3A CN111584368B (en) | 2020-04-23 | 2020-04-23 | Method for forming concave points at top end of high-density micro indium column array for infrared focal plane device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111584368A true CN111584368A (en) | 2020-08-25 |
| CN111584368B CN111584368B (en) | 2022-12-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010324633.3A Active CN111584368B (en) | 2020-04-23 | 2020-04-23 | Method for forming concave points at top end of high-density micro indium column array for infrared focal plane device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116949413A (en) * | 2023-03-16 | 2023-10-27 | 无锡中科德芯感知科技有限公司 | Indium column preparation device, preparation method and system, electronic equipment and storage medium |
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|---|---|---|---|---|
| TW515067B (en) * | 2001-05-31 | 2002-12-21 | Orient Semiconductor Elect Ltd | Metal bump having higher pillar and the fabricated device thereof |
| US20030071329A1 (en) * | 1999-10-21 | 2003-04-17 | International Business Machines Corporation | Wafer integrated rigid support ring |
| CN1417858A (en) * | 2001-11-02 | 2003-05-14 | 华泰电子股份有限公司 | Metal lug with high pin and its making method and apparatus |
| CN102130093A (en) * | 2009-11-27 | 2011-07-20 | 日东电工株式会社 | Wiring circuit structure and manufacturing method for semiconductor device using the structure |
| CN203013706U (en) * | 2012-12-28 | 2013-06-19 | 矽格微电子(无锡)有限公司 | Flip-chip bonding structure possessing preforming solder tin cavity |
-
2020
- 2020-04-23 CN CN202010324633.3A patent/CN111584368B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030071329A1 (en) * | 1999-10-21 | 2003-04-17 | International Business Machines Corporation | Wafer integrated rigid support ring |
| TW515067B (en) * | 2001-05-31 | 2002-12-21 | Orient Semiconductor Elect Ltd | Metal bump having higher pillar and the fabricated device thereof |
| CN1417858A (en) * | 2001-11-02 | 2003-05-14 | 华泰电子股份有限公司 | Metal lug with high pin and its making method and apparatus |
| CN102130093A (en) * | 2009-11-27 | 2011-07-20 | 日东电工株式会社 | Wiring circuit structure and manufacturing method for semiconductor device using the structure |
| CN203013706U (en) * | 2012-12-28 | 2013-06-19 | 矽格微电子(无锡)有限公司 | Flip-chip bonding structure possessing preforming solder tin cavity |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116949413A (en) * | 2023-03-16 | 2023-10-27 | 无锡中科德芯感知科技有限公司 | Indium column preparation device, preparation method and system, electronic equipment and storage medium |
| CN116949413B (en) * | 2023-03-16 | 2024-04-12 | 无锡中科德芯感知科技有限公司 | Indium column preparation device, preparation method and system, electronic equipment and storage medium |
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| CN111584368B (en) | 2022-12-30 |
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