CN111582309B - Method for generating bad point detection model of design layout and method for detecting bad point - Google Patents
Method for generating bad point detection model of design layout and method for detecting bad point Download PDFInfo
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Abstract
The invention relates to the technical field of integrated circuits, in particular to a method for generating a bad point detection model of a design layout and a method for detecting the bad point, wherein the method for generating the bad point detection model of the design layout comprises the following steps: obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout; extracting a first slice graph from the dead pixel position of a known layout based on the rule of potential dead pixels and expanding the first slice graph to obtain a dead pixel sample set; extracting a second slice graph from other layout positions except for the dead point in the known layout, and screening the second slice graph to obtain a non-dead point sample set; performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector; and taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel classification model for classifying dead pixels and non-dead pixels, and distinguishing dead pixel patterns through the trained dead pixel classification model to improve the detection efficiency.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a method for generating a dead pixel detection model of a design layout and a method for detecting the dead pixel.
Background
In integrated circuit fabrication, a photolithographic process transfers the geometry on a mask to a wafer, implementing circuit functions on a design layout.
However, defective wafer patterns such as bridging and necking are easily generated at the time of manufacturing, and these cannot be optimized by a process method, and a problem pattern which can be solved only by adjusting design is called a defective pixel. Defective pixels can cause defective patterns, thereby affecting the manufacturing yield of the chip and affecting the electrical performance of the chip.
The conventional dead pixel detection method is a method based on photoetching simulation, and a design layout is simulated by integrating a photoetching process model provided by a wafer factory, including an optical model, a photoresist model, an etching model and the like, so that a graph profile generated on a wafer and a process variation bandwidth are simulated, and a dead pixel graph sensitive to process parameter fluctuation is found. At the same time, there is a risk of confidential data being broken when embedding some process parameters into the simulation model.
Some wafer factories also find another solution, namely, bad point patterns and typical non-bad point patterns in the traditional design layout are collected and arranged into database resources, the known patterns are utilized to scan and match the design layout to be tested, so that bad points in the design layout are found, and the method based on the database resources is fast, but the completeness of the database is difficult to ensure, and the judgment on the patterns not contained in the database cannot be made.
Therefore, how to ensure safety and improve detection efficiency when detecting dead pixels is a technical problem to be solved.
Disclosure of Invention
In view of the foregoing, the present invention has been made to provide a method of generating a bad point detection model of a design layout and a method of detecting a bad point, which overcome or at least partially solve the foregoing problems.
In a first aspect, an embodiment of the present invention provides a method for generating a bad point detection model of a design layout, including:
obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout;
extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel, and expanding the first slice graph to obtain a dead pixel sample set;
Based on the rule of the potential dead points, extracting a second slice graph from other areas except the dead points in the known layout, and screening the second slice graph to obtain a non-dead point sample set;
performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector;
and taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
Further, the obtaining a rule of potential dead pixels based on the dead pixel positions marked in the known layout includes:
taking the marked dead point in the known layout as a sampling point, and extracting a third slice graph;
grouping the third slice graph by adopting a clustering algorithm to obtain N grouping sets;
and obtaining geometric rules of similar structures from slice graphs of each grouping set, and obtaining rules of potential dead points.
Further, after obtaining the rule of the potential dead pixel, the method further comprises:
based on the rule of the potential dead points, scanning the known layout to obtain P potential dead point positions;
Judging whether the P potential dead points contain all known dead points or not;
when the potential dead pixel is included, determining that the rule verification of the potential dead pixel is passed;
and when the rule verification of the potential dead point is not passed, determining a new rule of the potential dead point again.
Further, the extracting a first slice graph from the dead pixel positions of the known layout based on the rule of the potential dead pixels and expanding the first slice graph to obtain a dead pixel sample set includes:
extracting a first slice graph from the known layout based on the rule of the potential dead pixel;
the first slice graph is symmetrical based on the horizontal direction, and a first mirror image graph is obtained;
the first slice graph is symmetrical based on the vertical direction, and a second mirror image graph is obtained;
axisymmetric is carried out on the first slice graph based on the center, and a third mirror image graph is obtained;
and obtaining the bad sample book set comprising the first slice graph, the first mirror graph, the second mirror graph and the third mirror graph.
Further, based on the potential dead point rule, extracting a second slice graph from other areas except the dead point in the known layout, and screening the second slice graph to obtain a non-dead point sample set, including:
Extracting a second slice graph from other areas except the dead point in the known layout based on the rule of the potential dead point;
grouping the second slice graphs by adopting a clustering algorithm to obtain M clustering sets;
a cluster center sample is extracted from each cluster set as the non-bad sample set.
Further, feature extraction is performed on the bad sample collection and the non-bad sample collection to obtain a first feature vector, including:
and performing feature extraction on the bad sample collection and the non-bad sample collection by adopting any one of the following preset conversion methods to obtain a first feature vector:
a spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
Further, performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector, including:
when a spectrum conversion method is adopted, converting slice patterns corresponding to the bad sample collection and the non-bad sample collection into gray level images;
performing frequency spectrum transformation on the gray scale map to obtain a frequency spectrum map;
and obtaining a first feature vector based on the frequency spectrum of the spectrogram, and taking the first feature vector as a training set.
Further, the slice patterns corresponding to the bad sample collection and the non-bad sample collection are converted into gray level patterns
In a second aspect, the present invention provides a method for detecting bad points in a design layout, including:
obtaining an unknown layout to be detected;
extracting a fourth slice graph from the unknown layout based on the rule of the potential dead pixel;
extracting a second feature vector from the fourth slice graph;
inputting the second feature vector into a dead pixel detection model, wherein the dead pixel detection model is specifically a dead pixel detection model obtained by adopting the method for generating a dead pixel detection model of a design layout as described above, and distinguishing a dead pixel pattern in the fourth slice pattern, and the dead pixel pattern is specifically a slice pattern with a dead pixel;
and marking the dead point of the dead point pattern on the unknown layout based on the distinguished dead point pattern.
In a third aspect, the present invention provides a device for generating a dead pixel detection model of a design layout, including:
the potential dead pixel rule obtaining module is used for obtaining a rule of a potential dead pixel based on the marked dead pixel position in the known layout;
the training sample extraction module is used for extracting a first slice graph from the dead pixel positions of the known layout based on the rule of the potential dead pixels and expanding the first slice graph to obtain a dead pixel sample set; the method comprises the steps of extracting a second slice graph from other areas except the dead point in the known layout based on the rule of the potential dead point, and screening the second slice graph to obtain a non-dead point sample set;
The first feature vector extraction module is used for extracting features of the bad sample collection and the non-bad sample collection to obtain a first feature vector;
and the classification model training module is used for taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
In a fourth aspect, an embodiment of the present invention provides an apparatus for detecting a dead pixel on a design layout, including:
the layout obtaining module is used for obtaining an unknown layout to be detected;
the slice graph extraction module is used for extracting a fourth slice graph from the unknown layout based on the rule of the potential dead pixel;
a second feature vector extraction module, configured to extract a second feature vector from the fourth slice graph;
the classification model application module is used for inputting the second feature vector into a dead pixel detection model, wherein the dead pixel detection model is specifically a dead pixel detection model obtained by adopting any method for generating a dead pixel detection model of a design layout, and the dead pixel pattern in the fourth slice pattern is distinguished, and the dead pixel pattern is specifically a slice pattern with the dead pixel;
And the marking module is used for marking the dead pixel of the dead pixel pattern on the unknown layout based on the distinguished dead pixel pattern.
In a fifth aspect, the present invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the above-mentioned method steps when executing the program.
In a sixth aspect, the present invention also provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the above-mentioned method steps.
One or more technical solutions in the embodiments of the present invention at least have the following technical effects or advantages:
the invention provides a method for generating a dead pixel detection model of a design layout, which comprises the following steps: obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout; based on the rule of the potential dead pixel, extracting a first slice graph from the dead pixel position of the known layout and expanding the first slice graph to obtain a dead pixel sample set; based on the rule of the potential dead points, extracting a second slice graph from other clean areas except the dead points in the known layout, and screening the second slice graph to obtain a non-dead point sample set; performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector; the first feature vector is used as training data and is input into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels, and as the rule of the potential dead pixels is adopted, a first slice graph is extracted from dead pixel positions of a known layout to obtain a dead pixel sample set and a non-dead pixel sample set, most graphs irrelevant to the dead pixels in the known layout are filtered, the dead pixel graphs are not missed while the number of samples is ensured, and a guarantee is provided for training of the dead pixel detection model.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also throughout the drawings, like reference numerals are used to designate like parts. In the drawings:
FIG. 1 is a flow chart of steps of a method for generating a bad point detection model of a design layout according to a first embodiment of the invention;
FIG. 2 is a schematic diagram showing a third slice diagram extracted from a known layout in accordance with the first embodiment of the present invention;
fig. 3 is a schematic flow chart of a rule of obtaining a potential dead pixel in the first embodiment of the invention;
FIGS. 4 a-4 d are schematic diagrams illustrating the extraction of a first feature vector from a sample in accordance with a first embodiment of the present invention;
FIG. 5 is a flowchart illustrating steps of a method for detecting bad points in a design layout according to a second embodiment of the present invention;
fig. 6 is a schematic structural diagram of an apparatus for generating a dead pixel detection model in the third embodiment of the present invention;
FIG. 7 is a schematic structural diagram of an apparatus for detecting bad points in a design layout according to a fourth embodiment of the present invention;
Fig. 8 is a schematic structural diagram of an electronic device according to a method for generating a bad point detection model of a design layout in a fifth embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Example 1
The first embodiment of the invention provides a method for generating a dead pixel detection model of a design layout, as shown in fig. 1, comprising the following steps: s101, obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout;
s102, extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel, and expanding the first slice graph to obtain a dead pixel sample set;
s103, based on the rule of the potential dead pixel, extracting a second slice graph from other version graph areas except the dead pixel in the known layout, and screening the second slice graph to obtain a non-dead pixel sample set;
S104, carrying out feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector;
s105, taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
In a specific embodiment, before obtaining the rule of the potential dead pixel, the method further includes: and obtaining a known layout subjected to dead pixel detection.
The known layout may be a streaming result from a test layout or a detection result from lithography simulation, and will not be described in detail in the embodiment of the present invention.
Next, S101 is executed, and a rule of potential dead pixels is obtained based on the dead pixel positions marked in the known layout.
In an alternative embodiment, the marked dead point in the known layout is taken as a sampling point, and a third slice graph is extracted;
grouping the third slice graph by adopting a clustering algorithm to obtain N grouping sets;
and obtaining geometric rules of similar structures from slice graphs of each grouping set, and obtaining rules of potential dead points.
First, a third slice pattern a is extracted from the marked dead point position O in the known layout as a sampling point, and as shown in fig. 2, extraction is selectively performed when extracting the third slice pattern, specifically, pattern structures where the actual dead point position is located are extracted, and these pattern structures have a high probability of being determined as dead point patterns.
Then, as shown in fig. 3, the third slice graph is grouped by using a clustering algorithm to obtain N grouping sets (set 1, set 2 … set N), and then a similar structure is extracted from the third slice graph of each grouping set, so as to obtain a geometric rule (rule 1, rule 2 … rule N). Wherein the geometric rule is composed of lines, line ends, inner inflection points, outer inflection points and the like on the layout or a combination of partial similar structures. The geometrical parameters of the structures are used for describing the similar structure of the third slice graph in each group set, so that the geometrical rule of each group set is obtained, and the rule of the potential dead point is obtained.
After the rule of the potential dead point is obtained, the completeness of the rule needs to be verified.
Based on the rule of the potential dead points, scanning the known layout to obtain P potential dead point positions;
judging whether the P potential dead points contain all known dead points or not;
when the potential dead pixel is included, determining that the rule verification of the potential dead pixel is passed;
and when the rule verification of the potential dead point is not passed, the rule of the new potential dead point needs to be redetermined.
In an alternative embodiment, the known layout is scanned to obtain P potential dead pixel positions using a design rule checking tool in an Electronic Design Automation (EDA) tool based on the rules of the potential dead pixel. Comparing the P potential dead pixel positions with the positions of the dead pixel positions marked on the known layout, and if the P potential dead pixel positions contain all the known dead pixel positions, passing the rule verification of the potential dead pixel; if the known dead pixel position is not scanned, determining that the rule verification of the potential dead pixel is not passed, and re-determining the rule of the new potential dead pixel is needed.
When determining the law of the new potential dead point, the parameters in the clustering algorithm are required to be adjusted, then the third slice graph is grouped again, and then the geometric law of the similar structure in the slice graph of each grouping set is obtained, so that the law of the new potential dead point is obtained. And performing iterative optimization until a rule of a new potential dead pixel corresponding to the known dead pixel is obtained.
After the rule of the potential dead pixel or the rule of the new potential dead pixel is obtained, a dead pixel sample set and a non-dead pixel sample set are obtained, and as the number of dead pixels is smaller in an actual layout, the number of the non-dead pixels is far larger than that of the dead pixels, so that the number of the two types of samples is unbalanced, the subsequent model training process is influenced, and the prediction result of the model is biased to the non-dead pixels with larger specific gravity. Therefore, a reasonable selection of bad and non-bad sample collections is required. Thereby balancing the number of dead pixel samples and the number of non-dead pixel samples and improving the training performance of the model.
Executing S102, extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel, and expanding the first slice graph to obtain a dead pixel sample set, wherein the method comprises the following steps:
Extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel;
the first slice graph is symmetrical based on the horizontal direction, and a first mirror image graph is obtained;
the first slice graph is symmetrical based on the vertical direction, and a second mirror image graph is obtained;
the first slice image is symmetrical based on the center, and a third mirror image is obtained;
and obtaining a bad sample collection comprising the first slice graph, the first mirror graph, the second mirror graph and the third mirror graph.
Specifically, in the photolithography process, because the symmetry of the light source of the photolithography machine, the pattern of the first slice pattern extracted from the known layout after the symmetry is also present, so the first slice pattern is symmetrical based on the horizontal direction to obtain a first mirror image pattern, the first slice pattern is symmetrical based on the vertical direction to obtain a second mirror image pattern, the first slice pattern is symmetrical based on the center to obtain a third mirror image pattern, and then a bad sample set comprising the first slice pattern, the first mirror image pattern, the second mirror image pattern and the third mirror image pattern is obtained. The process is up-sampling of dead pixels.
And S103, extracting a second slice graph from other version areas except the dead point in the known layout based on the rule of the potential dead point, and screening the second slice graph to obtain a non-dead point sample set.
Specifically, the 103 includes:
extracting a second slice graph from other version graph areas except for the dead point in the known layout based on the rule of the potential dead point;
grouping the second slice graphs by adopting a clustering algorithm to obtain M clustering sets;
cluster center samples were red extracted from each cluster set as a non-bad sample set.
In a specific embodiment, a large number of identical or similar redundant samples exist in the non-dead point positions, so that the number of the non-dead point positions can be reduced by adopting a clustering algorithm, and therefore, a second slice graph is extracted from a layout area except the dead point positions in a known layout, the second slice graph is grouped by adopting the clustering algorithm to obtain M clustering sets, and a clustering center sample is extracted from each clustering set to serve as a non-dead point sample set. Wherein the cluster center sample is the actual sample point, not the average value of the cluster set. Here, downsampling is performed on non-dead pixels.
Meanwhile, the number of the clustering sets can be set to be 5-10 times of the number of the dead pixel samples, namely, the number M is set to be 5-10 times of the number of the dead pixel samples.
After the bad sample collection and the non-bad sample collection are obtained, S104 is performed, and feature extraction is performed on the bad sample collection and the non-bad sample collection to obtain a first feature vector.
Specifically, S104 includes:
and carrying out feature extraction on the bad sample collection and the non-bad sample collection by adopting any one of the following preset conversion methods to obtain a first feature vector:
a spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
By performing feature extraction from the bad sample collection and the non-bad sample collection, the purpose is to reduce the sample dimension. Feature extraction is described below in terms of a spectral transformation method.
Specifically, when a spectrum transformation method is adopted for feature extraction, the slice patterns corresponding to the dead pixel samples and the non-dead pixel samples are pixelized, and a gray level image is obtained;
performing frequency spectrum transformation on the gray level map to obtain a frequency spectrum map;
based on the spectrum of the spectrogram, a first eigenvector is obtained.
In a specific embodiment, the spatial domain information in the slice pattern is converted into the frequency domain to extract the features, which accords with the physical mechanism of the photolithography process, so that the method has stronger robustness.
4a-4d, firstly converting slice patterns (FIG. 4 a) corresponding to the bad sample collection and the non-bad sample collection into gray patterns, as shown in FIG. 4b, then performing frequency spectrum transformation on the gray patterns to obtain spectrograms, as shown in FIG. 4c, specifically performing two-dimensional Fourier transformation on the gray patterns to obtain frequency spectrum distribution on the spectrograms; based on the spectrum of the spectrogram, a first eigenvector is obtained, in particular the spectrum is encoded into the first eigenvector, as shown in fig. 4 d.
And finally, executing S105, taking the first feature vector as training data, inputting the training data into a classifier model for training, and obtaining a dead pixel detection model for classifying dead pixels and non-dead pixels.
Specifically, the soft interval support vector machine is used as a classification model of the bad sample set and the non-bad sample set, and the Gaussian kernel is used as a kernel function. First eigenvector x of given training data n N=1..n, the bad point attribute is t n ∈[-1，1](1 represents dead pixel, -1 represents non-dead pixel), the mathematical expression of the dual problem of the soft interval support vector machine is as follows:
constraint: a is more than or equal to 0 n ≤C，
a＝(a 1 ...a n ) T
Wherein the parameter C is used to control the trade-off between relaxation variable penalty and classification interval, k (x n ,x m ) Is a Gaussian mirror image basis kernel function, a n Is the lagrange multiplier. The gaussian radial basis function is symmetrically semi-positive.
In the embodiment of the invention, a neural network model, a decision tree classification model and the like can be adopted to carry out model training on the bad sample collection and the non-bad sample collection, so that a bad pixel detection model for classifying bad pixels and non-bad pixels is obtained.
The method for generating the dead pixel detection model of the design layout can be realized in a wafer factory, so that the process details of the wafer factory can be protected.
One or more technical solutions in the embodiments of the present invention at least have the following technical effects or advantages:
the invention provides a method for generating a dead pixel detection model of a design layout, which comprises the following steps: obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout; based on the rule of the potential dead pixel, extracting a first slice graph from the dead pixel position of the known layout and expanding the first slice graph to obtain a dead pixel sample set; based on the rule of the potential dead point, extracting a second slice graph from other version graph areas except the dead point in the known layout, and screening the second slice graph to obtain a non-dead point sample set; performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector; the first feature vector is used as training data and is input into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels, and as the rule of the potential dead pixels is adopted, a first slice graph is extracted from dead pixel positions of a known layout to obtain a dead pixel sample set and a non-dead pixel sample set, most graphs irrelevant to the dead pixels in the known layout are filtered, the dead pixel graphs are not missed while the number of samples is ensured, and a guarantee is provided for training of the dead pixel detection model.
Example two
Based on the same inventive concept, the embodiment of the invention also provides a method for detecting bad points in the design layout, as shown in fig. 5, comprising the following steps:
s501, obtaining an unknown layout to be detected;
s502, extracting a fourth slice graph from an unknown layout based on the rule of potential bad points;
s503, extracting a second feature vector from the fourth slice graph;
s504, inputting the second feature vector into a dead pixel detection model, wherein the dead pixel detection model is specifically a dead pixel detection model obtained by adopting any method for generating a dead pixel detection model of a design layout, and the dead pixel pattern in the fourth slice pattern is distinguished, and the dead pixel pattern is specifically a slice pattern with the dead pixel;
s505, marking the dead pixels in the dead pixel graph on the unknown layout based on the distinguished dead pixel graph.
In an alternative embodiment, prior to S502, further comprising:
and obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout.
Specifically, the method for obtaining the rule of the potential dead pixel based on the marked dead pixel position in the known layout specifically comprises the following steps:
taking the marked dead point in the known layout as a sampling point, and extracting a fifth slice graph;
Grouping the fifth slice graph by adopting a clustering algorithm to obtain N grouping sets;
and obtaining geometric rules of similar structures from slice graphs of each grouping set, and obtaining rules of potential dead points.
In an alternative embodiment, S503 specifically includes:
extracting a second feature vector from the fourth slice graph by adopting any one of the following preset methods:
a spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
When a second feature vector is extracted from a fourth slice graph by adopting a frequency spectrum transformation method, the fourth slice graph is converted into a gray level graph, and the gray level graph is subjected to frequency spectrum transformation to obtain a frequency spectrum graph; based on the spectrum of the spectrogram, a second eigenvector is obtained.
In S504, when the second feature vector is input into the dead pixel detection model, a prediction result of whether the fourth slice pattern is a dead pixel is output, that is, a dead pixel pattern in the fourth slice pattern, specifically, a slice pattern in which a dead pixel exists is distinguished.
If the fourth slice graph is a dead pixel, the position of the corresponding slice graph is the position of the dead pixel.
If the fourth slice graph is a non-defective pixel, the position of the corresponding slice graph is the position of the non-defective pixel.
In S505, based on the identified bad point pattern, the bad point of the bad point pattern is marked on the unknown layout.
And marking the position of the fourth slice graph with the dead pixel in the position layout to obtain the position of the predicted dead pixel in the unknown layout.
In the second embodiment, since the fourth slice patterns extracted from the unknown layout are located at each position on the unknown layout, after the second feature vector is extracted from the fourth slice patterns corresponding to each position, the dead pixel detection model is input, and whether each slice pattern in the fourth slice patterns belongs to a dead pixel is predicted, so that the position of the dead pixel on the unknown layout is determined, and finally, marking is performed.
In the second embodiment, the dead pixel detection model is applied, so that a design company uses the dead pixel detection model to detect a design layout, and then directly adjusts the design according to a detection result, thereby accelerating the iterative optimization process of the design layout. And further, the safety of each process parameter in the wafer factory can be ensured.
Example III
Based on the same inventive concept, the embodiment of the invention also provides a device for generating the dead pixel detection model of the design layout, as shown in fig. 6, comprising:
The potential dead pixel rule obtaining module 601 is configured to obtain a rule of a potential dead pixel based on a dead pixel position marked in a known layout;
the training sample extraction module 602 is configured to extract a first slice pattern from a dead pixel position of the known layout based on the rule of the potential dead pixel, and expand the first slice pattern to obtain a dead pixel sample set; the method comprises the steps of extracting a second slice graph from other version areas except for the dead point in the known layout based on the rule of the potential dead point, and screening the second slice graph to obtain a non-dead point sample set;
the first feature vector extraction module 603 is configured to perform feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector;
and the classification model training module 604 is configured to input the first feature vector as training data into a classifier model for training, so as to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
In a preferred embodiment, the potential dead pixel rule obtaining module 601 includes:
the first extraction unit is used for taking the marked dead point in the known layout as a sampling point to extract a third slice graph;
The first obtaining unit is used for grouping the third slice graph by adopting a clustering algorithm to obtain N grouping sets;
and the second obtaining unit is used for obtaining the geometric rules of the similar structures from the slice graphs of each grouping set and obtaining the rules of the potential dead points.
In a preferred embodiment, the potential dead pixel rule obtaining module 601 further includes:
the third obtaining unit is used for scanning the known layout based on the rule of the potential dead pixels to obtain P potential dead pixel positions;
the judging unit is used for judging whether the P potential dead points contain all known dead points or not;
the first determining unit is used for determining that the rule verification of the potential dead pixel passes when the potential dead pixel is included;
and the second determining unit is used for determining that the rule verification of the potential dead point is not passed when the potential dead point is not included, and determining the rule of the new potential dead point again.
In a preferred embodiment, training sample extraction module 602 comprises:
the second extraction unit is used for extracting a first slice graph from the dead pixel positions of the known layout based on the rule of the potential dead pixels;
a fourth obtaining unit, configured to symmetry the first slice pattern based on a horizontal direction, to obtain a first mirror image pattern;
A fifth obtaining unit, configured to symmetry the second slice pattern based on a vertical direction, to obtain a second mirror image pattern;
a sixth obtaining unit, configured to symmetry the first slice image based on a center, to obtain a third mirror image;
a seventh obtaining unit, configured to obtain the bad sample album set including the first slice graphic, the first mirror image graphic, the second mirror image graphic, and the third mirror image graphic.
In a preferred embodiment, training sample extraction module 602 further comprises:
the second extraction unit is used for extracting a second slice graph from other version areas except the dead pixel in the known layout based on the rule of the potential dead pixel;
an eighth obtaining unit, configured to group the second slice graphs by using a clustering algorithm to obtain M cluster sets;
a third extraction unit, configured to extract a cluster center sample from each cluster set as the non-bad sample set;
in a preferred embodiment, the first feature vector extraction module 603 is specifically configured to:
and performing feature extraction on the bad sample collection and the non-bad sample collection by adopting any one of the following preset conversion methods to obtain a first feature vector:
A spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
In a preferred embodiment, the first feature vector extraction module 603 includes:
the conversion unit is used for converting the slice patterns corresponding to the bad sample collection and the non-bad sample collection into gray level images when a frequency spectrum conversion method is adopted;
a ninth obtaining unit, configured to perform spectral transformation on the gray scale map to obtain a spectrogram;
a tenth obtaining unit, configured to obtain a first feature vector as a training set based on a spectrum of the spectrogram.
Example IV
Based on the same invention, a fourth embodiment of the present invention provides a device for detecting bad points in a design layout, as shown in fig. 7, including:
a layout obtaining module 701, configured to obtain an unknown layout to be detected;
the slice graph extraction module 702 is configured to extract a fourth slice graph from the unknown layout based on the rule of the potential bad points;
a second feature vector extracting module 703, configured to extract a second feature vector from the fourth slice graph;
the classification model application module 704 is configured to input the second feature vector into a dead pixel detection model, where the dead pixel detection model is specifically a dead pixel detection model obtained by using any one of the methods for generating a dead pixel detection model of a design layout, and identify a dead pixel pattern in the fourth slice pattern, where the dead pixel pattern is specifically a slice pattern with a dead pixel;
And the dead pixel marking module 705 is configured to mark a dead pixel of the dead pixel pattern on the unknown layout based on the identified dead pixel pattern.
In a preferred embodiment, further comprising:
the rule obtaining module is used for obtaining the rule of the potential dead pixel based on the marked dead pixel position in the known layout.
In a preferred embodiment, the rule obtaining module includes:
the slice graph extraction unit is used for taking the marked dead point in the known layout as a sampling point to extract a third slice graph;
the cluster analysis unit is used for grouping the third slice graphs by adopting a cluster algorithm to obtain N grouping sets;
the rule obtaining unit is used for obtaining the geometric rules of the similar structures from the slice graphs of each grouping set and obtaining the rules of the potential dead pixels.
In a preferred embodiment, the second feature vector extraction module 703 is specifically configured to:
extracting a second feature vector from the fourth slice graph by adopting any one of the following preset methods:
a spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
In a preferred embodiment, when extracting the second feature vector from the fourth slice graph by using the spectral transformation method, the second feature vector extracting module 703 includes:
A conversion unit for converting the fourth slice pattern into a gray scale pattern;
the frequency spectrum transformation unit is used for performing frequency spectrum transformation on the gray level map to obtain a frequency spectrum map;
and a feature vector obtaining unit configured to obtain a second feature vector based on the spectrum of the spectrogram.
Example five
Based on the same inventive concept, a fifth embodiment of the present invention provides an electronic device, as shown in fig. 8, including a memory 804, a processor 802, and a computer program stored in the memory 804 and capable of running on the processor 802, where the processor 802 implements the steps of the method for generating a bad point detection model of a design layout when executing the program.
Where in FIG. 8, a bus architecture (represented by bus 800), bus 800 may include any number of interconnected buses and bridges, with bus 800 linking together various circuits, including one or more processors, as represented by processor 802, and memory, as represented by memory 804. Bus 800 may also link together various other circuits such as peripheral devices, voltage regulators, power management circuits, etc., as are well known in the art and, therefore, will not be described further herein. Bus interface 806 provides an interface between bus 800 and receiver 801 and transmitter 803. The receiver 801 and the transmitter 803 may be the same element, i.e. a transceiver, providing a means for communicating with various other apparatus over a transmission medium. The processor 802 is responsible for managing the bus 800 and general processing, while the memory 804 may be used to store data used by the processor 802 in performing operations.
Example six
Based on the same inventive concept, a sixth embodiment of the present invention provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described method steps of generating a bad point detection model of a design layout.
The algorithms and displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Various general-purpose systems may also be used with the teachings herein. The required structure for a construction of such a system is apparent from the description above. In addition, the present invention is not directed to any particular programming language. It will be appreciated that the teachings of the present invention described herein may be implemented in a variety of programming languages, and the above description of specific languages is provided for disclosure of enablement and best mode of the present invention.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and disposed in one or more apparatuses different from the embodiments. The modules or units or components of the embodiments may be combined into one module or unit or component and, furthermore, they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.
Various component embodiments of the invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that some or all of the functions of some or all of the components in an apparatus, an electronic device for generating a dead-spot detection model according to an embodiment of the present invention may be implemented in practice using a microprocessor or a Digital Signal Processor (DSP). The present invention can also be implemented as an apparatus or device program (e.g., a computer program and a computer program product) for performing a portion or all of the methods described herein. Such a program embodying the present invention may be stored on a computer readable medium, or may have the form of one or more signals. Such signals may be downloaded from an internet website, provided on a carrier signal, or provided in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names.
Claims (10)
1. The method for generating the dead pixel detection model of the design layout is characterized by comprising the following steps of:
obtaining a rule of potential dead pixels based on the marked dead pixel positions in the known layout; the marked dead points in the known layout are used as sampling points, and a third slice graph is extracted; grouping the third slice graph by adopting a clustering algorithm to obtain N grouping sets; obtaining geometrical rules of similar structures from slice graphs of each grouping set, and obtaining rules of potential dead points;
extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel, and expanding the first slice graph to obtain a dead pixel sample set;
based on the rule of the potential dead points, extracting a second slice graph from other version areas except the dead points in the known layout, and screening the second slice graph to obtain a non-dead point sample set;
performing feature extraction on the bad sample collection and the non-bad sample collection to obtain a first feature vector; when a spectrum conversion method is adopted, the slice patterns corresponding to the bad sample collection and the non-bad sample collection are converted into gray level images; performing frequency spectrum transformation on the gray scale map to obtain a frequency spectrum map; based on the frequency spectrum of the spectrogram, a first feature vector is obtained;
And taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
2. The method of claim 1, further comprising, after obtaining the law of potential dead spots:
based on the rule of the potential dead points, scanning the known layout to obtain P potential dead point positions;
judging whether the P potential dead points contain all known dead points or not;
when the potential dead pixel is included, determining that the rule verification of the potential dead pixel is passed;
and when the rule verification of the potential dead point is not passed, determining a new rule of the potential dead point again.
3. The method according to claim 1, wherein extracting a first slice pattern from the dead pixel positions of the known layout based on the law of the potential dead pixels and expanding the first slice pattern to obtain a dead pixel sample set comprises:
extracting a first slice graph from the dead pixel position of the known layout based on the rule of the potential dead pixel;
the first slice graph is symmetrical based on the horizontal direction, and a first mirror image graph is obtained;
The first slice graph is symmetrical based on the vertical direction, and a second mirror image graph is obtained;
axisymmetric is carried out on the first slice graph based on the center, and a third mirror image graph is obtained;
and obtaining the bad sample book set comprising the first slice graph, the first mirror graph, the second mirror graph and the third mirror graph.
4. The method according to claim 1, wherein extracting a second slice pattern from other version regions of the known layout than the dead pixel based on the law of the potential dead pixel and screening the second slice pattern to obtain a non-dead pixel sample set comprises:
extracting a second slice graph from other version areas except the dead point in the known layout based on the rule of the potential dead point;
grouping the second slice graphs by adopting a clustering algorithm to obtain M clusters;
a cluster center sample is extracted from each cluster set as the non-bad sample set.
5. The method of claim 1, wherein performing feature extraction on the set of bad spots and the set of non-bad spots to obtain a first feature vector comprises:
And performing feature extraction on the bad sample collection and the non-bad sample collection by adopting any one of the following preset conversion methods to obtain a first feature vector:
a spectrum transformation method, a discrete cosine transformation method, a discrete sine transformation method.
6. A method for detecting dead pixels in a design layout, comprising:
obtaining an unknown layout to be detected;
extracting a fourth slice graph from the unknown layout based on the rule of the potential dead pixel;
extracting a second feature vector from the fourth slice graph;
inputting the second feature vector into a dead pixel detection model, wherein the dead pixel detection model is specifically a dead pixel detection model obtained by adopting the method of any one of claims 1-5, and the dead pixel pattern in the fourth slice pattern is distinguished, and the dead pixel pattern is specifically a slice pattern with the dead pixel;
and marking the dead point of the dead point pattern on the unknown layout based on the distinguished dead point pattern.
7. An apparatus for generating a bad point detection model of a design layout, comprising:
the potential dead pixel rule obtaining module is used for obtaining a rule of a potential dead pixel based on the marked dead pixel position in the known layout; the marked dead points in the known layout are used as sampling points, and a third slice graph is extracted; grouping the third slice graph by adopting a clustering algorithm to obtain N grouping sets; obtaining geometrical rules of similar structures from slice graphs of each grouping set, and obtaining rules of potential dead points;
The training sample extraction module is used for extracting a first slice graph from the dead pixel positions of the known layout based on the rule of the potential dead pixels and expanding the first slice graph to obtain a dead pixel sample set;
extracting a second slice graph from other version graph areas except the dead point positions in the known layout, and screening the second slice graph to obtain a non-dead point sample set;
the first feature vector extraction module is used for extracting features of the bad sample collection and the non-bad sample collection to obtain a first feature vector; when a spectrum conversion method is adopted, the slice patterns corresponding to the bad sample collection and the non-bad sample collection are converted into gray level images; performing frequency spectrum transformation on the gray scale map to obtain a frequency spectrum map; based on the frequency spectrum of the spectrogram, a first feature vector is obtained;
and the classification model training module is used for taking the first feature vector as training data, inputting the training data into a classifier model for training to obtain a dead pixel detection model for classifying dead pixels and non-dead pixels.
8. An apparatus for detecting bad points in a design layout, comprising:
The layout obtaining module is used for obtaining an unknown layout to be detected;
the slice graph extraction module is used for extracting a fourth slice graph from the unknown layout based on the rule of the potential dead pixel;
a second feature vector extraction module, configured to extract a second feature vector from the fourth slice graph;
the classification model application module is used for inputting the second feature vector into a dead pixel detection model, wherein the dead pixel detection model is specifically a dead pixel detection model obtained by adopting the method of any one of claims 1-5, and the dead pixel pattern in the fourth slice pattern is distinguished, and the dead pixel pattern is specifically a slice pattern with the dead pixel;
and the dead pixel marking module is used for marking the dead pixels of the dead pixel patterns on the unknown layout based on the distinguished dead pixel patterns.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method steps of any of claims 1-5 when the program is executed.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method steps of any of claims 1-5.
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