CN111564962A - Anti-surge current limiting circuit and method applied to inverter welding machine power supply - Google Patents
Anti-surge current limiting circuit and method applied to inverter welding machine power supply Download PDFInfo
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- CN111564962A CN111564962A CN202010445052.5A CN202010445052A CN111564962A CN 111564962 A CN111564962 A CN 111564962A CN 202010445052 A CN202010445052 A CN 202010445052A CN 111564962 A CN111564962 A CN 111564962A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract
The invention relates to an anti-surge current-limiting circuit applied to an inverter welding machine power supply, which relates to the field of inverter welding machine power supplies and comprises an input circuit, a current limiting circuit and a current limiting circuit, wherein the input circuit is sequentially connected with signals and used for inputting commercial power and forming a first signal; a filter capacitor C3 for filtering the first signal and forming a second signal; a drive circuit for outputting a different third signal according to the second signal; an intermediate frequency transformer T1 for outputting a fourth signal after proportionally changing the third signal; an inverting rectification circuit for inverting and rectifying the fourth signal and outputting a fifth signal; an anti-surge circuit is electrically connected between the input circuit and the filter capacitor C3 and is used for monitoring the voltage at two ends of the filter capacitor C3 in real time and limiting the current of the filter capacitor C3 accordingly. By the arrangement of the anti-surge circuit, the voltage at two ends of the filter capacitor C3 can be monitored in real time, and the current of the filter capacitor C3 can be limited according to the voltage at two ends of the filter capacitor C3, so that the effects of improving surge current and limiting the charging current of the filter capacitor C3 are achieved.
Description
Field of the method
The invention relates to the field of inverter welding machine power supplies, in particular to an anti-surge current limiting circuit and method applied to the inverter welding machine power supply.
Background
In the design of an inverter power supply, disturbance caused by surge current to the inverter power supply is difficult to solve, and the disturbance is a design problem which troubles the inverter welding power supply.
The inverter welding power supply comprises an input circuit, a filter capacitor C3, a driving circuit, an intermediate frequency transformer T1 and an inverter rectifying circuit which are electrically connected in sequence. In the use process, the current instantly charged by the capacitor C3 is large, so that the power grid is unstable, even the power switch (SW1), the rectifier bridge (B1), the power grid and the like are damaged, the national power grid is greatly interfered, and the power grid is damaged in serious cases, which is not allowed by the national standard of the inverter.
In response to the above situation, the timer controls the main circuit switch (RLY 1), and the high power resistor R20 is connected in parallel to the switch to realize an anti-surge circuit, which can improve the surge current but cannot limit the charging current of the filter capacitor C3.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide the anti-surge current limiting circuit which can improve surge current and limit the charging current of the filter capacitor C3 and is applied to the power supply of the inverter welding machine.
An anti-surge current-limiting circuit applied to an inverter welding machine power supply comprises a plurality of current-limiting circuits which are connected in sequence through signals,
the input circuit is used for inputting commercial power to form a first signal;
a filter capacitor C3 for filtering the first signal and forming a second signal;
a driving circuit for outputting a different third signal according to the second signal;
the intermediate frequency transformer T1 is used for outputting a fourth signal after the third signal is changed in proportion;
the inversion rectifying circuit is used for inverting and rectifying the fourth signal and outputting a fifth signal;
an anti-surge circuit is electrically connected between the input circuit and the filter capacitor C3 and used for monitoring the voltage at two ends of the filter capacitor C3 in real time and limiting the current of the filter capacitor C3 according to the voltage at two ends of the filter capacitor C3.
By adopting the technical scheme, after the input circuit outputs signals, the signals are transmitted to the filter capacitor C3 through the surge prevention circuit, so that the voltages at two ends of the filter capacitor C3 are monitored in real time, the current of the filter capacitor C3 is limited, a power grid is stabilized, and interference is reduced; the signal passing through the filter capacitor C3 sequentially passes through the drive circuit, the intermediate frequency transformer T1 and the inverter rectification circuit, and is output; and the circuit has high control precision, easy realization and low cost.
The present invention in a preferred example may be further configured to: the anti-surge circuit comprises a current-limiting resistor R20, one end of the current-limiting resistor is electrically connected with the input circuit, the other end of the current-limiting resistor is in signal connection with the anode of a diode D2 and the filter capacitor C3, the cathode of the diode D2 is electrically connected with a resistor R8 and a resistor R10 in sequence, one end, far away from the resistor R8, of the resistor R10 is electrically connected with the anode of a light-emitting diode in a linear optocoupler U2, the cathode of the light-emitting diode in the linear optocoupler U2 is electrically connected with a resistor R16, the other end of the resistor R16 is connected with an analog ground, the collector of an NPN triode in the linear optocoupler U2 is electrically connected with a resistor R38;
an emitter of an NPN triode in the linear optocoupler U2 is electrically connected with a non-inverting output end 3 of a comparator U1, the non-inverting input end 3 of the comparator U1 is further electrically connected with a resistor R15, and the other end of the resistor R15 is grounded; the inverting input end 2 of the comparator U1 is electrically connected with a resistor R14, the other end of the resistor R14 is connected with VCC, the inverting input end of the comparator U1 is also electrically connected with a resistor R17, and the other end of the resistor R17 is grounded; the output end 1 of the inverter U1 is electrically connected with a resistor R13, and the other end of the resistor R13 is grounded;
the output end 1 of the inverter U1 is further electrically connected with a triode current-limiting resistor R9, the other end of the triode current-limiting resistor R9 is electrically connected with a base electrode of an NPN triode Q3, an emitting electrode of the NPN triode Q3 is grounded, a collector electrode of the NPN triode Q3 is electrically connected with an anode of a diode D4, a cathode of the diode D4 is connected with VCC, two ends of the diode D4 are further connected with a coil of a relay RLY1 in parallel, and switches of the relay RLY1 are connected with two ends of the current-limiting resistor R20 in parallel.
By adopting the technical scheme, the resistor R16 detects voltage signals at two ends of the capacitor C3, and the voltage signals are compared with a given voltage value through the linear optocoupler U2, the resistor R12 and the resistor R15 to the non-inverting input end 3 of the comparator U1; when the power supply is turned on, because the voltage at the two ends of the capacitor C3 is lower than the set value voltage (determined according to the capacitance of the capacitor) at the non-inverting input end 3 of the comparator U1, the direct current in the circuit charges the capacitor C3 through the current-limiting resistor R20, when the voltage is higher than the voltage at the non-inverting input end 3 of the comparator U1 (at the moment, the voltage value at the two ends of the capacitor C3 is close to the voltage when the normal charging current is achieved), the comparator U1 overturns to output a high level, the NPN triode Q3 is conducted through the voltage-dividing resistor R13 and the triode current-limiting resistor R9, the relay RLY1 is conducted, the main circuit completes full-voltage charging to the C3, and the.
The present invention in a preferred example may be further configured to: the input circuit comprises a mains supply input, a power switch SW1 and a rectifier bridge B1, and the output end of the rectifier bridge B1 is electrically connected with the anti-surge circuit.
By adopting the technical scheme, after the power switch SW1 is switched on, the commercial power flows to the anti-surge circuit through the rectifier bridge B1.
The present invention in a preferred example may be further configured to: the filter capacitor C3 adopts a patch capacitor, the positive electrode of the filter capacitor C3 is electrically connected with the anti-surge circuit and is connected with VCC, and the negative electrode of the filter capacitor C3 is connected with analog ground.
By adopting the above technical solution, the filter capacitor C3 is used for filtering the first signal and forming the second signal.
The present invention in a preferred example may be further configured to: the driving circuit comprises a resistor R3 connected in parallel with two ends of the filter capacitor C3, the positive electrode of the filter capacitor C3 is electrically connected with a capacitor C1 and a capacitor C7, and one end, far away from the capacitor C1, of the capacitor C7 is electrically connected with the negative electrode of the filter capacitor C3;
one end of the capacitor C1, which is far away from the capacitor C7, is electrically connected with a resistor R2 and a resistor R4, and one end of the resistor R4, which is far away from the resistor R2, is electrically connected with the cathode of the filter capacitor C3; the capacitor C1 and the capacitor C7 are communicated with the resistor R2 and the resistor R4;
the positive electrode of the filter resistor C3 is electrically connected with a resistor R1, a capacitor C2, a resistor R5 and a capacitor C8, and one end of the capacitor C8, which is far away from the resistor R5, is electrically connected with the negative electrode of the filter capacitor C3;
the positive electrode of the filter capacitor C3 is electrically connected with the collector of an IGBT Q1, the gate of the IGBT Q1 is connected with a signal G2, the emitter of the IGBT Q1 is electrically connected with the collector of an IGBT Q2, the emitter of the IGBT Q2 is electrically connected with the negative electrode of the filter capacitor C3, and the gate of the IGBT Q2 is connected with a signal G4; the capacitor C2 and the resistor R5 are connected to the emitter of the IGBT Q1 and the collector of the IGBT Q2, and are electrically connected to a port 2 on the primary side of the intermediate frequency transformer T1, a transformer T2 is electrically connected to a port 1 on the primary side of the intermediate frequency transformer T1, and one end of the transformer T2, which is far from the intermediate frequency transformer T1, is electrically connected between the resistor R2 and the resistor R4.
By adopting the technical scheme, when the IGBT Q1 is switched on, a signal passing through the IGBT Q1 flows to the analog ground after passing through the port 2 and the port 1 on the primary side of the intermediate frequency transformer T1, the transformer T2, the resistor R4 and the capacitor C7;
when the IGBT Q2 is turned on, a signal flows from the capacitor C1, the resistor R2, and the transformer T2 to the port 1 and the port 2 on the primary side of the intermediate frequency transformer T1, then flows through the IGBT Q2, and flows to the analog ground.
The present invention in a preferred example may be further configured to: the secondary side of the intermediate frequency transformer T1 includes a first secondary side and a second secondary side, the ports of the first secondary side are port 5 and port 6, and the ports of the second secondary side include port 3 and port 4.
By adopting the technical scheme, the first secondary side and the second secondary side are convenient to be electrically connected with the inverter rectification circuit.
The present invention in a preferred example may be further configured to: the inverter rectifying circuit comprises an inverter rectifying diode D1 and an inverter rectifying diode D3, the port 6 is electrically connected with a resistor R6 and the anode of the inverter rectifying diode D1, the resistor R6 is electrically connected with a capacitor C5, and the other end of the capacitor C5 and the cathode of the inverter rectifying diode D1 are simultaneously and electrically connected with a first output end U1;
the port 5 is electrically connected with a second output end U2;
the port 4 is electrically connected with a resistor R11 and the anode of the inverting rectifying diode D3, the resistor R11 is electrically connected with a capacitor C10, and the other end of the capacitor C10 and the cathode of the inverting rectifying diode D3 are simultaneously and electrically connected with a first output end U1;
the port 3 is electrically connected with a second output end U2;
a filter circuit is electrically connected between the first output end U1 and the second output end U2.
By adopting the technical scheme, the inverter rectification circuit is used for outputting the output signal of the intermediate frequency transformer T1 after inversion rectification.
The present invention in a preferred example may be further configured to: the filter circuit comprises a resistor R7, two ends of the resistor R7 are respectively connected with the first output end U1 and the second output end U2, two ends of the resistor R7 are connected with a capacitor C6 in parallel, two ends of the capacitor C6 are respectively and electrically connected with a capacitor C4 and a capacitor C9, and one ends, far away from the capacitor C6, of the capacitor C4 and one ends, far away from the capacitor C6, of the capacitor C9 are communicated and connected with a digital ground.
By adopting the technical scheme, the filter circuit is used for filtering the output signal of the inverter rectification circuit.
The invention also aims to provide an anti-surge current limiting method applied to an inverter welding machine power supply, which is used for improving surge current and limiting the charging current of a filter capacitor C3.
A surge-proof current-limiting method applied to an inverter welding machine power supply comprises the following steps,
s1: the commercial power forms a first signal after passing through the input circuit;
s2: the first signal is input into the anti-surge circuit to form a sixth signal, and the voltage at two ends of the filter capacitor C3 is monitored, so that the current of the filter capacitor C3 is limited;
s3: the sixth signal forms a second signal after passing through a filter capacitor C3;
s4: the second signal forms a third signal after passing through the driving circuit;
s5: the third signal forms a fourth signal via an intermediate frequency transformer T1;
s6: the fourth signal passes through the inverter rectification circuit and then outputs a fifth signal.
Through adopting above-mentioned technical scheme, above-mentioned scheme is convenient for realize being applied to the realization of the anti-surge current limiting function of contravariant welding machine power.
In summary, the invention includes at least one of the following beneficial technical effects:
1. through the arrangement of the surge prevention circuit, the voltages at the two ends of the filter capacitor C3 are monitored in real time, the current of the filter capacitor C3 is limited according to the voltages at the two ends of the filter capacitor C3, the surge current is improved, and meanwhile the charging current of the filter capacitor C3 is limited.
Drawings
Fig. 1 is a circuit schematic diagram of an input circuit in the present embodiment.
Fig. 2 is a circuit schematic diagram of the surge protection circuit in the present embodiment.
Fig. 3 is a schematic circuit diagram of the filter capacitor C3, the driving circuit and the intermediate frequency transformer T1 in this embodiment.
Fig. 4 is a schematic circuit diagram of the inverter rectifier circuit in the present embodiment.
In the figure, 1, an input circuit; 11. inputting commercial power; 2. a drive circuit; 3. an inverting rectification circuit; 31. a filter circuit; 4. provided is an anti-surge circuit.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
Referring to fig. 1 and 2, the anti-surge current limiting circuit and method applied to an inverter welding machine power supply disclosed by the invention comprises an input circuit 1 and an anti-surge circuit 4 which are sequentially in signal connection, and referring to fig. 3 and 4, the anti-surge current limiting circuit further comprises a filter capacitor C3, a driving circuit 2, an intermediate frequency transformer T1 and an inverter rectifying circuit 3.
Referring to fig. 1, an input circuit 1 is used for inputting commercial power and forming a first signal; referring to fig. 2, the anti-surge circuit 4 is configured to monitor the voltage across the filter capacitor C3 in real time and limit the current of the filter capacitor C3 according to the voltage across the filter capacitor C3.
Referring to fig. 3, the filter capacitor C3 is used for filtering the first signal and forming a second signal; the driving circuit 2 is used for outputting different third signals according to the second signals; the intermediate frequency transformer T1 is used for outputting a fourth signal after proportionally changing the third signal.
Referring to fig. 4, the inverting rectification circuit 3 is configured to inverting-rectify the fourth signal and output a fifth signal.
Referring to fig. 1, the input circuit 1 includes a mains input 11, a power switch SW1, and a rectifier bridge B1, and an output terminal of the rectifier bridge B1 is electrically connected to the anti-surge circuit 4.
Referring to fig. 2, the anti-surge circuit 4 includes a current-limiting resistor R20, one end of the current-limiting resistor is electrically connected to the input circuit 1, the other end is in signal connection with an anode of a diode D2 and a filter capacitor C3, a cathode of the diode D2 is electrically connected to a resistor R8 and a resistor R10 in sequence, one end of the resistor R10 away from the resistor R8 is electrically connected to an anode of a light emitting diode in the linear optocoupler U2, a cathode of the light emitting diode in the linear optocoupler U2 is electrically connected to a resistor R16, the other end of the resistor R16 is connected to an analog ground, a collector of an NPN triode in the linear optocoupler U2 is electrically connected to a resistor R38.
An emitter of an NPN triode in the linear optocoupler U2 is electrically connected with a non-inverting output end 3 of a comparator U1, the non-inverting input end 3 of the comparator U1 is also electrically connected with a resistor R15, and the other end of the resistor R15 is grounded; the inverting input end 2 of the comparator U1 is electrically connected with a resistor R14, the other end of the resistor R14 is connected with +24V, the inverting input end of the comparator U1 is also electrically connected with a resistor R17, and the other end of the resistor R17 is grounded; the output end 1 of the inverter U1 is electrically connected with a resistor R13, and the other end of the resistor R13 is grounded.
The output end 1 of the inverter U1 is also electrically connected with a triode current-limiting resistor R9, the other end of the triode current-limiting resistor R9 is electrically connected with the base electrode of an NPN triode Q3, the emitter electrode of the NPN triode is grounded, the collector electrode of the NPN triode is electrically connected with the anode of a diode D4, the cathode of a diode D4 is connected with +24V, the two ends of a diode D4 are also connected with a coil of a relay RLY1 in parallel, and the switch of the relay RLY1 is connected with the two ends of the current-limiting resistor R20.
Referring to fig. 3, the filter capacitor C3 is a chip capacitor, the positive electrode of the filter capacitor C3 is electrically connected to the anti-surge circuit 4 and is connected to VCC, and the negative electrode of the filter capacitor C3 is connected to analog ground.
The driving circuit 2 comprises a resistor R3 connected in parallel with two ends of a filter capacitor C3, the positive electrode of the filter capacitor C3 is electrically connected with a capacitor C1 and a capacitor C7, and one end of the capacitor C7, which is far away from the capacitor C1, is electrically connected with the negative electrode of the filter capacitor C3; one end of the capacitor C1, which is far away from the capacitor C7, is electrically connected with a resistor R2 and a resistor R4, and one end of the resistor R4, which is far away from the resistor R2, is electrically connected with the cathode of the filter capacitor C3; the capacitor C1 and the capacitor C7 are communicated with the resistor R2 and the resistor R4; the positive electrode of the filter resistor C3 is electrically connected with a resistor R1, a capacitor C2, a resistor R5 and a capacitor C8, and one end of the capacitor C8 far away from the resistor R5 is electrically connected with the negative electrode of the filter capacitor C3.
The positive electrode of the filter capacitor C3 is electrically connected with the collector of an IGBT Q1, the gate electrode of the IGBT Q1 is connected with a signal G2, the emitter of the IGBT Q1 is electrically connected with the collector of an IGBT Q2, the emitter of the IGBT Q2 is electrically connected with the negative electrode of the filter capacitor C3, and the gate electrode of the IGBT Q2 is connected with a signal G4; the capacitor C2 and the resistor R5 are communicated with the emitter of the IGBT Q1 and the collector of the IGBT Q2, and are electrically connected to a port 2 on the primary side of the intermediate frequency transformer T1, a port 1 on the primary side of the intermediate frequency transformer T1 is electrically connected to the transformer T2, and one end of the transformer T2, which is far from the intermediate frequency transformer T1, is electrically connected between the resistor R2 and the resistor R4.
The secondary side of the intermediate frequency transformer T1 includes a first secondary side and a second secondary side, the ports of the first secondary side are port 5 and port 6, and the ports of the second secondary side include port 3 and port 4.
Referring to fig. 4, the inverter rectification circuit 3 includes an inverter rectification diode D1 and an inverter rectification diode D3, the port 6 is electrically connected with a resistor R6 and an anode of the inverter rectification diode D1, the resistor R6 is electrically connected with a capacitor C5, and the other end of the capacitor C5 and a cathode of the inverter rectification diode D1 are electrically connected with the first output terminal U1; port 5 is electrically connected to second output terminal U2; the port 4 is electrically connected with a resistor R11 and the anode of an inverter rectifier diode D3, the resistor R11 is electrically connected with a capacitor C10, and the other end of the capacitor C10 and the cathode of the inverter rectifier diode D3 are simultaneously and electrically connected with a first output end U1; port 3 is electrically connected to second output terminal U2; a filter circuit 31 is electrically connected between the first output terminal U1 and the second output terminal U2.
The filter circuit 31 comprises a resistor R7, two ends of the resistor R7 are respectively connected with a first output end U1 and a second output end U2, two ends of the resistor R7 are connected in parallel with a capacitor C6, two ends of the capacitor C6 are respectively connected in parallel with a capacitor C4 and a capacitor C9, and one ends of the capacitor C4 and one end of the capacitor C9 far away from the capacitor C6 are connected in parallel with a digital ground.
The implementation principle of the embodiment is as follows: when the power switch SW1 is turned on, the commercial power flows to the anti-surge circuit 4 through the rectifier bridge B1; after the input circuit 1 outputs a signal, the signal is input into the anti-surge circuit 4, the resistor R16 detects a voltage signal at two ends of the capacitor C3, and the voltage signal is compared with a given voltage value through a linear optocoupler U2, a resistor R12 and a resistor R15 to a non-inverting input end 3 of a comparator U1; when the power supply is turned on, because the voltage at the two ends of the capacitor C3 is lower than the set value voltage (determined according to the capacitance of the capacitor) of the non-inverting input end 3 of the comparator U1, the direct current in the circuit charges the capacitor C3 through the current-limiting resistor R20, when the voltage is higher than the voltage at the non-inverting input end 3 of the comparator U1 (at the moment, the voltage value at the two ends of the capacitor C3 is close to the voltage of the normal charging current), the comparator U1 overturns to output high level, the NPN triode Q3 is conducted through the voltage-dividing resistor R13 and the triode current-limiting resistor R9, the relay RLY1 is conducted, and the main loop finishes full-voltage charging to; the signal passing through the filter capacitor C3 passes through the drive circuit 2 in sequence, and when the IGBT Q1 is turned on, the signal passing through the IGBT Q1 flows to the analog ground through the port 2 on the primary side of the intermediate frequency transformer T1, the port 1, the transformer T2, the resistor R4, and the capacitor C7; when the IGBT Q2 is turned on, a signal flows from the capacitor C1, the resistor R2, and the transformer T2 to the port 1 and the port 2 on the primary side of the intermediate frequency transformer T1, then flows through the IGBT Q2, and flows to analog ground; then, the intermediate frequency transformer T1 is used for converting voltage signals through the intermediate frequency transformer T1 and the inverter rectification circuit 3, and the inverter rectification circuit 3 is used for outputting signals after the output signals of the intermediate frequency transformer T1 are subjected to inverter rectification.
A surge-proof current-limiting method applied to an inverter welding machine power supply comprises the following steps,
s1: the commercial power forms a first signal after passing through the input circuit 1;
s2: the first signal is input into the anti-surge circuit 4 to form a sixth signal, and the voltage at two ends of the filter capacitor C3 is monitored, so that the current of the filter capacitor C3 is limited;
s3: the sixth signal forms a second signal after passing through a filter capacitor C3;
s4: the second signal forms a third signal after passing through the driving circuit 2;
s5: the third signal forms a fourth signal via an intermediate frequency transformer T1;
s6: the fourth signal passes through the inverter rectification circuit 3 and then outputs a fifth signal.
The embodiments of the present invention are preferred embodiments of the present invention, and the scope of the present invention is not limited by these embodiments, so: all equivalent changes made according to the structure, shape and principle of the invention are covered by the protection scope of the invention.
Claims (9)
1. An anti-surge current-limiting circuit applied to an inverter welding machine power supply comprises a plurality of current-limiting circuits which are connected in sequence through signals,
the input circuit (1) is used for inputting commercial power and forming a first signal;
a filter capacitor C3 for filtering the first signal and forming a second signal;
a drive circuit (2) for outputting a different third signal in accordance with the second signal;
the intermediate frequency transformer T1 is used for outputting a fourth signal after the third signal is changed in proportion;
the inversion rectifying circuit (3) is used for inverting and rectifying the fourth signal and outputting a fifth signal;
the method is characterized in that: an anti-surge circuit (4) is electrically connected between the input circuit (1) and the filter capacitor C3, and the anti-surge circuit (4) is used for monitoring the voltage at two ends of the filter capacitor C3 in real time and limiting the current of the filter capacitor C3 according to the voltage at two ends of the filter capacitor C3.
2. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 1, wherein: the anti-surge circuit (4) comprises a current-limiting resistor R20, one end of the current-limiting resistor is electrically connected with the input circuit (1), the other end of the current-limiting resistor is connected with the anode of a diode D2 and the filter capacitor C3 in a signal mode, the cathode of the diode D2 is electrically connected with a resistor R8 and a resistor R10 in sequence, one end, far away from the resistor R8, of the resistor R10 is electrically connected with the anode of a light-emitting diode in a linear optocoupler U2, the cathode of the light-emitting diode in the linear optocoupler U2 is electrically connected with a resistor R16, the other end of the resistor R16 is connected with an analog ground, the collector of an NPN triode in the linear optocoupler U2 is electrically connected with a resistor;
an emitter of an NPN triode in the linear optocoupler U2 is electrically connected with a non-inverting output end 3 of a comparator U1, the non-inverting input end 3 of the comparator U1 is further electrically connected with a resistor R15, and the other end of the resistor R15 is grounded; the inverting input end 2 of the comparator U1 is electrically connected with a resistor R14, the other end of the resistor R14 is connected with VCC, the inverting input end of the comparator U1 is also electrically connected with a resistor R17, and the other end of the resistor R17 is grounded; the output end 1 of the inverter U1 is electrically connected with a resistor R13, and the other end of the resistor R13 is grounded;
the output end 1 of the inverter U1 is further electrically connected with a triode current-limiting resistor R9, the other end of the triode current-limiting resistor R9 is electrically connected with a base electrode of an NPN triode Q3, an emitting electrode of the NPN triode Q3 is grounded, a collector electrode of the NPN triode Q3 is electrically connected with an anode of a diode D4, a cathode of the diode D4 is connected with VCC, two ends of the diode D4 are further connected with a coil of a relay RLY1 in parallel, and switches of the relay RLY1 are connected with two ends of the current-limiting resistor R20 in parallel.
3. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 1, wherein: the input circuit (1) comprises a mains supply input (11), a power switch SW1 and a rectifier bridge B1, and the output end of the rectifier bridge B1 is electrically connected with the anti-surge circuit (4).
4. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 1, wherein: the filter capacitor C3 adopts a patch capacitor, the anode of the filter capacitor C3 is electrically connected with the anti-surge circuit (4) and is connected with VCC, and the cathode of the filter capacitor C3 is connected with analog ground.
5. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 1, wherein: the driving circuit (2) comprises a resistor R3 connected in parallel with two ends of the filter capacitor C3, the positive electrode of the filter capacitor C3 is electrically connected with a capacitor C1 and a capacitor C7, and one end, far away from the capacitor C1, of the capacitor C7 is electrically connected with the negative electrode of the filter capacitor C3;
one end of the capacitor C1, which is far away from the capacitor C7, is electrically connected with a resistor R2 and a resistor R4, and one end of the resistor R4, which is far away from the resistor R2, is electrically connected with the cathode of the filter capacitor C3; the capacitor C1 and the capacitor C7 are communicated with the resistor R2 and the resistor R4;
the positive electrode of the filter resistor C3 is electrically connected with a resistor R1, a capacitor C2, a resistor R5 and a capacitor C8, and one end of the capacitor C8, which is far away from the resistor R5, is electrically connected with the negative electrode of the filter capacitor C3;
the positive electrode of the filter capacitor C3 is electrically connected with the collector of an IGBT Q1, the gate of the IGBT Q1 is connected with a signal G2, the emitter of the IGBT Q1 is electrically connected with the collector of an IGBT Q2, the emitter of the IGBT Q2 is electrically connected with the negative electrode of the filter capacitor C3, and the gate of the IGBT Q2 is connected with a signal G4; the capacitor C2 and the resistor R5 are connected to the emitter of the IGBT Q1 and the collector of the IGBT Q2, and are electrically connected to a port 2 on the primary side of the intermediate frequency transformer T1, a transformer T2 is electrically connected to a port 1 on the primary side of the intermediate frequency transformer T1, and one end of the transformer T2, which is far from the intermediate frequency transformer T1, is electrically connected between the resistor R2 and the resistor R4.
6. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 1, wherein: the secondary side of the intermediate frequency transformer T1 includes a first secondary side and a second secondary side, the ports of the first secondary side are port 5 and port 6, and the ports of the second secondary side include port 3 and port 4.
7. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 6, wherein: the inverter rectification circuit (3) comprises an inverter rectification diode D1 and an inverter rectification diode D3, the port 6 is electrically connected with a resistor R6 and the anode of the inverter rectification diode D1, the resistor R6 is electrically connected with a capacitor C5, and the other end of the capacitor C5 and the cathode of the inverter rectification diode D1 are simultaneously and electrically connected with a first output end U1;
the port 5 is electrically connected with a second output end U2;
the port 4 is electrically connected with a resistor R11 and the anode of the inverting rectifying diode D3, the resistor R11 is electrically connected with a capacitor C10, and the other end of the capacitor C10 and the cathode of the inverting rectifying diode D3 are simultaneously and electrically connected with a first output end U1;
the port 3 is electrically connected with a second output end U2;
a filter circuit (31) is electrically connected between the first output end U1 and the second output end U2.
8. The surge-proof current-limiting circuit applied to the power supply of the inverter welding machine as claimed in claim 7, wherein: the filter circuit (31) comprises a resistor R7, two ends of the resistor R7 are respectively connected with the first output end U1 and the second output end U2, two ends of the resistor R7 are connected with a capacitor C6 in parallel, two ends of the capacitor C6 are respectively and electrically connected with a capacitor C4 and a capacitor C9, and one ends of the capacitor C4 and the capacitor C9 far away from the capacitor C6 are communicated and connected with a digital ground.
9. A surge-proof current-limiting method applied to an inverter welding machine power supply is characterized in that: the method is as follows, and the method comprises the following steps,
s1: the commercial power forms a first signal after passing through the input circuit (1);
s2: the first signal is input into the anti-surge circuit (4) to form a sixth signal, and the voltage at two ends of the filter capacitor C3 is monitored, so that the current of the filter capacitor C3 is limited;
s3: the sixth signal forms a second signal after passing through a filter capacitor C3;
s4: the second signal forms a third signal after passing through the driving circuit (2);
s5: the third signal forms a fourth signal via an intermediate frequency transformer T1;
s6: the fourth signal passes through the inverter rectification circuit (3) and then outputs a fifth signal.
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Application publication date: 20200821 |