CN111552207B

CN111552207B - Signal processing method, device, equipment and storage medium

Info

Publication number: CN111552207B
Application number: CN202010331690.4A
Authority: CN
Inventors: 祝成军; 王晶; 辛华强; 赵龙; 李丹
Original assignee: Accelink Technologies Co Ltd
Current assignee: Accelink Technologies Co Ltd
Priority date: 2020-04-24
Filing date: 2020-04-24
Publication date: 2021-10-12
Anticipated expiration: 2040-04-24
Also published as: CN111552207A

Abstract

The embodiment of the invention discloses a signal processing method, a signal processing device, signal processing equipment and a storage medium, wherein the method is applied to an optical module, and the optical module comprises a golden finger and a register; the register comprises an alarm register and a corresponding shielding register; the golden finger comprises a state foot; the method comprises the following steps: obtaining the state of a first flag variable according to the operation of reading the register; the state representation of the first flag variable indicates whether to record the operation of reading the alarm register; obtaining a state of a second flag variable; the state of the second flag variable represents whether the operation of the state pin to be set to high level is set; judging whether the state of the first flag variable and the state of the second flag variable meet a preset condition or not; under the condition that the state of the first flag variable and the state of the second flag variable meet preset conditions, acquiring the state of a first alarm register and the state of a corresponding first mask register; and determining the state of the state pin according to the state of the first alarm register and the state of the first mask register.

Description

Signal processing method, device, equipment and storage medium

Technical Field

The present invention relates to the field of optical module technologies, and in particular, to a signal processing method, an apparatus, a device, and a storage medium.

Background

At present, a plurality of optical module golden fingers comprise status pins (INTL pins), such as (Quad Small Form-Factor plug (QSFP) optical modules, (Small Form Factor plug, XFP) optical modules, etc., the INTL pins are the reaction of all abnormal state sets of the optical modules, if the INTL pins are low level, the optical modules have abnormal unshielded alarm flag setting, such as temperature alarm, emitted light power alarm, voltage alarm, etc., the reasons for the low-down of the INTL pins can be obtained by inquiring corresponding alarm state registers of the optical modules, clearing (the alarm state of the optical modules with the INTL pins is latch state, the alarm state is cleared after reading) or shielded by the shielding registers, if the corresponding alarm state is cleared after reading and the modules have no other alarm state or the corresponding alarm state is shielded by the shielding registers, the INTL pins are released to be high level, and in addition, the INTL pins have corresponding software state bits, when the INTL hardware pin is set high or low, the corresponding software status bit is also updated accordingly.

The optical module related protocol definition is generated from the abnormal state of the optical module to the INTL pin, the maximum time is 100ms, the optical module related abnormal alarm register is read, the alarm mark is cleared to the INTL pin and released to the high level, the maximum time is 500us, the corresponding alarm mark shielding register 1 generating the alarm is blocked to the INTL pin, the low level is set, the maximum time is 100ms, the corresponding alarm mark shielding register 0 generating the alarm can be normally set to the low level, and the maximum time is 100 ms.

Software of an optical module executes other operations except an interrupt processing function, usually a polling mode is executed in series, for example, digital diagnosis, monitoring and updating of the optical module, such as voltage monitoring, temperature monitoring and the like, can only monitor voltage first, then monitor temperature or monitor temperature first, then monitor voltage, and the two cannot be monitored simultaneously, time defined by an optical module protocol is 100ms, 100ms can be realized by a polling mode, but release time of an INTL pin is 500us, the realization by the polling mode is difficult, if the realization by the polling mode is required, only a splitting function, for example, complete transmission light power reporting, generally needs to be subjected to ADC sampling and calibration, relevant alarm flags are updated three steps, a normal processing mode is that no other operation is inserted in three steps of operation, the sequential execution is carried out, but if the polling processing mode is required to ensure the release time of the INTL is 500us, the method may need to be split into three steps, and INTL update operation is inserted to shorten single polling time and ensure that the INTL pin state is updated within 500us, or a timer interrupt mode is adopted, and the INTL pin state is updated every 500us, so as to ensure that the protocol-related time definition can be met. No effective solution to this problem is currently available.

Disclosure of Invention

In view of the above, embodiments of the present invention are intended to provide a signal processing method, apparatus, device and storage medium.

The technical embodiment of the invention is realized as follows:

the embodiment of the invention provides a signal processing method, which is applied to an optical module, wherein the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; the method comprises the following steps:

obtaining the state of a first flag variable according to the operation of reading the register; the state representation of the first flag variable indicates whether to record and read the operation of the alarm register;

obtaining a state of a second flag variable; the state of the second flag variable characterizes whether the operation of the state pin to be set to a high level is set;

judging whether the state of the first flag variable and the state of the second flag variable meet a preset condition or not;

under the condition that the state of the first flag variable and the state of the second flag variable meet preset conditions, acquiring the state of a first alarm register and the state of a corresponding first mask register; the first alarm register is any one alarm register in the registers; the first mask register is any one mask register in the registers;

and determining the state of the state pin according to the state of the first alarm register and the state of the first mask register.

In the above solution, the obtaining the state of the first flag variable according to the operation of reading the register includes:

triggering the optical module to enter the operation of reading communication interruption according to the operation of reading a register, and judging whether the register is the first alarm register;

if the register is not the first alarm register, holding the value of the register and the value of the first flag variable;

under the condition that the register is the first alarm register, controlling the value of the register to be set to zero from one and the value of the first flag variable to be set to one from zero;

the state of the first flag variable includes the value of the first flag variable being set to zero or one.

In the foregoing solution, the obtaining the state of the second flag variable includes:

judging whether the operation of setting the state pin to be a high level is set or not under the condition that the optical module executes other operations except reading communication interruption;

controlling the value of the second flag variable to be set to one under the condition that the operation of the state pin to be set to a high level is set;

controlling the value of the second flag variable to be set to zero under the condition that the operation of the state pin to be set to the high level is not set;

the state of the second flag variable includes the value of the second flag variable being set to zero or one.

In the foregoing solution, the determining whether the states of the first flag variable and the second flag variable satisfy a preset condition includes:

and judging whether the numerical value of the first flag variable and the numerical value of the second flag variable are set to be one or not.

In the foregoing solution, the obtaining a state of a first alarm register and a state of a corresponding first mask register when the states of the first flag variable and the second flag variable satisfy a preset condition includes:

and under the condition that the numerical value of the state of the first flag variable and the numerical value of the state of the second flag variable are set to be one, obtaining the numerical value of the first alarm register and the corresponding numerical value of the first mask register.

In the foregoing solution, the determining the state of the state pin according to the state of the first alarm register and the state of the first mask register includes:

judging whether the numerical value of the first alarm register is zero or not;

controlling the state pin to set a high level and the value of the first flag variable to be set to zero when the value of the first alarm register is zero;

under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not;

and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one.

In the above aspect, the method further includes:

updating the value of the second flag variable to zero; judging whether the numerical value of the first alarm register is zero or not;

and under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state position corresponding to the state pin to be zero.

In the above aspect, the method further includes:

updating the value of the second flag variable to one;

judging whether the numerical value of the first alarm register is zero or not;

under the condition that the numerical value of the first alarm register is zero, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin;

and under the condition that the numerical value of the first mask register is one, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin.

The embodiment of the invention provides a signal processing device, which is connected with an optical module, wherein the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; the device comprises: an obtaining unit, a judging unit and a determining unit, wherein:

the obtaining unit is used for obtaining the state of the first flag variable according to the operation of reading the register; the state representation of the first flag variable indicates whether to record and read the operation of the alarm register; and obtaining a state of the second flag variable; the state of the second flag variable characterizes whether the operation of the state pin to be set to a high level is set;

the judging unit is used for judging whether the state of the first flag variable and the state of the second flag variable obtained by the obtaining unit meet preset conditions or not;

the obtaining unit is further configured to obtain a state of a first alarm register and a state of a corresponding first mask register when the states of the first flag variable and the second flag variable satisfy a preset condition; the first alarm register is any one alarm register in the registers; the first mask register is any one mask register in the registers;

the determining unit is configured to determine the state of the state pin based on the state of the first alarm register and the state of the first mask register obtained by the obtaining unit.

In the above scheme, the obtaining unit is further configured to trigger the optical module to enter an operation of reading communication interruption according to an operation of reading a register, and determine whether the register is the first alarm register; if the register is not the first alarm register, holding the value of the register and the value of the first flag variable; under the condition that the register is the first alarm register, controlling the value of the register to be set to zero from one and the value of the first flag variable to be set to one from zero; the state of the first flag variable includes the value of the first flag variable being set to zero or one.

In the above scheme, the obtaining unit is further configured to determine whether an operation that the status pin is to be set to a high level is set when the optical module performs other operations except for reading communication interruption; controlling the value of the second flag variable to be set to one under the condition that the operation of the state pin to be set to a high level is set; controlling the value of the second flag variable to be set to zero under the condition that the operation of the state pin to be set to the high level is not set; the state of the second flag variable includes the value of the second flag variable being set to zero or one.

In the foregoing solution, the determining unit is further configured to determine whether the value of the first flag variable and the value of the second flag variable are set to be one.

In the foregoing solution, the obtaining unit is further configured to obtain the value of the first alarm register and the corresponding value of the first mask register when the value of the state of the first flag variable and the value of the state of the second flag variable are set to be one.

In the above scheme, the determining unit is further configured to determine whether a value of the first alarm register is zero; controlling the state pin to set a high level and the value of the first flag variable to be set to zero when the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one.

In the above solution, the apparatus further comprises: the updating unit is used for updating the value of the second mark variable to be set to zero; judging whether the numerical value of the first alarm register is zero or not; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state position corresponding to the state pin to be zero.

In the foregoing solution, the updating unit is further configured to update the value of the second flag variable to be set to one, and determine whether the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is zero, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is one, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin.

An embodiment of the present invention provides a signal processing apparatus, including a memory and a processor, where the memory stores a computer program operable on the processor, and the processor implements any step of the above method when executing the program.

Embodiments of the present invention provide a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements any of the steps of the above-mentioned method.

The embodiment of the invention provides a signal processing method, a signal processing device, a signal processing apparatus and a storage medium, wherein the signal processing method comprises the following steps: obtaining the state of a first flag variable according to the operation of reading the register; the state representation of the first flag variable indicates whether to record and read the operation of the alarm register;

obtaining a state of a second flag variable; the state of the second flag variable characterizes whether the operation of the state pin to be set to a high level is set; judging whether the state of the first flag variable and the state of the second flag variable meet a preset condition or not; under the condition that the state of the first flag variable and the state of the second flag variable meet preset conditions, acquiring the state of a first alarm register and the state of a corresponding first mask register; the first alarm register is any one alarm register in the registers; the first mask register is any one mask register in the registers; and determining the state of the state pin according to the state of the first alarm register and the state of the first mask register. By adopting the technical scheme of the embodiment of the invention, the optical module is immediately triggered to enter the reading interruption operation through the operation of reading the register, and after the reading interruption operation is finished, the state of the first alarm register and the state of the corresponding first shielding register are obtained according to the state of the first flag variable and the state of the second flag variable, so that the state of the state pin is released to be a high level; the time for releasing the state pin to be the high level is realized to meet the protocol requirement, timer interruption is not required to be increased or polling time is shortened by various methods, and the reliability of software is greatly improved.

Drawings

FIG. 1 is a schematic diagram of a signal processing method according to an embodiment of the present invention;

FIG. 2 is a schematic flow chart illustrating a process flow of I2C reading an interrupt function in the signal processing method according to the embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating a process flow of an I2C communication termination interrupt function in the signal processing method according to the embodiment of the invention;

FIG. 4 is a schematic diagram illustrating a processing flow of executing a processing function of a status pin in a polling manner according to an embodiment of the invention;

FIG. 5 is a schematic diagram of a signal processing apparatus according to an embodiment of the present invention;

fig. 6 is a schematic diagram of a hardware entity structure of a signal processing device according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the following describes specific technical solutions of the present invention in further detail with reference to the accompanying drawings in the embodiments of the present invention. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.

The embodiment provides a signal processing method, which is applied to an optical module, wherein the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; fig. 1 is a schematic flow chart of a signal processing method according to an embodiment of the present invention, and as shown in fig. 1, the method includes:

step S101: obtaining the state of a first flag variable according to the operation of reading the register; and the state of the first flag variable represents whether the operation of reading the alarm register is recorded or not.

In the embodiment of the invention, the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; the alarm register is used for carrying out alarm prompt when the optical module is abnormal; as an example, the alarm may include a temperature alarm, an emitted optical power alarm, a voltage alarm, etc.; the corresponding shielding register can be understood as that each alarm register corresponds to one shielding register, the shielding register is used for indicating whether existing alarm is irrelevant under the condition that an optical module is abnormal, and the shielding register can shield the existing alarm under the condition that the alarm does not affect each function of the optical module; the mask register does not mask existing alarms, in case the alarm can have a significant impact on the respective function of the optical module.

The optical module can be connected with a signal processing device; as an example, the optical module may be inserted into the signal processing device by a gold finger; as an embodiment, the device may be an electronic device, such as a computer, a mainframe, etc.; the device may also be a processing device, such as a system board or the like; the state of the first flag variable obtained by the signal processing device according to the operation of reading the register can be an operation of triggering the optical module to immediately enter a reading communication interruption according to the operation of reading the register, and then whether the register is the alarm register is judged; maintaining the state of the register and the state of the first flag variable if the register is not the alarm register; updating the state of the register and the state of the first flag variable under the condition that the register is the alarm register; the first flag variable is a flag variable defined by optical module software and used for recording whether the operation of reading the register is the operation of reading the alarm register; the state of the first flag variable includes a set state and an unset state, and as an example, if the operation of reading the register is the operation of reading the alarm register, the state of setting the first flag variable is performed, for example, in the case where the operation of reading the register is the operation of reading the alarm register, the value of the first flag variable may be set to one and displayed as a high level; a state in which no operation is performed on the first flag variable if the operation of reading the register is not the operation of reading the alarm register, for example, in a case where the operation of reading the register is not the operation of reading the alarm register, the value of the first flag variable may be kept set to zero, and displayed as a low level; the state of the first flag variable being set may indicate that the alarm register has been read to clear 0, and otherwise, the state is the state of the first flag variable not being set.

Step S102: obtaining a state of a second flag variable; the state of the second flag variable characterizes whether the operation to be set to a high level by the state pin is set.

In this embodiment, the state of the second flag variable is obtained; the second flag variable is used for describing whether the status pin is about to execute an operation set to a high level or not under the condition that software of the optical module is executed serially in a polling mode; the state of the second flag variable may be a state in which an operation set to a high level is to be performed by the state pin is set and a state in which an operation set to a high level is not to be performed by the state pin; as an example, the pending execution of the operation set to high level is set, and the value of the second flag variable may be set to one, and displayed as high level; the pending operation of the status flag to be set to high is not set, and the value of the second flag variable may be kept set to zero, and is displayed as low.

Step S103: and judging whether the state of the first flag variable and the state of the second flag variable meet preset conditions.

In this embodiment, the determining whether the state of the first flag variable and the state of the second flag variable satisfy the preset condition may be determining whether the state of the first flag variable and the state of the second flag variable are set states; as an example, it may be determined whether the value of the first flag variable and the value of the second flag variable are set to one.

Step S104: under the condition that the state of the first flag variable and the state of the second flag variable meet preset conditions, acquiring the state of a first alarm register and the state of a corresponding first mask register; the first alarm register is any one alarm register in the registers; the first mask register is any one of the registers.

In this embodiment, obtaining the state of the first alarm register and the state of the corresponding first mask register may be, under the condition that the state of the first flag variable and the state of the second flag variable satisfy a preset condition, obtaining the state of the first alarm register and the state of the corresponding first mask register when the state of the first flag variable and the state of the second flag variable are set states; the state of the first alarm register may include a set state and an unset state, where the set state may be a set state, and represents that an alarm exists when an optical module is abnormal, that is, a high-level state is displayed; the unset state can be a zero state, which represents that the optical module has no abnormity and no alarm exists, namely, the state of low level is displayed; the states of the corresponding first mask registers may include a set state and an unset state, where the set state may be a one-set state indicating that an alarm exists in the first alarm register but the alarm is masked, i.e., a state showing a high level; the unset state may be a set-to-zero state, which indicates that there is an alarm in the first alarm register but the alarm is not masked, i.e., a state of displaying a low level; as an example, the state of the first alarm register and the state of the corresponding first mask register may be obtained in a polling manner when the value of the first flag variable and the value of the second flag variable are both set to one; the state of the first alarm register may include a state in which the value of the first alarm register is set to zero or set to one; the state of the first mask register may include a state in which the value of the first mask register is set to zero or set to one.

Step S105: and determining the state of the state pin according to the state of the first alarm register and the state of the first mask register.

In this embodiment, determining the state of the state pin according to the state of the first alarm register and the state of the first mask register may be determining the state of the state pin according to a state of setting a value of the first alarm register to zero or one and a state of setting a value of the first mask register to zero or one; the state of the state pin comprises a high level state or a low level state. As an example, it may be determined whether the value of the first alarm register is zero; controlling the state pin to set a high level and the value of the first flag variable to be set to zero when the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one. Namely, whether the first alarm register has an alarm or not is judged, whether the alarm is shielded by the corresponding first shielding register or not is judged under the condition that the first alarm register has an alarm, if the first alarm register has no alarm or the first alarm register has an alarm but the corresponding first shielding register shields the alarm, the state pin is released to be at a high level, otherwise, the state pin is set to be at a low level for alarm.

According to the signal processing method provided by the embodiment of the invention, the optical module is immediately triggered to enter the reading interruption operation through the operation of the reading register, and after the reading interruption operation is finished, the state of the first alarm register and the state of the corresponding first shielding register are obtained according to the state of the first flag variable and the state of the second flag variable, so that the state of the state pin is released to be a high level; the time for releasing the state pin to be the high level is realized to meet the protocol requirement, timer interruption is not required to be increased or polling time is shortened by various methods, and the reliability of software is greatly improved.

In an optional embodiment of the present invention, the obtaining the state of the first flag variable according to the operation of reading the register may include: triggering the optical module to enter the operation of reading communication interruption according to the operation of reading a register, and judging whether the register is the first alarm register; if the register is not the first alarm register, holding the value of the register and the value of the first flag variable; under the condition that the register is the first alarm register, controlling the value of the register to be set to zero from one and the value of the first flag variable to be set to one from zero; the state of the first flag variable includes the value of the first flag variable being set to zero or one.

In this embodiment of the present invention, the operation that the signal processing device triggers the optical module to enter the read communication interrupt according to the operation of reading the register may be an operation that the signal processing device triggers the optical module to enter a communication bus to read a communication interrupt processing function according to the operation of reading the register, and as an example, the communication bus may be an Inter-Integrated Circuit (I2C).

Judging whether the register is the first alarm register or not can be judging whether the register is the first alarm register or not according to the address of the read register; correspondingly, in the case that the register is not the first alarm register, the value of the register and the value of the first flag variable may be maintained in the case that the address of the register is not the address of the first alarm register. In other words, in the case where the address of the register is not the address of the first alarm register, no operation is performed on the value of the register and the value of the first flag variable. Correspondingly, in the case that the register is the first alarm register, the setting of the value of the register from one to zero and the setting of the value of the first flag variable from zero to one may be controlling the setting of the value of the register from one to zero and the setting of the value of the first flag variable from zero to one in the case that the address of the register is the address of the first alarm register. In other words, in the case where the address of the register is the address of the first alarm register, the value of the register is cleared and the value of the first flag variable is set.

In practical application, a first flag variable may be defined in optical module software, and is used to represent whether to record and read the content of an alarm in the alarm register, where an initial value of the first flag variable is zero, which indicates that the first flag variable is not set; when the alarm register has an alarm, setting the numerical value of the alarm register to be one to indicate that the optical module has an abnormality and the alarm exists, and setting the alarm register; and under the condition that the content of the alarm in the alarm register is read, controlling the value of the alarm register to be set to zero from one, correspondingly, controlling the value of the first flag variable to be set to zero from one, so as to represent that the first flag variable corresponding to the alarm register is set, and recording that the alarm register of the optical module is read to be clear 0.

For convenience of understanding, the device is taken as a system board for example, and fig. 2 is a schematic flow chart of processing of reading an interrupt function by I2C in the signal processing method according to the embodiment of the present invention; 21, triggering the optical module to enter an I2C reading interrupt processing function according to the operation of reading the register by the system board; 22 denotes a judgment whether the read register is an alarm register; 24, in the case that the read register is not the alarm register, the system board processes the I2C read to interrupt other conventional I2C communication operations; 23, in the case that the read register is an alarm register, clearing the value of the alarm register, setting a first flag variable, setting the value of the first flag variable to one to represent that the alarm register is read, and 24, processing the reading of I2C and interrupting other conventional I2C communication operations by the system board; 25 denotes the system board exit I2C reading the interrupt handling function.

In an optional embodiment of the present invention, the obtaining the state of the second flag variable may include: judging whether the operation of setting the state pin to be a high level is set or not under the condition that the optical module executes other operations except reading communication interruption; controlling the value of the second flag variable to be set to one under the condition that the operation of the state pin to be set to a high level is set; controlling the value of the second flag variable to be set to zero under the condition that the operation of the state pin to be set to the high level is not set; the state of the second flag variable includes the value of the second flag variable being set to zero or one.

In the embodiment of the present invention, when the optical module performs other operations except for reading communication interruption, the other operations except for reading communication interruption may include an operation of ending communication interruption, an operation of polling communication, and the like.

After the operation of reading the register by the signal processing device is finished, the operation of communication end interruption is immediately entered, and as an example, the operation of I2C communication end interruption may be entered.

Judging whether the operation of the state pin to be set to the high level is set or not can be judging whether the operation of the state pin to be set to the high level is set or not; correspondingly, under the condition that the operation to be set to the high level by the state pin is set, controlling the value of the second flag variable to be set to one may be controlling the value of the second flag variable to be set to one under the condition that the operation to be set to the high level by the state pin is set; in other words, in the case where the operation to be set to high level by the status pin is set, it is necessary to control the value of the second flag variable to be set from zero to one. Correspondingly, in a case where the operation to be set to the high level by the state pin is not set, controlling the value of the second flag variable to be set to zero may be to keep the value of the second flag variable to be set to zero in a case where the operation to be set to the high level by the state pin is not set. In other words, in the case where the operation to be set to the high level by the status pin is not set, no operation may be performed on the second flag variable.

In practical applications, a second flag variable may be defined in the light module software, and is used to characterize an operation in which the status pin is to be set to a high level, and a status of the second flag variable may include a set status and an unset status, where the set status may be a value of the second flag variable set to one, and the unset status may be a value of the second flag variable set to zero. The initial value of the second flag variable is generally zero, indicating that the second flag variable is not set; in the case where the operation to be set to the high level by the status pin is set, it is necessary to control the value of the second flag variable to be set from zero to one.

In an optional embodiment of the present invention, the determining whether the states of the first flag variable and the second flag variable satisfy a preset condition includes: and judging whether the numerical value of the first flag variable and the numerical value of the second flag variable are set to be one or not.

In this embodiment, whether the values of the first flag variable and the second flag variable are set is determined to determine whether the first flag variable and the second flag variable are set, mainly considering that an operation of reading a register triggers the optical module to enter an operation of reading communication interruption, and when the register is the first alarm register, the value of the register needs to be cleared, and the status pin may need to be released to a high level.

In an optional embodiment of the present invention, the obtaining the state of the first alarm register and the state of the corresponding first mask register when the states of the first flag variable and the second flag variable satisfy a preset condition includes: and under the condition that the numerical value of the state of the first flag variable and the numerical value of the state of the second flag variable are set to be one, obtaining the numerical value of the first alarm register and the corresponding numerical value of the first mask register.

In this embodiment, when the value of the state of the first flag variable and the value of the state of the second flag variable are set to one, the obtaining of the value of the first alarm register and the corresponding value of the first mask register may be a round-robin method for obtaining the value of any one alarm register and the corresponding value of any one mask register when the value of the state of the first flag variable and the value of the state of the second flag variable are set to one.

In practical application, when the operation of reading the register is to read the alarm register, the value of the state of the first flag variable is immediately set to one, and whether the value of the state of the second flag variable is set to one is further determined.

In an optional embodiment of the present invention, the determining the state of the state pin according to the state of the first alarm register and the state of the first mask register includes: judging whether the numerical value of the first alarm register is zero or not; controlling the state pin to set a high level and the value of the first flag variable to be set to zero under the condition that the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one.

In this embodiment, the fact that the value of the first alarm register is not zero means that the value of the first alarm register is one, and an alarm exists; the value of the first alarm register is zero, which indicates that no alarm exists; the value of the first mask register is one, which indicates that the alarm is masked; a value of zero in the first mask register indicates that the alarm is unmasked.

Judging whether the value of the first alarm register is zero or not is to judge whether alarms exist in all alarm registers in the optical module or not, and controlling the state pin to be set at a high level under the condition that no alarm register alarms exist, namely, the state pin needs to be released to be the high level, and then setting the first flag variable to be zero, or can be understood as setting the first flag variable to be zero or cleared, so that the operation of reading the state pin corresponding to the alarm register and releasing the state pin to be the high level is executed; in the case that there is an alarm of the alarm register, it is further necessary to further determine whether the alarm is masked by the corresponding mask register, and after the alarm is masked by the corresponding mask register, the state pin also needs to be released to a high level, and then the first flag variable is set to zero, which may also be understood as zero clearing or clearing the first flag variable, indicating that the operation of reading the state pin corresponding to the alarm register to release to the high level has been executed.

For convenience of understanding, the device is taken as a system board for illustration, and fig. 3 is a schematic flow chart illustrating a processing flow of an I2C communication ending interrupt function in the signal processing method according to the embodiment of the present invention; 31, after the operation of reading the register by the system board is finished, the optical module enters an I2C communication and finishes an interrupt processing function; 32 denotes a judgment of whether the value of the first flag variable and the value of the second flag variable are set to one; under the condition that the value of the first flag variable and the value of the second flag variable are not set to be one, directly entering a system board to process the I2C communication, and ending the communication to interrupt other conventional I2C communication operations; 35 represents that the system board processes the I2C communication end and interrupts other conventional I2C communication operations; 33, when the value of the first flag variable and the value of the second flag variable are both set to one, determining whether the value of the first alarm register is zero; and under the condition that the numerical value of the first alarm register is zero, judging whether the numerical value of the first mask register is one; 34 denotes controlling the state pin to go high and the value of the first flag variable to be set to zero in case the value of the first alarm register is zero or in case both the value of the first alarm register and the value of the first mask register are one; 35 represents that the system board processes the end of the I2C communication and interrupts other conventional I2C communication operations; 36 denotes the system board exit I2C communication ending interrupt handling function.

In an optional embodiment of the invention, the method further comprises: updating the value of the second flag variable to zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state position corresponding to the state pin to be zero.

In this embodiment, the value of the second flag variable is updated to be set to zero; namely, in the polling operation process of the software of the optical module, the second flag variable is cleared, which indicates that the operation of setting the status pin alarm to a low level is to be executed.

And under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not, namely under the condition that the numerical value of the first alarm register is one, judging whether the numerical value of the first mask register is one or not, namely under the condition that the first alarm register has an alarm, judging whether the first mask register masks the alarm or not.

And under the condition that the value of the first mask register is one, updating the value of the second flag variable to be set to be one, which can be understood as the alarm mask existing in the first alarm register by the first mask register, not performing any operation on the state pin, and setting the second flag variable, namely setting the value of the second flag variable from zero to one, which indicates that the operation of setting the state pin to a high level is to be performed in the polling process.

Under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state pin to be at a state position zero corresponding to the state pin, wherein the condition that the alarm existing in the first alarm register is not masked by the first mask register can be understood as that the alarm existing in the first alarm register is not masked by the first mask register, and controlling the state pin to be at the low level and the state position zero corresponding to the state pin; the state bit corresponding to the state pin may be a software state bit corresponding to the state pin; the zero state position corresponding to the state pin may be understood as updating the software state position corresponding to the state pin under the condition that the state pin is controlled to be at a low level, so that the software state position corresponding to the state pin is correspondingly consistent with the state of the state pin.

In an optional embodiment of the invention, the method further comprises: updating the value of the second flag variable to one; judging whether the numerical value of the first alarm register is zero or not; under the condition that the numerical value of the first alarm register is zero, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is one, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin.

In this embodiment, the value of the second flag variable is updated to be set to one; namely, in the polling operation process of the software of the optical module, the second flag variable is set to indicate that the operation of setting the state pin alarm to a high level is to be executed.

Judging whether the value of the first alarm register is zero or not can be understood as judging whether an alarm exists in the first alarm register or not; when the value of the first alarm register is zero, controlling the state pin to be at a high level and a state position one corresponding to the state pin may be understood as controlling the state pin to be at the high level and the state position one corresponding to the state pin when the first alarm register does not have an alarm; the state bit corresponding to the state pin may be a software state bit corresponding to the state pin; the first state position corresponding to the state pin can be understood as updating the software state bit corresponding to the state pin under the condition of controlling the state pin to be at a high level, so that the software state bit corresponding to the state pin is correspondingly consistent with the state of the state pin.

And under the condition that the numerical value of the first mask register is one, controlling the state pin to be at a high level and the state position one corresponding to the state pin, wherein the state position one corresponding to the state pin can be understood as the alarm mask existing in the first alarm register by the first mask register, and then controlling the state pin to be at the high level and the state position one corresponding to the state pin. The state bit corresponding to the state pin may be a software state bit corresponding to the state pin; the first state position corresponding to the state pin can be understood as updating the software state bit corresponding to the state pin under the condition of controlling the state pin to be at a high level, so that the software state bit corresponding to the state pin is correspondingly consistent with the state of the state pin.

If the alarm existing in the first alarm register is not masked by the first mask register, updating the value of the second flag variable to be zero; that is, under the condition that the alarm existing in the first alarm register is not masked by the first mask register, no operation is performed on the state pin and the state bit corresponding to the state pin, and only setting the value of the second flag variable from one to zero indicates that the operation of setting the state pin to the low level is to be performed in the polling process.

For convenience of understanding, the device is taken as a system board for illustration, and fig. 4 is a schematic processing flow diagram of a processing function of the status pin executed in a polling manner in the signal processing method according to the embodiment of the present invention; 41 denotes that the system board executes the software of the optical module to enter the main loop; 42 represents that the value of the second flag variable is set to zero, i.e. the second flag variable is cleared; 43 denotes determining whether the value of the first alarm register is zero and, in the case where the value of the first alarm register is not zero, determining whether the value of the first mask register is one; judging whether the first mask register has an alarm or not and the alarm is not masked by the first mask register; 44, when the value of the first alarm register is one and the value of the first mask register is zero, controlling the state pin to be at a low level and controlling the state pin to be at a zero position corresponding to the state pin; otherwise, directly jumping from 43 to 45 to set the value of the second flag variable to one; 45 indicates that the value of the second flag variable is updated to be set to one if the value of the first alarm register is zero and the values of the first alarm register and the first mask register are both one; 46 denotes determining whether the value of the first alarm register is zero and, in the case where the value of the first alarm register is not zero, determining whether the value of the first mask register is one; judging whether the first alarm register has an alarm or not and shielding the alarm by the first shielding register; 47 represents that the state pin is controlled to be set to a high level and the state position one corresponding to the state pin is controlled under the condition that the value of the first alarm register is zero and the values of the first alarm register and the first mask register are both one; setting the state pin to be a high level and updating the state bit corresponding to the state pin, namely the first alarm register has no alarm or the first alarm register has an alarm and is shielded by a first shielding register; otherwise, directly jumping from 46 to 48, and 48 represents that the system board executes other operations of polling the light modules; and 49, end.

The optical module is triggered to enter the reading interruption operation immediately through the operation of reading the register, and after the reading interruption operation is finished, the state of the first alarm register and the state of the corresponding first shielding register are obtained according to the state of the first flag variable and the state of the second flag variable, so that the state of a state pin is released to be a high level; the time for releasing the state pin to be the high level is realized to meet the protocol requirement, timer interruption is not required to be increased or polling time is shortened by various methods, and the reliability of software is greatly improved.

The embodiment provides a signal processing device, which is connected with an optical module, wherein the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; fig. 5 is a schematic diagram of a structure of a signal processing apparatus according to an embodiment of the present invention, and as shown in fig. 5, the apparatus 500 includes: an obtaining unit 501, a judging unit 502 and a determining unit 503, wherein:

the obtaining unit 501 is configured to obtain a state of a first flag variable according to an operation of reading a register; the state representation of the first flag variable indicates whether to record and read the operation of the alarm register; and obtaining a state of the second flag variable; the state of the second flag variable characterizes whether the operation of the state pin to be set to a high level is set;

the determining unit 502 is configured to determine whether the state of the first flag variable and the state of the second flag variable obtained by the obtaining unit 501 meet a preset condition;

the obtaining unit 501 is further configured to obtain a state of a first alarm register and a state of a corresponding first mask register when the states of the first flag variable and the second flag variable satisfy a preset condition; the first alarm register is any one alarm register in the registers; the first mask register is any one mask register in the registers;

the determining unit 503 is configured to determine the state of the state pin based on the state of the first alarm register and the state of the first mask register obtained by the obtaining unit 501.

In other embodiments, the obtaining unit 501 is further configured to trigger the optical module to enter a read communication interruption operation according to an operation of reading a register, and determine whether the register is the first alarm register; if the register is not the first alarm register, holding the value of the register and the value of the first flag variable; under the condition that the register is the first alarm register, controlling the value of the register to be set to zero from one and the value of the first flag variable to be set to one from zero; the state of the first flag variable includes the value of the first flag variable being set to zero or one.

In other embodiments, the obtaining unit 501 is further configured to determine whether an operation that the status pin is to be set to a high level is set when the optical module performs other operations except for reading communication interruption; controlling the value of the second flag variable to be set to one under the condition that the operation of the state pin to be set to a high level is set; controlling the value of the second flag variable to be set to zero under the condition that the operation of the state pin to be set to the high level is not set; the state of the second flag variable includes the value of the second flag variable being set to zero or one.

In other embodiments, the determining unit 502 is further configured to determine whether the value of the first flag variable and the value of the second flag variable are set to one.

In other embodiments, the obtaining unit 501 is further configured to obtain the value of the first alarm register and the corresponding value of the first mask register when the value of the state of the first flag variable and the value of the state of the second flag variable are set to one.

In other embodiments, the determining unit 503 is further configured to determine whether the value of the first alarm register is zero; controlling the state pin to set a high level and the value of the first flag variable to be set to zero when the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one.

In other embodiments, the apparatus 500 further comprises: the updating unit is used for updating the value of the second mark variable to be set to zero; judging whether the numerical value of the first alarm register is zero or not; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state position corresponding to the state pin to be zero.

In other embodiments, the updating unit is further configured to update the value of the second flag variable to be set to one, and determine whether the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is zero, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is one, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin.

The above description of the apparatus embodiments, similar to the above description of the method embodiments, has similar beneficial effects as the method embodiments. For technical details not disclosed in the embodiments of the apparatus according to the invention, reference is made to the description of the embodiments of the method according to the invention for understanding.

It should be noted that, in the embodiment of the present invention, if the signal processing method is implemented in the form of a software functional module and sold or used as a standalone product, the signal processing method may also be stored in a computer readable storage medium. With this understanding, technical embodiments of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a signal processing apparatus (which may be a personal computer, a server, or a network device) to perform all or part of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read Only Memory (ROM), a magnetic disk, or an optical disk. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.

Correspondingly, an embodiment of the present invention provides a signal processing apparatus, including a memory and a processor, where the memory stores a computer program operable on the processor, and the processor executes the computer program to implement the steps in the signal processing method provided in the foregoing embodiment.

Correspondingly, the embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, which, when executed by a processor, implements the steps in the signal processing method provided by the above-mentioned embodiment.

Here, it should be noted that: the above description of the storage medium and device embodiments is similar to the description of the method embodiments above, with similar advantageous effects as the method embodiments. For technical details not disclosed in the embodiments of the storage medium and the apparatus according to the invention, reference is made to the description of the embodiments of the method according to the invention.

It should be noted that fig. 6 is a schematic diagram of a hardware entity structure of a signal processing apparatus in an embodiment of the present invention, and as shown in fig. 6, the hardware entity of the signal processing apparatus 600 includes: a processor 601 and a memory 603, optionally the signal processing device 600 may further comprise a communication interface 602.

It will be appreciated that the memory 603 can be either volatile memory or nonvolatile memory, and can include both volatile and nonvolatile memory. Among them, the nonvolatile Memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a magnetic random access Memory (FRAM), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical disk, or a Compact Disc Read-Only Memory (CD-ROM); the magnetic surface storage may be disk storage or tape storage. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Enhanced Synchronous Dynamic Random Access Memory (Enhanced Synchronous Dynamic Random Access Memory), Synchronous link Dynamic Random Access Memory (DRAM, Synchronous Dynamic Random Access Memory), Direct Memory (DRmb Random Access Memory). The memory 403 described in connection with the embodiments of the invention is intended to comprise, without being limited to, these and any other suitable types of memory.

The method disclosed by the above-mentioned embodiment of the present invention can be applied to the processor 601, or implemented by the processor 601. The processor 601 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 601. The Processor 601 may be a general purpose Processor, a Digital Signal Processor (DSP), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. Processor 601 may implement or perform the methods, steps, and logic blocks disclosed in embodiments of the present invention. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed by the embodiment of the invention can be directly implemented by a hardware decoding processor, or can be implemented by combining hardware and software modules in the decoding processor. The software modules may be located in a storage medium located in the memory 603 and the processor 601 reads the information in the memory 603 and performs the steps of the method described above in conjunction with its hardware.

In an exemplary embodiment, the signal processing Device may be implemented by one or more Application Specific Integrated Circuits (ASICs), DSPs, Programmable Logic Devices (PLDs), Complex Programmable Logic Devices (CPLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, Micro Controllers (MCUs), microprocessors (microprocessors), or other electronic components for performing the foregoing methods.

In the embodiments provided in the present invention, it should be understood that the disclosed method and apparatus can be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the unit is only a logical functional division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another observation, or some features may be omitted, or not performed. In addition, the communication connections between the components shown or discussed may be through interfaces, indirect couplings or communication connections of devices or units, and may be electrical, mechanical or other.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

Those of ordinary skill in the art will understand that: all or part of the steps for realizing the method embodiments can be completed by hardware related to program instructions, the program can be stored in a computer readable storage medium, and the program executes the steps comprising the method embodiments when executed; and the aforementioned storage medium includes: various media that can store program codes, such as a removable storage device, a Read-only memory (ROM), a magnetic disk, or an optical disk.

Alternatively, the integrated unit according to the embodiment of the present invention may be stored in a computer-readable storage medium if it is implemented in the form of a software functional unit and sold or used as a separate product. With this understanding, technical embodiments of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a signal processing apparatus (which may be a personal computer, a server, or a network device) to perform all or part of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code.

The signal processing method, device and computer storage medium described in the embodiments of the present invention are only examples of the embodiments of the present invention, but are not limited thereto, and the signal processing method, device and computer storage medium are within the scope of the present invention.

It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in various embodiments of the present invention, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention. The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The above description is only an embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present invention, and all such changes or substitutions are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A signal processing method is characterized in that the method is applied to an optical module, and the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; the method comprises the following steps:

judging whether the state of the first flag variable and the state of the second flag variable meet a preset condition or not; the preset condition is that the state of the first flag variable is set to represent that the operation of reading the alarm register is to record that the operation of reading the alarm register and the state of the second flag variable is set to represent that the state pin is to be set to a high level;

2. The method of claim 1, wherein obtaining the state of the first flag variable based on the operation of reading the register comprises:

3. The method of claim 1, wherein obtaining the state of the second flag variable comprises:

4. The method of claim 1, wherein the determining whether the state of the first flag variable and the state of the second flag variable satisfy a preset condition comprises:

5. The method according to claim 4, wherein obtaining the state of the first alarm register and the state of the corresponding first mask register in the case that the state of the first flag variable and the state of the second flag variable satisfy a preset condition comprises:

6. The method of any of claims 1-5, wherein determining the state of the status pin based on the state of the first alarm register and the state of the first mask register comprises:

judging whether the numerical value of the first alarm register is zero or not;

controlling the state pin to set a high level and the value of the first flag variable to be set to zero under the condition that the value of the first alarm register is zero;

7. The method of claim 6, further comprising:

8. The method of claim 7, further comprising:

updating the value of the second flag variable to one;

judging whether the numerical value of the first alarm register is zero or not;

9. The signal processing device is characterized in that the device is connected with an optical module, and the optical module at least comprises a golden finger and a register; the registers comprise at least one alarm register and a corresponding shielding register; the golden finger at least comprises a state foot; the device comprises: an obtaining unit, a judging unit and a determining unit, wherein:

the judging unit is used for judging whether the state of the first flag variable and the state of the second flag variable obtained by the obtaining unit meet preset conditions or not; the preset condition is that the state of the first flag variable is set to represent that the operation of reading the alarm register is to record that the operation of reading the alarm register and the state of the second flag variable is set to represent that the state pin is to be set to a high level;

10. The apparatus according to claim 9, wherein the obtaining unit is further configured to trigger the optical module to enter an operation of reading communication interruption according to an operation of reading a register, and determine whether the register is the first alarm register; if the register is not the first alarm register, holding the value of the register and the value of the first flag variable; under the condition that the register is the first alarm register, controlling the value of the register to be set to zero from one and the value of the first flag variable to be set to one from zero; the state of the first flag variable includes the value of the first flag variable being set to zero or one.

11. The apparatus according to claim 9, wherein the obtaining unit is further configured to determine whether an operation that the status pin is to be set to a high level is set when the optical module performs an operation other than a read communication interruption; controlling the value of the second flag variable to be set to one under the condition that the operation of the state pin to be set to a high level is set; controlling the value of the second flag variable to be set to zero under the condition that the operation of the state pin to be set to the high level is not set; the state of the second flag variable includes the value of the second flag variable being set to zero or one.

12. The apparatus according to claim 9, wherein the determining unit is further configured to determine whether the value of the first flag variable and the value of the second flag variable are set to one.

13. The apparatus according to claim 12, wherein the obtaining unit is further configured to obtain the value of the first alarm register and the corresponding value of the first mask register if the value of the state of the first flag variable and the value of the state of the second flag variable are set to one.

14. The apparatus according to any of claims 9-13, wherein the determining unit is further configured to determine whether the value of the first alarm register is zero; controlling the state pin to set a high level and the value of the first flag variable to be set to zero when the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and controlling the state pin to be set to a high level and the value of the first flag variable to be set to zero under the condition that the value of the first mask register is one.

15. The apparatus of claim 14, further comprising: the updating unit is used for updating the value of the second mark variable to be set to zero; judging whether the numerical value of the first alarm register is zero or not; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is not one, controlling the state pin to be at a low level and controlling the state position corresponding to the state pin to be zero.

16. The apparatus according to claim 15, wherein the updating unit is further configured to update the value of the second flag variable to be set to one, and determine whether the value of the first alarm register is zero; under the condition that the numerical value of the first alarm register is zero, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin; under the condition that the numerical value of the first alarm register is not zero, judging whether the numerical value of the first mask register is one or not; and under the condition that the numerical value of the first mask register is one, controlling the state pin to be in a high level and controlling the state pin to be in a first state position corresponding to the state pin.

17. A signal processing apparatus comprising a memory and a processor, the memory storing a computer program operable on the processor, wherein the processor implements the steps of the method of any one of claims 1 to 8 when executing the program.

18. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 8.