CN111524784B - Plasma apparatus and method for manufacturing semiconductor device - Google Patents

Plasma apparatus and method for manufacturing semiconductor device Download PDF

Info

Publication number
CN111524784B
CN111524784B CN202010346766.0A CN202010346766A CN111524784B CN 111524784 B CN111524784 B CN 111524784B CN 202010346766 A CN202010346766 A CN 202010346766A CN 111524784 B CN111524784 B CN 111524784B
Authority
CN
China
Prior art keywords
edge ring
wafer
base
chuck
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010346766.0A
Other languages
Chinese (zh)
Other versions
CN111524784A (en
Inventor
阚保国
阚杰
曹春生
冯大贵
吴长明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hua Hong Semiconductor Wuxi Co Ltd
Original Assignee
Hua Hong Semiconductor Wuxi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hua Hong Semiconductor Wuxi Co Ltd filed Critical Hua Hong Semiconductor Wuxi Co Ltd
Priority to CN202010346766.0A priority Critical patent/CN111524784B/en
Publication of CN111524784A publication Critical patent/CN111524784A/en
Application granted granted Critical
Publication of CN111524784B publication Critical patent/CN111524784B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/3244Gas supply means
    • H01J37/32449Gas control, e.g. control of the gas flow
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32807Construction (includes replacing parts of the apparatus)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Plasma & Fusion (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The application discloses a plasma equipment and a preparation method of a semiconductor device, wherein the equipment comprises: the electrostatic chuck comprises a chuck base and a chuck arranged on the chuck base; the edge ring comprises an edge ring side wall arranged around the electrostatic chuck and an edge ring base arranged on the protruding part of the chuck base in a surrounding mode, the edge ring side wall is arranged on the edge ring base, and an opening is formed in the edge ring base to conduct the edge ring base. This application switches on the edge ring through being provided with the opening on the edge ring base at plasma equipment to when carrying out deposition process or etching process to the wafer through this plasma equipment, owing to there is the opening to switch on the edge ring, consequently can form the region of an air current circulation at the edge of wafer, discharge the reflection particulate matter at edge, solved the accumulational problem of the marginal reactant granule of wafer to a certain extent, improved the yield.

Description

Plasma apparatus and method for manufacturing semiconductor device
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a plasma device in a semiconductor manufacturing process and a preparation method of a semiconductor device.
Background
Plasma technology (plasma technology) plays an important role in the field of semiconductor manufacturing, and can be applied to various semiconductor processes, such as deposition (e.g., chemical vapor deposition) process, etching process (e.g., dry etching), and the like.
In general, a plasma apparatus performing a deposition process or an etching process, for example, an all-in-one (AIO) etching apparatus, an electrostatic chuck (ESC) is disposed in an etching chamber thereof for clamping and releasing a wafer.
In the related art, after a deposition process or an etching process is performed on a wafer in plasma equipment including an electrostatic chuck, reaction particles are deposited on the edge of the wafer, and the yield of the wafer is reduced to a certain extent.
Disclosure of Invention
The application provides a plasma device and a preparation method of a semiconductor device, which can solve the problem that reaction particles are accumulated on the edge of a wafer after the plasma device provided in the related technology carries out a deposition process or an etching process on the wafer, so that the yield of the wafer is reduced.
In one aspect, an embodiment of the present application provides a plasma apparatus, including:
a housing forming a reaction chamber therein;
an electrostatic chuck disposed in the reaction chamber, the electrostatic chuck comprising a chuck base and a chuck disposed on the chuck base;
the edge ring is arranged in the reaction chamber and comprises an edge ring side wall arranged around the electrostatic chuck and an edge ring base arranged on the protruding part of the chuck base, the edge ring side wall is arranged on the edge ring base, an opening is formed in the edge ring base, and the opening is communicated with the edge ring base;
when the plasma equipment works, the chuck adsorbs the wafer, reaction particles at the edge of the wafer are pumped away by a vacuum pump of the plasma equipment through the opening, and the edge of the wafer is an area of the back surface of the wafer beyond the adsorption area of the chuck.
Optionally, an outlet is disposed on the outer side of the edge ring base, and the outlet is communicated with the opening.
Optionally, an outlet is provided in an area of the bottom of the edge ring base exposed to the outside, and the outlet is communicated with the opening.
Optionally, the edge ring base is provided with a plurality of openings and a plurality of outlets, and each opening is communicated with its corresponding outlet.
Optionally, the opening is circular, oval, triangular or rectangular.
Optionally, the shape of the outlet is the same as the shape of the opening.
Optionally, the difference between the inner diameter of the side wall of the edge ring and the radius of the wafer is less than 2 mm.
Optionally, the edge ring is made of a material including aluminum oxide.
Optionally, the plasma apparatus is applied to an AIO etching process.
In another aspect, an embodiment of the present application provides a method for manufacturing a semiconductor device, the method being performed by any one of the plasma apparatuses described above, the method including:
placing a wafer on an electrostatic chuck of the plasma apparatus, the electrostatic chuck comprising a chuck base and a chuck disposed on the chuck base;
carrying out an etching process or a deposition process on the wafer, wherein in the process of carrying out the etching process or the deposition process, reaction particles at the edge of the wafer are pumped away from the opening through a vacuum pump of the plasma equipment, the opening is arranged on an edge ring base of an edge ring and is communicated with the edge ring base, and the edge ring comprises an edge ring side wall arranged around the electrostatic chuck and the edge ring base arranged on a protruding part of the chuck base;
and taking out the wafer from the plasma equipment after the etching process or the deposition process is finished.
The technical scheme at least comprises the following advantages:
the edge ring is communicated through the opening arranged on the edge ring base of the plasma equipment, so that when the plasma equipment is used for carrying out deposition process or etching process on a wafer, the edge ring is communicated through the opening, an air flow flowing area can be formed at the edge of the wafer, particles at the edge are reflected and discharged, the problem of accumulation of reactant particles at the edge of the wafer is solved to a certain extent, and the yield is improved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic sectional view of a plasma apparatus provided in the related art;
FIG. 2 is a schematic cross-sectional view of a plasma apparatus provided in an exemplary embodiment of the present application;
FIG. 3 is a cross-sectional schematic view of a plasma apparatus provided in an exemplary embodiment of the present application;
fig. 4 is a flowchart of a method for manufacturing a semiconductor device according to an exemplary embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, which illustrates a cross-sectional view of a plasma apparatus provided in the related art, as shown in fig. 1, the plasma apparatus 100 includes a housing 110, and an electrostatic chuck 120 and an edge ring 130 disposed in a reaction chamber 111 formed by the housing 110.
When the plasma apparatus 100 performs a deposition process or an etching process, the wafer 101 is attracted by the electrostatic chuck 120, and since the contact area between the electrostatic chuck 120 and the wafer 101 is smaller than the area of the wafer 101, there is an exposed edge on the back surface of the wafer 101, and the edge ring 130 form a relatively closed area (as shown by the dotted line in fig. 1), so that reactant particles generated in the deposition process or the etching process are accumulated on the edge of the wafer 101.
In the subsequent high-temperature photoresist stripping process, the reactant particles release stress under the action of high temperature to crack and curl sediments, and flaky strippings can be formed, so that abnormal particles are increased, and the yield is influenced; meanwhile, the wafer boat (foup) holding the wafers 101 is polluted, the use efficiency of the wafer boat is affected, and the production efficiency is reduced to a certain extent.
In view of the above, referring to fig. 2, which shows a schematic cross-sectional view of a plasma apparatus according to an exemplary embodiment of the present application, as shown in fig. 2, the plasma apparatus 200 includes:
a housing 210, a reaction chamber 211 being formed in the housing 210.
An electrostatic chuck, which is disposed in the reaction chamber 211, includes a chuck base 221 and a chuck 222 disposed on the chuck base 221. Wherein the radius of the chuck base 221 is greater than the radius of the chuck 222, the cross-section of the electrostatic chuck appears to be "convex". The chuck base 221 and the chuck 222 may be an integral component, or may be two components fixed to form an electrostatic chuck, which is not limited herein.
An edge ring disposed in the reaction chamber 211, which includes an edge ring sidewall 231 disposed around the electrostatic chuck and an edge ring base 232 disposed on the protruding portion of the chuck base 221, wherein the edge ring sidewall 231 is disposed on the edge ring base 222, an opening 2321 is disposed on the edge ring base 232, and the opening 2321 is connected to the edge ring base 232. It should be noted that the edge ring side wall 231 and the edge ring base 232 may be an integral component, or may be two components fixed to form an edge ring, which is not limited herein. Optionally, as shown in fig. 2, an outlet 2322 is disposed on an outer side of the edge ring base 232, and the outlet 2322 is communicated with the opening 2321.
Referring to fig. 3, which shows a schematic cross-sectional view of a plasma apparatus provided in an exemplary embodiment of the present application, as shown in fig. 3, the plasma apparatus 300 is different from the plasma apparatus 200 shown in fig. 2 in that: the exposed area of the bottom of the edge ring base 232 is provided with an outlet 2322, and the outlet 2322 is communicated with the opening 2321.
Optionally, in the above embodiment, the edge ring base 232 is provided with a plurality of openings 2321 and a plurality of outlets 2322, and each opening 2321 is communicated with its corresponding outlet 2322; alternatively, the opening 2321 may be circular, oval, triangular, or rectangular; alternatively, the outlet 2322 is the same shape as the opening 2222.
When the plasma apparatus (plasma apparatus 200 or plasma apparatus 300) is in operation, wafer 101 is attracted to chuck 222, and reactive particles at the edge of wafer 101 (shown in dashed lines in fig. 2 and 3) are pumped away by a vacuum pump (not shown in fig. 2 and 3) through opening 2321. Wherein the edge of wafer 101 is the area of its backside beyond the chucking area of chuck 222.
For example, when the deposition process or the etching process is performed by the plasma apparatus, due to the opening 2321, the region formed by the edge of the wafer 101 and the inner side of the edge ring is no longer a closed region, so that a gas flow circulation is formed, and the reaction particles in the region formed by the edge of the wafer 101 and the inner side of the edge ring can be pumped away by the vacuum pump.
To sum up, in the embodiment of the present application, the opening conduction edge ring is arranged on the edge ring base of the plasma device, so that when the deposition process or the etching process is performed on the wafer through the plasma device, because the opening conduction edge ring exists, an area where air flow circulates can be formed at the edge of the wafer, the reflection particulate matters at the edge are discharged, the problem of accumulation of the reactant particles at the edge of the wafer is solved to a certain extent, and the yield is improved.
In an alternative embodiment, the difference between the inner diameter of the edge ring sidewall 231 and the radius of the wafer 101 is less than 2 mm in the above-described embodiment. Generally, the distance between the edge ring sidewall 231 and the wafer 101 (i.e., the difference between the inner diameter of the edge ring sidewall 231 and the radius of the wafer 101) is larger, generally larger than 3 mm, and the distance between the edge ring sidewall 231 and the wafer 101 can be reduced by reducing the inner diameter of the edge ring sidewall 231 (e.g., thickening the edge ring sidewall 231, or reducing the edge ring as a whole), so that the difference between the inner diameter of the edge ring sidewall 231 and the radius of the wafer 101 is smaller than 2 mm, thereby reducing the probability of the edge of the wafer 101 accumulating reaction particles, solving the problem of the edge reactant particle accumulation of the wafer to a certain extent, and improving the yield.
In an alternative embodiment, the edge ring is formed from a material including aluminum oxide (e.g., aluminum oxide Al) 2 O 3 A ceramic material). When the plasma apparatus is applied to an aluminum etching process, aluminum element accumulation exists at the edge of the wafer 101 during the aluminum etching process, and the accumulated aluminum reacts with the chlorine-containing plasma to generate aluminum chloride, thereby generating reactant particles. By providing the edge ring with a material comprising aluminum oxide, the chlorine-containing plasma can react with the upper surface of the edge ring to form aluminum chloride, consuming a portion of the chlorine-containing plasma, reducing the probability of generating reactant particles at the edge of the wafer 101, and maintaining the uniformity of the plasma concentrationThe problem of reactant particle accumulation at the edge of the wafer is solved to a certain extent, and the yield is improved.
Referring to fig. 4, there is shown a flow chart of a method for manufacturing a semiconductor device provided in an exemplary embodiment of the present application, the method being executable by a plasma apparatus provided in any of the embodiments described above, the method comprising:
step 401, the wafer is placed on an electrostatic chuck of a plasma apparatus.
As described above, the electrostatic chuck includes a chuck base and a chuck disposed on the chuck base.
Step 402, performing an etching process or a deposition process on the wafer, and pumping away reaction particles on the edge of the wafer from the opening through a vacuum pump of the plasma device during the etching process or the deposition process.
As described above, the opening is disposed on and communicates with the edge ring base of the edge ring, which includes an edge ring sidewall disposed around the electrostatic chuck and an edge ring base disposed on the protruding portion of the chuck base.
In step 403, the wafer is removed from the plasma device after the etching process or the deposition process is completed.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.

Claims (3)

1. A plasma apparatus for use in an AIO etching process, the apparatus comprising:
a housing forming a reaction chamber therein;
an electrostatic chuck disposed in the reaction chamber, the electrostatic chuck comprising a chuck base and a chuck disposed on the chuck base;
the edge ring is arranged in the reaction chamber, the edge ring comprises an edge ring side wall arranged around the electrostatic chuck and an edge ring base arranged on a protruding part of the chuck base in a surrounding manner, the edge ring side wall is arranged on the edge ring base, an opening is formed in the edge ring base and is communicated with the edge ring base, an outlet is formed in the outer side of the edge ring base and is communicated with the opening, an outlet is formed in an area, exposed outside, of the bottom of the edge ring base, the outlet is communicated with the opening, a plurality of openings and a plurality of outlets are formed in the edge ring base, each opening is communicated with the corresponding outlet, the difference between the inner diameter of the edge ring side wall and the radius of a wafer is smaller than 2 mm, and the edge ring is made of aluminum oxide;
when the plasma equipment works, the chuck adsorbs the wafer, reaction particles at the edge of the wafer are pumped away by a vacuum pump of the plasma equipment through the opening, and the edge of the wafer is an area of the back surface of the wafer beyond the adsorption area of the chuck.
2. The plasma apparatus of claim 1, wherein the opening is circular, oval, triangular, or rectangular.
3. The plasma apparatus of claim 2, wherein the shape of the outlet and the shape of the opening are the same.
CN202010346766.0A 2020-04-27 2020-04-27 Plasma apparatus and method for manufacturing semiconductor device Active CN111524784B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010346766.0A CN111524784B (en) 2020-04-27 2020-04-27 Plasma apparatus and method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010346766.0A CN111524784B (en) 2020-04-27 2020-04-27 Plasma apparatus and method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
CN111524784A CN111524784A (en) 2020-08-11
CN111524784B true CN111524784B (en) 2023-03-24

Family

ID=71903556

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010346766.0A Active CN111524784B (en) 2020-04-27 2020-04-27 Plasma apparatus and method for manufacturing semiconductor device

Country Status (1)

Country Link
CN (1) CN111524784B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420474B (en) * 2020-11-10 2023-03-10 华虹半导体(无锡)有限公司 Plasma apparatus and method of manufacturing semiconductor device
CN112466740A (en) * 2020-11-30 2021-03-09 上海诺硕电子科技有限公司 Carrier for plasma processing wafer and wafer processing equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101447395A (en) * 2007-11-28 2009-06-03 北京北方微电子基地设备工艺研究中心有限责任公司 Focusing ring, semiconductor facility comprising same and application thereof
CN101552182A (en) * 2008-03-31 2009-10-07 北京北方微电子基地设备工艺研究中心有限责任公司 Marginal ring mechanism used in semiconductor manufacture technology

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102641441B1 (en) * 2016-09-28 2024-02-29 삼성전자주식회사 Ring assembly and chuck assembly having the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101447395A (en) * 2007-11-28 2009-06-03 北京北方微电子基地设备工艺研究中心有限责任公司 Focusing ring, semiconductor facility comprising same and application thereof
CN101552182A (en) * 2008-03-31 2009-10-07 北京北方微电子基地设备工艺研究中心有限责任公司 Marginal ring mechanism used in semiconductor manufacture technology

Also Published As

Publication number Publication date
CN111524784A (en) 2020-08-11

Similar Documents

Publication Publication Date Title
CN111524784B (en) Plasma apparatus and method for manufacturing semiconductor device
US8382942B2 (en) Method and apparatus for reducing substrate backside deposition during processing
KR100284571B1 (en) Apparatus and method for reducing residue buildup in CVD chamber using ceramic lining
KR100505035B1 (en) Electrostatic chuck for supporting a substrate
KR100408990B1 (en) Plasma processing apparatus
KR20170108811A (en) Substrate support plate, thin film deposition apparatus including the same, and thin film deposition method
KR20010080530A (en) Gas distribution apparatus for semiconductor processing
US20040035532A1 (en) Etching apparatus for use in manufacturing a semiconductor device and shield ring for upper electrode thereof
CN1849691A (en) Method and apparatus for improved focus ring
TW200923126A (en) Showerhead assembly
JPH09129612A (en) Etching gas and etching method
JP2003505855A (en) Chamber liner for semiconductor processing room
CN106057616B (en) Edge ring for bevel polymer reduction
US6228208B1 (en) Plasma density and etch rate enhancing semiconductor processing chamber
US20090294066A1 (en) Dry Etching Apparatus
WO2009065303A1 (en) Plasma confinement device and semiconductor processing apparatus using the same
JP2021527299A (en) Plasma Chemistry A device that suppresses parasitic plasma in a vapor deposition chamber
JP2009224385A (en) Annular component for plasma processing, plasma processing apparatus, and outer annular member
KR101909784B1 (en) Method for surface treatment of upper electrode, plasma processing apparatus and upper electrode
KR20070054766A (en) Apparatus for processing a substrate
CN110867363A (en) Plasma processing apparatus
CN218621037U (en) Semiconductor processing process chamber and semiconductor processing equipment
WO2009115005A1 (en) Shielding ring for plasma processing device and plasma processing device
CN109964310A (en) Electric hybrid board carrier
JP2004079820A (en) Plasma processing apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant