CN111490706A - PWM modulation assembly of H-bridge driving circuit - Google Patents
PWM modulation assembly of H-bridge driving circuit Download PDFInfo
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- CN111490706A CN111490706A CN202010469423.3A CN202010469423A CN111490706A CN 111490706 A CN111490706 A CN 111490706A CN 202010469423 A CN202010469423 A CN 202010469423A CN 111490706 A CN111490706 A CN 111490706A
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- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/06—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current
- H02P7/18—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power
- H02P7/24—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices
- H02P7/28—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
- H02P7/285—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only
- H02P7/29—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation
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Abstract
The invention provides a PWM modulation component of an H-bridge drive circuit, wherein 4 switch tubes of the H-bridge drive circuit are NMOS tubes, the grids of the switch tubes are respectively connected with the drive circuit, the input end of the drive circuit is respectively connected with the signal output end of an H-bridge drive signal generation circuit, the H-bridge drive signal generation circuit continuously outputs a turn-on signal to the drive circuit corresponding to an upper tube on one side, the drive circuit corresponding to a lower tube continuously outputs a turn-off signal, and the drive circuit corresponding to the upper tube and the lower tube on the other side alternately outputs a turn-off signal and a turn-on signal. According to the modulation component, the tube on the first side is always in a conducting state, so that a large parasitic capacitor exists between the grid electrode of the modulation component and the power supply voltage, and the storage capacitor of the booster circuit is greatly reduced; and the upper tube of the first side is conducted, and the lower tube of the first side is cut off, so that the output end of the H-bridge driving circuit cannot generate the condition of negative pressure, and the circuit work is more reliable than before.
Description
Technical Field
The invention relates to an H-bridge driving circuit, in particular to a PWM (pulse width modulation) component of the H-bridge driving circuit.
Background
The integrated H-bridge driving chip is widely applied to the dc brushless motor. In a traditional H-bridge driving circuit designed by an integrated circuit process, an upper tube of an H-bridge generally adopts a PMOS tube, and a lower tube of the H-bridge generally adopts an NMOS tube. When the breakdown voltage and the area are equal, the on-resistance of the PMOS transistor is much larger than that of the NMOS transistor. In the application occasions where the driving current is large and the on-resistance is required to be small, the PMOS tube is used as the upper tube of the H bridge, and the small on-resistance can be achieved only by a very large area, so that the chip cost is very high and the packaging is difficult. This results in the fact that in high current applications, the H-bridge is typically implemented as a discrete device rather than integrated into an integrated circuit.
As shown in fig. 1, the upper tubes M1 and M2 of the H-bridge are changed from PMOS tubes to NMOS tubes, that is, the upper left tube M1, the upper right tube M2, the lower left tube M3, and the lower right tube M4 of the H-bridge are all NMOS tubes, which can effectively reduce the on-resistance of the H-bridge, and the H-bridge can be integrated into an integrated circuit in a large-current application. However, there are several design disadvantages in using NMOS transistors for the upper transistors M1, M2 of the H-bridge. First, the NMOS transistor for H-bridge requires a boost circuit 101 to generate an internal power supply with a higher voltage than the power supply voltage for driving the transistors M1 and M2. In order to ensure that the internal power supply voltage output by the boost circuit 101 is stable, the boost circuit 101 needs to be provided with a large storage capacitor CAP (the storage capacitor is generally in the boost circuit, the capacitance required by the prior art is large, and the storage capacitor CAP is externally connected to an output port of the boost circuit 101 in the figure and is used for representing the internal self-provided storage capacitor), and the storage capacitor CAP can greatly increase the output tube area of the chip; secondly, when the upper transistors M1 and M2(NMOS transistors) of the H bridge are turned on from off, the voltage of the gates of the upper transistors M1 and M2 increases from zero to the output voltage of the boost circuit 101, which is a process of charging the gates of the upper transistors M1 and M2, and all the charges required for charging are from the boost circuit 101. The boost circuit 101 is required to have enough current capacity, the larger the output tube areas of the upper tubes M1 and M2 of the H bridge are, the larger the current capacity requirement of the boost circuit 101 is, and the larger the chip area is; third, since the power supply to the gates of the top transistors M1, M2 is the output of the boost circuit 101, the switching on or off of the top transistors M1, M2 of the H-bridge itself has an effect on the boost circuit 101, which makes the design of the rising and falling edge times of the H-bridge more difficult. In the application of the direct current brushless motor, when the H-bridge driving circuit needs to perform Pulse Width Modulation (PWM) speed regulation, the three disadvantages mentioned above become more prominent due to frequent opening and closing of the output tube. Therefore, although the NMOS transistor is much smaller than the PMOS on-resistance, the PMOS transistor is often used as an H-bridge transistor in the integrated circuit.
In addition, as shown in fig. 1, according to the principle of the conventional PWM slew rate control method, a PWM modulation component of the conventional H-bridge driving circuit generates a negative voltage at the H-bridge output, the negative voltage may cause a parasitic NPN transistor to turn on in the integrated circuit, which affects normal operation of the chip, in the PWM modulation component of the H-bridge driving circuit, a left upper tube M1 and a left lower tube M3 are connected through a first output terminal DO, and a right upper tube M2 and a right lower tube M4 are connected through a second output terminal DOB, when the driving load is a dc brushless motor or a fan, a motor coil may be equivalently an inductor, taking a current as an example from the first output terminal DO to the second output terminal DOB, a gate of the right upper tube M24 is always at a low level, a gate of the right lower tube M4 is always at a high level, a right upper tube M2 is turned off, a right lower tube M4 is turned on, when the gate of the left upper tube M1 is at a high level, a gate of the left lower tube M3 is at a low level, a gate of the left upper tube M8653 is turned on, a left lower tube M3 is turned on, thereby a first upper tube M is pulled up to a low gate current flowing through the left lower tube M4 b, a left lower inductor M4 b 4, a left lower inductor 4 current flow path 4 b 4, a low level, a left lower inductor 4 current flow path 4 b switch, a left lower inductor 4 b 4 current flow 4 b 4, a left lower inductor 4 current flow path 4 b 4, a low voltage switch, a left lower inductor pull-down current flow path 4, a left lower inductor pull-down inductor 4, a left lower inductor 4 b power supply circuit 4, a left lower inductor pull-down current flow 4, a left lower.
In order to solve the three disadvantages of the NMOS transistor for the H-bridge and the negative pressure problem generated when the H-bridge performs PWM speed regulation, a new PWM modulation component of the H-bridge driving circuit needs to be designed.
Disclosure of Invention
The invention aims to provide a PWM (pulse-width modulation) component of an H-bridge drive circuit, which is used for reducing a storage capacitor of a booster circuit, enabling an output end to have no negative voltage, reducing the requirement on the capacity of the booster circuit and facilitating the adjustment of the rising edge and the falling edge of the output end.
In order to achieve the above object, the present invention provides a PWM modulation component of an H-bridge driving circuit, which includes an H-bridge driving circuit of a chip, the H-bridge driving circuit has a first output terminal and a second output terminal at two sides, respectively, a load with a load inductance is disposed between the first output terminal and the second output terminal, 4 switching tubes of the H-bridge driving circuit include an upper tube and a lower tube at a first side and an upper tube and a lower tube at a second side, the 4 switching tubes are all NMOS tubes, gates of the 4 switching tubes are connected with 4 driving circuits, respectively, input terminals of the 4 driving circuits are connected with 4 signal output terminals of an H-bridge driving signal generating circuit, respectively, the H-bridge driving signal generating circuit is configured to continuously output a turn-on signal to a driving circuit corresponding to the upper tube at the first side and continuously output a turn-off signal to a driving circuit corresponding to the lower tube at the first side, and when the signal output to the driving circuit corresponding to one of the upper tube and the lower tube on the second side is switched to the cut-off signal and the corresponding switch tube is cut off, the signal output to the driving circuit corresponding to the other one of the upper tube and the lower tube on the second side is switched to the conducting signal so that the corresponding switch tube starts to be switched on.
Each driving circuit comprises a PMOS tube, a first resistor, a second resistor and an NMOS tube which are connected in sequence, a driving circuit output end is arranged between the first resistor and the second resistor, and each driving circuit is connected with the grid electrode of the corresponding switch tube through the driving circuit output end of the driving circuit; the source electrode of a PMOS tube of the driving circuit is a power supply end, and the drain electrode of the PMOS tube is connected with a first resistor; the source electrode of the NMOS tube is connected with the second resistor, the drain electrode of the NMOS tube is grounded, and the grid electrode of the PMOS tube of the driving circuit is in short circuit with the grid electrode of the NMOS tube and is provided with an input end of the PMOS tube.
And a charging diode is arranged between the first output end and the grid electrode of the upper tube on the same side as the first output end and the second output end.
The drain electrodes of the upper tubes on the first side and the second side are connected with a power supply voltage of a chip, and the source electrodes of the lower tubes on the first side and the second side are grounded.
The power supply end of the driving circuit corresponding to the upper tubes of the first side and the second side is connected with the power supply voltage through a booster circuit, and the power supply end of the driving circuit corresponding to the lower tubes of the first side and the second side is directly connected with the internal power supply of a chip.
In another aspect, the present invention provides a PWM modulation method for an H-bridge driving circuit, including:
s1: providing a PWM (pulse-width modulation) component of an H-bridge drive circuit, wherein the PWM component of the H-bridge drive circuit comprises an H-bridge drive circuit of a chip, the H-bridge drive circuit is respectively provided with a first output end and a second output end at two sides, a load with load inductance is arranged between the first output end and the second output end, 4 switching tubes of the H-bridge drive circuit comprise an upper tube and a lower tube at a first side and an upper tube and a lower tube at a second side, the 4 switching tubes are NMOS (N-channel metal oxide semiconductor) tubes, grid electrodes of the 4 switching tubes are respectively connected with the 4 drive circuits, and input ends of the 4 drive circuits are respectively connected with 4 signal output ends of an H-bridge drive signal generation circuit;
s2: the H-bridge driving signal generating circuit continuously outputs a conducting signal to a driving circuit corresponding to an upper tube on the first side, continuously outputs a stopping signal to a driving circuit corresponding to a lower tube on the first side, outputs a stopping signal to a driving circuit corresponding to an upper tube on the second side, outputs a conducting signal to a driving circuit corresponding to a lower tube on the second side, and conducts for a period of time;
s3: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the lower tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
s4: when the corresponding switch tube is cut off, the signal output by the H-bridge driving signal generating circuit to the driving circuit corresponding to the upper tube on the second side is switched to a conducting signal, so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
s5: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the upper tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
s6: when the corresponding switch tube is cut off, the H-bridge driving signal generating circuit switches the signal output to the driving circuit corresponding to the lower tube on the second side into a conducting signal so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
s7: repeating the steps S3-S6.
Each driving circuit comprises a PMOS tube, a first resistor, a second resistor and an NMOS tube which are connected in sequence, a driving circuit output end is arranged between the first resistor and the second resistor, and each driving circuit is connected with the grid electrode of the corresponding switch tube through the driving circuit output end of the driving circuit; the source electrode of a PMOS tube of the driving circuit is a power supply end, and the drain electrode of the PMOS tube is connected with a first resistor; the source electrode of the NMOS tube is connected with the second resistor, the drain electrode of the NMOS tube is grounded, and the grid electrode of the PMOS tube of the driving circuit is in short circuit with the grid electrode of the NMOS tube and is provided with an input end of the PMOS tube.
And a charging diode is arranged between the first output end and the grid electrode of the upper tube on the same side as the first output end and the second output end.
The drain electrodes of the upper tubes on the first side and the second side are connected with a power supply voltage of a chip, and the source electrodes of the lower tubes on the first side and the second side are grounded.
The power supply end of the driving circuit corresponding to the upper tubes of the first side and the second side is connected with the power supply voltage through a booster circuit, and the power supply end of the driving circuit corresponding to the lower tubes of the first side and the second side is directly connected with the internal power supply of a chip.
According to the PWM module of the H-bridge drive circuit, the upper tube on the first side is always in a conducting state, a large parasitic capacitor exists between the grid electrode of the PWM module and the power supply voltage, and the PWM module can serve as a storage capacitor of the booster circuit, so that the storage capacitor required by the booster circuit can be greatly reduced, and the chip cost is reduced; and the upper tube on the first side is always conducted, the lower tube on the first side is always cut off, and the upper tube and the lower tube on the second side are alternately cut off and conducted, so that the negative pressure condition can not occur at the output end of the H-bridge driving circuit, and the circuit work is more reliable than before. In addition, the first side tube is normally conducted, the second side tube is used for modulation, the voltage of the output end rushes to the power voltage by the energy of the inductor current during switching, and the charging diode charges the corresponding grid electrode in advance when the voltage of the output end is rushed to be high, so that the requirement on the current capacity of the booster circuit is greatly reduced, and the difficulty in designing the booster circuit is reduced. In addition, the PWM modulation component of the H-bridge driving circuit adopts the lower tube modulation, the time of the rising edge and the falling edge of the output end of the H-bridge driving circuit is independent of the switching speed of the upper tube, so that the time is independent of the current capability of the booster circuit and is dependent on the switching speed of the lower tube, and the rising edge and the falling edge of the output end of the H-bridge driving circuit can be conveniently adjusted.
Drawings
Fig. 1 is a schematic diagram of conventional PWM modulated H-bridge driver circuit components.
Fig. 2 is a schematic diagram of the PWM modulation components of the H-bridge drive circuit according to one embodiment of the present invention.
Fig. 3 is a circuit diagram of an embodiment of the PWM modulation component of the H-bridge driving circuit according to the present invention.
Fig. 4 is a signal diagram of the PWM modulation components of the H-bridge drive circuit according to one embodiment of the present invention.
Fig. 5 is a simplified circuit diagram of the PWM modulation component of the H-bridge driver circuit shown in fig. 4 at the first operating time.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 2-3 show PWM modulation components of an H-bridge driving circuit according to an embodiment of the present invention, which includes an H-bridge driving circuit 200 of a chip, wherein all 4 switching transistors of the H-bridge driving circuit 200 are NMOS transistors, and include a left upper left transistor M1, a left lower left transistor M3, and a right upper right transistor M2, and a right lower right transistor M4, the left side being a first side, and the right side being a second side in the present embodiment, drains of the left upper transistor M1 and the right upper transistor M2 are both connected to a power voltage VCC of the chip, sources of the left lower transistor M3 and the right lower transistor M4 are both connected to ground, the H-bridge driving circuit 200 has a first output terminal DO on the left side (between the source of the left upper transistor M1 and the drain of the left lower transistor M3), and the H-bridge driving circuit 200 has a second output terminal DOB on the right side (between the source of the right upper transistor M2 and the drain of the right lower transistor M4), and a load coil (e.g., a motor L1) is disposed between the first output terminal DO and the second output.
First output DO and second output DOB all with be equipped with between the grid of the upper tube of the homonymy with it diode VD1, VD2 that charges, wherein, first output DO with be equipped with a first diode VD1 that charges between the grid of upper left tube M1, second output DOB with be equipped with a second diode VD2 that charges between the grid of upper right tube M2, set up respectively to charge in advance for the grid that corresponds when the voltage of first output DO and second output DOB was kicked up.
The gates of the 4 switching transistors are respectively connected to 4 driving circuits 202, 203, 204, 205, that is, the gates of the upper left transistor M1, the upper right transistor M2, the lower left transistor M3, and the lower right transistor M4 are respectively connected to the upper left transistor driving circuit 202, the upper right transistor driving circuit 203, the lower left transistor driving circuit 204, and the lower right transistor driving circuit 205, and these driving circuits are configured to charge or discharge the gates of the upper left transistor M1, the upper right transistor M2, the lower left transistor M3, and the lower right transistor M4 of the H-bridge driving circuit 200 to be turned on or off.
The upper left tube driving circuit 202, the upper right tube driving circuit 203, the lower left tube driving circuit 204 and the lower right tube driving circuit 205 are identical in structure, and each driving circuit comprises a PMOS tube PM, a first resistor R1, a second resistor R2 and an NMOS tube NM which are connected in sequence. A driving circuit output end is arranged between the first resistor and the second resistor, and each driving circuit 202, 203, 204 and 205 is respectively connected with the grid electrode of the corresponding switching tube through the driving circuit output end. The sources of the PMOS transistors PM of the driving circuits 202, 203, 204, 205 are power supply terminals, and the drains thereof are connected to the first resistor R1; the drain of the NMOS transistor NM is connected to the second resistor R2, and the source thereof is grounded. The grid of PMOS pipe PM and the grid of NMOS pipe NM of the drive circuit are in short circuit and are provided with input ends.
The power supply ends of the driving circuits (namely, the upper left tube driving circuit 202 and the upper right tube driving circuit 203) corresponding to the upper left tube M1 and the upper right tube M2 are all connected with the power supply voltage VCC through a boosting circuit 201, the power supply ends of the driving circuits (the lower left tube driving circuit 204 and the lower right tube driving circuit 205) corresponding to the lower left tube M3 and the lower right tube M4 are all directly connected with the internal power supply VDD of a chip, the upper left tube driving circuit 202 and the upper right tube driving circuit 203 are powered by the power supply voltage VCP generated by the boosting circuit 201, and the internal power supply VDD of the chip provides driving voltage for the lower left tube driving circuit 204 and the lower right tube driving circuit 205. The supply voltage VCP generated by the boost circuit is higher than the supply voltage VCC of the chip, the upper left tube M1 and the upper right tube M2 are NMOS tubes, and the gate voltage of the upper left tube M1 and the upper right tube M2 should be higher than the supply voltage and can be turned on, so that the boost voltage generation voltage VCP supplies power to the upper left tube driving circuit 202 and the upper right tube driving circuit 203. The power supply voltage VCC of the chip is higher than the internal power supply VDD of the chip.
The input terminals of the 4 driving circuits 202, 203, 204, 205 are respectively connected to 4 signal output terminals of an H-bridge driving signal generating circuit 206, the H-bridge driving signal generating circuit 206 has an input terminal and the 4 signal output terminals, the input terminal is directly connected to the internal power supply VDD of the chip, the 4 signal output terminals are respectively an upper left signal output terminal Hctrl1 connected to the input terminal of the upper left tube driving circuit 202, an upper right signal output terminal Hctrl2 connected to the input terminal of the upper right tube driving circuit 203, a lower left signal output terminal L ctrl1 connected to the input terminal of the lower left tube driving circuit 204, and a lower right signal output terminal L ctrl2 connected to the input terminal of the lower right tube driving circuit 205, and the H-bridge driving signal generating circuit 206 generates a control signal through the signal output terminals for controlling the operating mode of the H-bridge driving circuit 200.
As shown in fig. 4, taking the current flowing from the first output terminal DO to the second output terminal DOB as an example, when the PWM-modulated H-bridge driving circuit 200 is employed, the H-bridge driving signal generating circuit 206 generates signals A, B, C, d from the 4 signal output terminals of the corresponding upper-left transistor driving circuit 202, the right-upper transistor driving circuit 203, the left-lower transistor driving circuit 204, and the right-lower transistor driving circuit 205, since the first side is the left side and the second side is the right side, the H-bridge driving signal generating circuit 206 is configured to continuously output a conducting signal to the driving circuit corresponding to the upper-left transistor M1 through the upper-left signal output terminal Hctrl1 thereof, continuously output a blocking signal to the driving circuit corresponding to the upper-left transistor M3 through the lower-left signal output terminal L ctrl1 thereof, continuously output a blocking signal to the upper-right transistor M2 and the lower-right transistor M4 through the upper signal output terminal Hctrl 7378 and the lower-right signal output terminal L ctrl2 thereof, each time the upper transistor driving circuit is configured to output a high-switching signal and a low switching signal output level when the corresponding to the upper-right transistor driving circuit 4624 is switched to the upper transistor driving circuit 202, the switching signal output a high switching signal is switched to the switching signal output level, the switching signal is configured to the switching circuit 465, and the switching signal output to the switching circuit corresponding driving circuit 465, and the switching circuit is configured to the switching signal switching circuit, and the switching circuit accordingly, the switching circuit is configured to output a high switching signal switching circuit similar to the switching circuit # 465, and the switching circuit # 465, the switching circuit # 465 switching circuit # 4623, the switching circuit is configured to the switching circuit # 4623, the switching circuit #.
The operation principle of the PWM modulation component of the H-bridge driving circuit of the present invention is specifically described below with reference to fig. 2 to 5.
When the H-bridge driving circuit 200 performs PWM modulation, taking the current direction flowing from the first output terminal DO to the second output terminal DOB as an example, 4 signal output terminals of the H-bridge driving signal generating circuit 206 generate signals as shown in fig. 4, the left lower signal output terminal L ctrl1 continuously outputs a high level, so that the PMOS transistor PM in the left lower tube driving circuit 204 is turned off, the NMOS transistor NM is turned on, so that the signal C output by the left lower tube driving circuit 204 is pulled to ground (a continuous low level) through the second resistor R2 thereof, so that the left lower tube M3 is turned off, the left upper signal output terminal Hctrl1 continuously outputs a low level, so that the PMOS transistor PM in the left upper tube driving circuit 202 is turned on, the NMOS transistor NM is turned off, the power supply voltage VCP generated by the boost circuit pulls the signal a generated by the left upper tube driving circuit 202 to a VCP level (a continuous high level) through the first resistor R1 of the left upper tube driving circuit 202, so that the left upper tube M1 is turned on, and the first output terminal is pulled to the power supply voltage.
When the output of the upper right signal output terminal Hctrl2 is high and the output of the lower right signal output terminal L ctrl2 is low, the PMOS transistor PM of the upper right tube driving circuit 203 is turned off and the NMOS transistor NM is turned on, the NMOS transistor NM of the upper right tube driving circuit 203 pulls the signal B generated by the upper right tube driving circuit 203 to ground through its second resistor R2 to low, the upper right tube M2 is turned off, the PMOS transistor PM of the lower right tube driving circuit 205 is turned on and the NMOS transistor NM is turned off, the NMOS transistor NM of the lower right tube driving circuit 205 pulls the signal D generated by the lower right tube driving circuit 205 to the internal power voltage VDD through its first resistor R1, to high, the lower right tube M4 is turned on, the second output terminal DOB is pulled to ground, the H-bridge forms a path, the current direction is as the first path W1 in fig. 2, 3 and 5, and the current passes through the upper left tube M1, the load inductor L1 and the lower right tube VCC 4 to ground, thereby operating the load.
When the signal output from the lower right signal output terminal L ctrl2 changes from low level (on signal) to high level (off signal), the PMOS transistor PM of the lower right tube driving circuit 205 is turned off, the NMOS transistor NM is turned on, and the gate of the lower right tube M4 is pulled down through its second resistor, so that the simplified circuit is shown in fig. 5. since the area of the H-bridge transistor is large, the gate-drain capacitance Cgd inside the lower right tube M4 is taken into account, when the gate voltage of the lower right tube M4 decreases, the current capability that can flow through the lower right tube M4 decreases, but since the current of the load inductor L cannot change suddenly, the voltage of the second output terminal DOB is pulled up, so that the current is generated at both ends of the gate-drain capacitance Cgd of the right tube M4 due to the voltage change, the current flows through the second resistor R5 of the lower right tube driving circuit 205 and the NMOS transistor NM 2 to the ground, so that the voltage of the gate of the lower right tube M4 decreases and is dynamically stabilized at a stable voltage Vb, and the voltage of the lower tube M L is also determined by the voltage of the on-voltage of the load inductor, and the voltage of the lower tube M L:
wherein the content of the first and second substances,
is the slew rate of the voltage at the second output terminal DOB, which is generally expressed in units of V/S, Vb is the stable voltage of the gate of the lower right tube M4, and R24 is the resistance of the second resistor R2 in the lower right tube driving circuit 205.
From the above equation, the voltage of the second output terminal DOB is automatically boosted by the load inductor L1, and the time of the rising edge can be adjusted by the resistance R24 of the second resistor R2 in the right lower tube driving circuit 205, which is no longer related to the current capability of the boost circuit, the PWM modulation component of the H-bridge driving circuit of the present invention adopts the lower tube modulation, the time of the rising edge and the falling edge of the first output terminal DO and the second output terminal DOB of the H-bridge driving circuit is independent of the switching speed of the left upper tube M1 or the right upper tube M2, and thus is independent of the current capability of the boost circuit, and is related to the switching speed of the left lower tube M3 and the right lower tube M4 (related to the switching speed of the right lower tube M4 in the present embodiment), and the time of the rising edge and the falling edge of the first output terminal DO and the second output terminal DOB can be controlled by the left lower tube driving circuit 204 or the right lower tube driving circuit 205 (the right lower tube driving circuit 205 in the present embodiment), so as to adjust the rising edge and the falling edge of the output terminal.
When the voltage of the second output terminal DOB is boosted by the load inductor L and is always boosted to a voltage drop higher than the power supply voltage, and the voltage does not rise any more, the current flows into the power supply voltage VCC through the body diode VD in the internal structure of the upper right tube M2, where the body diode VD is shown in fig. 5, that is, when the upper right tube M2 is turned off and the voltage at the lower port is higher than the voltage at the upper port, the current does not change any more at both ends of the gate drain capacitance Cgd of the lower right tube M4, and no current is generated, so the gate of the lower right tube M4 is pulled to the ground quickly through the second resistor R2 and the NMOS tube in the lower right tube M205, the current of the lower right tube M4 is cut off, the current flows back to the power supply voltage through the body diode VD of the upper right tube M2, the current path is shown in the third path W3 in fig. 5, the current path is reduced from the power supply voltage VCC, the upper left tube M1, the upper left tube M L, the load inductor M2, the gate voltage is cut off, the gate voltage of the lower right tube M2, and the gate charge bridge is designed to the gate voltage of the gate drive circuit, and the gate of the lower right tube M34, therefore, the gate of the gate transistor is reduced, and the gate transistor does not easily reduced, and the gate of the gate transistor, and the gate of.
As described above, when the right lower tube M4 is turned off, the signal output by the right upper signal output terminal Hctrl2 changes from high level to low level, and the right upper tube driving circuit 203 switches to output high level so that the corresponding right upper tube M2 starts to conduct, since the second charging diode VD2 has charged the gate of the right upper tube M2 close to the power supply voltage, when the VCP voltage generated by the boosting circuit 201 charges the gate of the right upper tube M2 through the PMOS tube PM in the right upper tube driving circuit 203 and the second resistor R2, the boosting circuit 201 only needs to continuously charge the gate to the VCP voltage based on the gate close to the power supply voltage, which greatly reduces the requirement for the boosting circuit, and at this time, the right upper tube M2 starts to conduct, the current of the H bridge goes to the second path W2 in fig. 2, 3, and 5, the current flows from the power supply voltage VCC through the left upper tube M1, the load inductor L1, and the right upper tube M2 in sequence to return to the power supply voltage VCC, thereby realizing the freewheeling.
In addition, because the upper left tube M1 of the present invention is always in a conducting state, and a large parasitic capacitance exists between the gate of the upper left tube M1 and the power voltage VCC, which can serve as a storage capacitor of the voltage boost circuit 201, the storage capacitor of the voltage boost circuit 201 can be greatly reduced, the area of the storage capacitor in the voltage boost circuit is reduced, and the chip cost is reduced.
Furthermore, in other embodiments, the principle of current flow from the second output terminal DOB to the first output terminal DO is the same as described above, and two upper tube freewheeling are used, except that the first side becomes the right side and the second side becomes the left side. Specifically, the H-bridge driving signal generating circuit 206 continuously outputs an on signal (i.e., low level) to the driving circuit corresponding to the upper right tube M2, continuously outputs an off signal (i.e., high level) to the driving circuit corresponding to the lower right tube M4, alternately outputs an off signal and an on signal to the driving circuits corresponding to the upper left tube M1 and the lower left tube M3, and each time the signal output to the driving circuit corresponding to one of the upper left tube M1 and the lower left tube M3 is switched to the off signal to turn off the corresponding switching tube, the signal output to the driving circuit corresponding to the other of the upper left tube M1 and the lower left tube M3 is switched to an on signal to start the corresponding switching tube to be turned on. When the PWM modulation component of the H-bridge driving circuit of the chip is used for PWM soft start, PWM soft switching and PWM speed regulation, the tube on one side is always conducted, and the tube on the other side is used for PWM modulation, which belongs to the protection scope of the invention.
Based on the PWM modulation component of the H-bridge driving circuit, the PWM modulation method of the H-bridge driving circuit comprises the following steps:
step S1: providing a PWM (pulse-width modulation) component of an H-bridge drive circuit, wherein the PWM component of the H-bridge drive circuit comprises an H-bridge drive circuit of a chip, the H-bridge drive circuit is respectively provided with a first output end and a second output end at two sides, a load with load inductance is arranged between the first output end and the second output end, 4 switching tubes of the H-bridge drive circuit comprise an upper tube and a lower tube at a first side and an upper tube and a lower tube at a second side, the 4 switching tubes are NMOS (N-channel metal oxide semiconductor) tubes, grid electrodes of the 4 switching tubes are respectively connected with the 4 drive circuits, and input ends of the 4 drive circuits are respectively connected with 4 signal output ends of an H-bridge drive signal generation circuit;
step S2: the H-bridge driving signal generating circuit continuously outputs a conducting signal to a driving circuit corresponding to an upper tube on the first side, continuously outputs a stopping signal to a driving circuit corresponding to a lower tube on the first side, outputs a stopping signal to a driving circuit corresponding to an upper tube on the second side, outputs a conducting signal to a driving circuit corresponding to a lower tube on the second side, and conducts for a period of time;
step S3: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the lower tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
step S4: when the corresponding switch tube is cut off, the signal output by the H-bridge driving signal generating circuit to the driving circuit corresponding to the upper tube on the second side is switched to a conducting signal, so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
step S5: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the upper tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
step S6: when the corresponding switch tube is cut off, the H-bridge driving signal generating circuit switches the signal output to the driving circuit corresponding to the lower tube on the second side into a conducting signal so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
step S7: the above-described steps S3-S6 are repeated.
The above embodiments are merely preferred embodiments of the present invention, which do not limit the scope of the present invention. All simple and equivalent changes and modifications made according to the claims and the content of the specification of the present application fall within the scope of the claims of the present patent application. The invention has not been described in detail in the conventional content.
Claims (10)
1. A PWM modulation component of an H-bridge drive circuit comprises an H-bridge drive circuit of a chip, wherein the H-bridge drive circuit is respectively provided with a first output end and a second output end at two sides, a load with a load inductance is arranged between the first output end and the second output end, and 4 switching tubes of the H-bridge drive circuit comprise an upper tube and a lower tube at a first side and an upper tube and a lower tube at a second side, and the PWM modulation component is characterized in that the 4 switching tubes are NMOS tubes, the grids of the 4 switching tubes are respectively connected with 4 drive circuits, the input ends of the 4 drive circuits are respectively connected with 4 signal output ends of an H-bridge drive signal generation circuit which is set to continuously output a turn-on signal to the drive circuit corresponding to the upper tube at the first side and continuously output a turn-off signal to the drive circuit corresponding to the lower tube at the first side, and when the signal output to the driving circuit corresponding to one of the upper tube and the lower tube on the second side is switched to the cut-off signal and the corresponding switch tube is cut off, the signal output to the driving circuit corresponding to the other one of the upper tube and the lower tube on the second side is switched to the conducting signal so that the corresponding switch tube starts to be switched on.
2. The PWM modulation component of the H-bridge drive circuit according to claim 1, wherein each drive circuit comprises a PMOS tube, a first resistor, a second resistor and an NMOS tube which are connected in sequence, a drive circuit output end is arranged between the first resistor and the second resistor, and each drive circuit is connected with the gate of the corresponding switch tube through the drive circuit output end; the source electrode of a PMOS tube of the driving circuit is a power supply end, and the drain electrode of the PMOS tube is connected with a first resistor; the drain electrode of the NMOS tube is connected with the second resistor, the source electrode of the NMOS tube is grounded, and the grid electrode of the PMOS tube of the driving circuit is in short circuit with the grid electrode of the NMOS tube and is provided with an input end of the PMOS tube.
3. The PWM modulation component of an H-bridge driver circuit according to claim 2, wherein a charging diode is disposed between the first output terminal and the gate of the upper tube on the same side as the first output terminal and the second output terminal.
4. The PWM modulation component of an H-bridge driving circuit according to claim 2, wherein the drains of the upper tubes of the first and second sides are connected to a supply voltage of a chip, and the sources of the lower tubes of the first and second sides are connected to ground.
5. The PWM modulation component of an H-bridge driver circuit according to claim 4, wherein the power supply terminals of the driver circuits corresponding to the upper tubes of the first and second sides are both connected to the power supply voltage through a voltage boosting circuit, and the power supply terminals of the driver circuits corresponding to the lower tubes of the first and second sides are both directly connected to an internal power supply of a chip.
6. A PWM modulation method of an H-bridge drive circuit is characterized by comprising the following steps:
step S1: providing a PWM (pulse-width modulation) component of an H-bridge drive circuit, wherein the PWM component of the H-bridge drive circuit comprises an H-bridge drive circuit of a chip, the H-bridge drive circuit is respectively provided with a first output end and a second output end at two sides, a load with load inductance is arranged between the first output end and the second output end, 4 switching tubes of the H-bridge drive circuit comprise an upper tube and a lower tube at a first side and an upper tube and a lower tube at a second side, the 4 switching tubes are NMOS (N-channel metal oxide semiconductor) tubes, grid electrodes of the 4 switching tubes are respectively connected with the 4 drive circuits, and input ends of the 4 drive circuits are respectively connected with 4 signal output ends of an H-bridge drive signal generation circuit;
step S2: the H-bridge driving signal generating circuit continuously outputs a conducting signal to a driving circuit corresponding to an upper tube on the first side, continuously outputs a stopping signal to a driving circuit corresponding to a lower tube on the first side, outputs a stopping signal to a driving circuit corresponding to an upper tube on the second side, outputs a conducting signal to a driving circuit corresponding to a lower tube on the second side, and conducts for a period of time;
step S3: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the lower tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
step S4: when the corresponding switch tube is cut off, the signal output by the H-bridge driving signal generating circuit to the driving circuit corresponding to the upper tube on the second side is switched to a conducting signal, so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
step S5: the H-bridge driving signal generating circuit switches signals output by the driving circuit corresponding to the upper tube on the second side into cut-off signals, so that the cut-off of the corresponding switching tube is completed;
step S6: when the corresponding switch tube is cut off, the H-bridge driving signal generating circuit switches the signal output to the driving circuit corresponding to the lower tube on the second side into a conducting signal so that the corresponding switch tube starts to be conducted and is conducted for a period of time;
step S7: repeating the steps S3-S6.
7. The PWM modulation component of the H-bridge drive circuit according to claim 1, wherein each drive circuit comprises a PMOS tube, a first resistor, a second resistor and an NMOS tube which are connected in sequence, a drive circuit output end is arranged between the first resistor and the second resistor, and each drive circuit is connected with the gate of the corresponding switch tube through the drive circuit output end; the source electrode of a PMOS tube of the driving circuit is a power supply end, and the drain electrode of the PMOS tube is connected with a first resistor; the drain electrode of the NMOS tube is connected with the second resistor, the source electrode of the NMOS tube is grounded, and the grid electrode of the PMOS tube of the driving circuit is in short circuit with the grid electrode of the NMOS tube and is provided with an input end of the PMOS tube.
8. The PWM modulation component of an H-bridge driver circuit according to claim 7, wherein a charging diode is disposed between the first output terminal and the gate of the upper tube on the same side as the first output terminal and the second output terminal.
9. The PWM modulation component of an H-bridge driving circuit according to claim 7, wherein the drains of the upper tubes of the first and second sides are connected to a supply voltage of a chip, and the sources of the lower tubes of the first and second sides are connected to ground.
10. The PWM modulation assembly according to claim 9, wherein the power supply terminals of the driving circuits corresponding to the upper tubes of the first and second sides are connected to the power voltage through a voltage boosting circuit, and the power supply terminals of the driving circuits corresponding to the lower tubes of the first and second sides are directly connected to an internal power supply of a chip.
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| CN202010469423.3A CN111490706A (en) | 2020-05-28 | 2020-05-28 | PWM modulation assembly of H-bridge driving circuit |
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| CN202010469423.3A CN111490706A (en) | 2020-05-28 | 2020-05-28 | PWM modulation assembly of H-bridge driving circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112312616A (en) * | 2020-09-29 | 2021-02-02 | 南京百纳自动化***有限公司 | Novel air-jet loom solenoid valve drive control circuit of solar terms |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112312616A (en) * | 2020-09-29 | 2021-02-02 | 南京百纳自动化***有限公司 | Novel air-jet loom solenoid valve drive control circuit of solar terms |
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