CN111478867B - Signal processing method, signal processing device, storage medium, processor, and electronic device - Google Patents

Signal processing method, signal processing device, storage medium, processor, and electronic device Download PDF

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CN111478867B
CN111478867B CN202010209229.1A CN202010209229A CN111478867B CN 111478867 B CN111478867 B CN 111478867B CN 202010209229 A CN202010209229 A CN 202010209229A CN 111478867 B CN111478867 B CN 111478867B
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CN111478867A (en
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张圣岩
蒋颖波
王正方
怀钰
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Bicocq Microelectronics Hangzhou Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/024Channel estimation channel estimation algorithms
    • H04L25/0242Channel estimation channel estimation algorithms using matrix methods
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/3405Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
    • H04L27/3411Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power reducing the peak to average power ratio or the mean power of the constellation; Arrangements for increasing the shape gain of a signal set
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38Demodulator circuits; Receiver circuits

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  • Radio Transmission System (AREA)

Abstract

The invention discloses a signal processing method, a signal processing device, a storage medium, a processor and an electronic device. The method comprises the following steps: receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter; generating a receiving signal of a receiver according to at least the transmitting signal; the received signal is demodulated to obtain an estimate of the transmitted signal. The invention solves the technical problem that the extended processing mode provided by the related technology omits the processing of calculating the demodulation bit, so that the demodulation values of partial bits are not accurate enough, thereby causing poor subsequent decoding performance.

Description

Signal processing method, signal processing apparatus, storage medium, processor, and electronic apparatus
Technical Field
The present invention relates to the field of communications, and in particular, to a signal processing method, a signal processing apparatus, a storage medium, a processor, and an electronic apparatus.
Background
Constellation diagrama is a basic concept in the field of digital modulation. In general, digital signals are not directly transmitted in a 0 or 1 manner, but are first grouped according to 0 or 1 signals. Taking the example of grouping every two bits, i.e., there are a total of four states 00, 01, 10 and 11, then Quadrature Phase Shift Keying (QPSK) quadrature phase modulation can be chosen, which corresponds to the four states 00, 01, 10 and 11, respectively. QPSK four points form a QPSK constellation, each point differs from an adjacent point by 90 degrees (i.e., the amplitudes are the same), and one constellation point corresponds to one modulation symbol, so that the information amount is equivalent to two bits for transmitting one modulation symbol every time, thereby increasing the transmission rate.
In the QPSK signal receiving and demodulating process, which signal is transmitted is determined according to the distance (i.e., euclidean distance) between the received signal and 4 points on the constellation diagram. For example: and the received signal is determined to be 00 when the distance between the received signal and the 00 point on the constellation diagram is the closest.
Therefore, the main role of the constellation is to perform mapping (e.g., QPSK, 1694AM, 64QAM, etc.) during modulation, and to determine which point is transmitted when receiving, so as to demodulate the data correctly.
The constellation diagram includes two axes. The horizontal X-axis is associated with in-phase carriers and the vertical Y-axis is associated with quadrature carriers. Each point in the constellation diagram may contain 4 pieces of information. The projection of a point on the X-axis is responsible for defining the peak amplitude of the in-phase component and the projection of a point on the Y-axis is responsible for defining the peak amplitude of the quadrature component. The length of the line (vector) from the point to the origin represents the peak amplitude (combination of the X and Y components) of the signal element, and the angle between the line and the X axis is the phase of the signal element. All the required information can be easily obtained from the constellation.
Currently, in the related art, the spreading processing method provided in the mimo antenna technology and the maximum likelihood detection algorithm adopted in the wireless communication system is to set points on K constellation maps obtained by spreading near an estimation point as candidate points of a symbol to be detected. However, the obvious drawbacks of this extended approach are: the process of calculating the demodulation bits is omitted, so that the demodulation values of partial bits are not accurate enough, and the subsequent decoding performance is poor.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
At least some embodiments of the present invention provide a signal processing method, a signal processing apparatus, a storage medium, a processor, and an electronic apparatus, so as to solve at least the technical problem that demodulation values of some bits are not accurate enough due to omitting a process of calculating demodulation bits in an extended processing manner provided in the related art, thereby resulting in poor subsequent decoding performance.
According to an embodiment of the present invention, there is provided a signal processing method including:
receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter; generating a receiving signal of a receiver according to at least the transmitting signal; the received signal is demodulated to obtain an estimate of the transmitted signal.
Optionally, generating the reception signal at least according to the transmission signal comprises: determining a channel estimation matrix according to the first number and a second number of receiving antennas of the receiver; obtaining noise symbols of a second length, wherein the second length is determined by a second number; a received signal is generated using the transmitted signal, the channel estimation matrix, and the noise symbols.
Optionally, demodulating the received signal includes: performing matrix transformation processing on the received signal to obtain a processed signal; and performing demodulation bit processing on the processed signal.
Optionally, performing matrix transformation on the received signal to obtain a processed signal includes: performing orthogonal triangular decomposition processing on the channel estimation matrix to obtain a first matrix and a second matrix, wherein the first matrix is an orthogonal matrix determined by a first number and a second number, and the second matrix is an upper triangular matrix determined by the first number; and calculating to obtain a processed signal by adopting the conjugate matrix of the first matrix and the received signal.
Optionally, the bit demodulation processing on the transmission signal for the processed signal includes: a processing step, selecting a third number of candidate estimated values from multi-layer signals processed in the emission signals according to the current single-layer signals to be processed, and acquiring an approximate estimated value of the current layer corresponding to each candidate estimated value and a fourth number of expanded values expanded around the approximate estimated value to obtain a fifth number of expanded values, wherein the fifth number is obtained by calculating the third number and the fourth number; calculating a partial Euclidean distance of each extended value in the fifth number of extended values, and calculating a demodulation bit value of the current single-layer signal to be processed according to the partial Euclidean distance; judging whether the transmitting signal has a single-layer signal which is not processed yet, and if not, ending the process; and if so, selecting a third number of expansion values from the fifth number of expansion values as candidate estimation values to be used according to ascending ranking results of the partial Euclidean distances, and returning to the processing step.
Optionally, calculating the demodulated bit value of the single-layer signal to be processed currently according to the partial euclidean distance includes: searching a first set and a second set corresponding to each bit in the current single-layer signal to be processed, wherein the first set is composed of values with a value of 0 of a bit to be demodulated in a fifth number of extension values, and the second set is composed of values with a value of 1 of the bit to be demodulated in the fifth number of extension values; searching a first numerical value with the minimum part Euclidean distance from the first set, and searching a second numerical value with the minimum part Euclidean distance from the second set; and calculating to obtain a demodulation bit value by using the first numerical value and the second numerical value.
According to an embodiment of the present invention, there is also provided a signal processing apparatus including:
a receiving module, configured to receive a transmission signal from a transmitter, where the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmit antennas of the transmitter; a generating module, configured to generate a receiving signal of a receiver according to at least the transmitting signal; and the processing module is used for carrying out demodulation bit processing on the received signal to obtain the estimation of the transmitted signal.
Optionally, the generating module includes: a determining unit for determining a channel estimation matrix based on the first number and a second number of receive antennas of the receiver; an obtaining unit configured to obtain a noise symbol of a second length, wherein the second length is determined by a second number; a first calculation unit for generating a received signal using the transmitted signal, the channel estimation matrix and the noise symbol.
Optionally, the processing module is configured to perform matrix transformation processing on the received signal to obtain a processed signal; and performing demodulation bit processing on the processed signal.
Optionally, the processing module comprises: the decomposition unit is used for carrying out orthogonal triangular decomposition processing on the channel estimation matrix to obtain a first matrix and a second matrix, wherein the first matrix is an orthogonal matrix determined by a first number and a second number, and the second matrix is an upper triangular matrix determined by the first number; and the second calculation unit is used for calculating to obtain the processed signal by adopting the conjugate matrix of the first matrix and the received signal.
Optionally, the processing module comprises: the processing unit is used for selecting a third number of candidate estimated values from multi-layer signals processed in the transmitting signals according to the current single-layer signals to be processed, acquiring an approximate estimated value of the current layer corresponding to each candidate estimated value and a fourth number of expanded values expanded around the approximate estimated value, and acquiring a fifth number of expanded values, wherein the fifth number is obtained by calculating the third number and the fourth number; the third calculation unit is used for calculating the partial Euclidean distance of each spreading value in the fifth number of spreading values and calculating the demodulation bit value of the current single-layer signal to be processed according to the partial Euclidean distance; the judging unit is used for judging whether the transmitting signal still has an unprocessed single-layer signal, and if not, the process is ended; and if so, selecting a third number of expansion values from the fifth number of expansion values as candidate estimation values to be used according to ascending ranking results of the partial Euclidean distances, and returning the third number of expansion values to the processing unit.
Optionally, the third computing unit is configured to search a first set and a second set corresponding to each bit in the single-layer signal to be currently processed, where the first set is composed of values in which a value of a bit to be demodulated in the fifth number of extension values is 0, and the second set is composed of values in which a value of a bit to be demodulated in the fifth number of extension values is 1; searching a first numerical value with the minimum part Euclidean distance from the first set, and searching a second numerical value with the minimum part Euclidean distance from the second set; and calculating to obtain a demodulation bit value by adopting the first numerical value and the second numerical value.
According to an embodiment of the present invention, there is further provided a storage medium having a computer program stored therein, wherein the computer program is configured to execute the signal processing method in any one of the above methods when the computer program runs.
There is further provided, according to an embodiment of the present invention, a processor for executing a program, where the program is configured to perform the signal processing method in any one of the above when executed.
There is further provided, according to an embodiment of the present invention, an electronic apparatus including a memory and a processor, the memory storing a computer program therein, and the processor being configured to execute the computer program to perform the signal processing method in any one of the above.
In at least some embodiments of the present invention, a mode of receiving a transmission signal from a transmitter is adopted, where the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter, and at least a reception signal of a receiver is generated by the transmission signal and a demodulation bit process is performed on the reception signal to obtain an estimate of the transmission signal, so as to achieve a purpose of fully considering a process of calculating demodulation bits during an expansion process, thereby achieving a technical effect of improving accuracy of a bit demodulation value to significantly improve decoding performance, and further solving a technical problem that a process of calculating demodulation bits is omitted in an expansion processing mode provided in the related art, so that demodulation values of a part of bits are not accurate enough, thereby resulting in poor subsequent decoding performance.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a flow diagram of a signal processing method according to one embodiment of the invention;
FIG. 2 is a schematic diagram of an expansion mode according to an alternative embodiment of the present invention;
fig. 3 is a block diagram of a signal processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In accordance with one embodiment of the present invention, there is provided an embodiment of a signal processing method, it should be noted that the steps illustrated in the flowchart of the accompanying drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that herein.
The method embodiments may be performed in a wireless communication system. The wireless communication system includes a transmitter (transmitter circuit) and a receiver (receiver).
The transmitter is a device capable of transmitting signals according to a certain frequency, and is widely applied to various civil and military equipment such as televisions, broadcasting, communication, alarming, radars, remote control, remote measurement, electronic countermeasures and the like. Transmitters can be classified into four categories, frequency Modulation (FM), amplitude Modulation (AM), phase Modulation (PM), and pulse modulation, according to the modulation scheme. A transmitter may generally comprise three parts: a high frequency part, a low frequency part and a power supply part. The high frequency part generally comprises a main oscillator, a buffer amplifier, a frequency multiplier, an intermediate amplifier, a power amplifier pushing stage and a final power amplifier. The role of the master oscillator is to generate a carrier wave that is frequency stable. To improve frequency stability, the master oscillator may be a quartz crystal oscillator, and a buffer stage may be added later to attenuate the effect of the later stage on the master oscillator. The low frequency part may include a microphone, a low frequency voltage amplification stage, a low frequency power amplification stage, and a final low frequency power amplification stage. The low frequency signal is gradually amplified to obtain the required power level at the final power amplifier so as to modulate the high frequency final power amplifier. The final low frequency power amplifier stage is therefore also referred to as a modulator. Modulation is used to describe the process of loading information to be transmitted into a particular high frequency oscillating (carrier frequency) signal. Therefore, the final high-frequency power amplifier stage becomes a regulated amplifier.
The receiver can be divided into a super heterodyne receiver and a direct conversion receiver according to the basic construction structure. The superheterodyne receiver is used for outputting an intermediate frequency modulation signal with a lower frequency after mixing or down-converting a received radio frequency signal and a local oscillation signal with a specific frequency. The frequency of the intermediate frequency signal is a fixed frequency difference between the frequencies of the local oscillator signal and the received signal. The final signal is demodulated by the demodulator at the intermediate frequency after filtering and amplifying the intermediate frequency signal. The direct conversion receiver basic principle is similar to a heterodyne receiver, with the difference that: the local oscillator frequency involved in the mixing is not arbitrarily given, but is equal to the carrier frequency, so that the intermediate frequency is 0, and thus there is no image frequency and image frequency interference, and this scheme is generally referred to as a zero intermediate frequency scheme. The radio frequency part of the scheme omits an image frequency filter, and the intermediate frequency filter is changed into a low-pass filter, so that the system structure is simplified, the difficulty of design and implementation is reduced, and the cost is saved. The main functions of the receiver are as follows: the method comprises the steps of selecting frequency components required by the user from a plurality of electromagnetic waves existing in the air, suppressing or filtering out unwanted signals or noise and interference signals, and then amplifying and demodulating to obtain original useful information.
The transmitter and the receiver may each include one or more processors (which may include, but are not limited to, a processing device such as a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Digital Signal Processing (DSP) chip, a Microprocessor (MCU), a programmable logic device (FPGA), a neural Network Processor (NPU), a Tensor Processor (TPU), an Artificial Intelligence (AI) type processor, etc.) and a memory for storing data. Optionally, the transmitter and the receiver may further include a transmission device for a communication function. It will be understood by those skilled in the art that the above-described structure is merely illustrative and is not intended to limit the structure of the transmitter and receiver. For example, the transmitter and receiver may also include more or fewer components than described above, or have a different configuration than described above.
The memory may be used to store computer programs, for example, software programs and modules of application software, such as computer programs corresponding to the signal processing method in the embodiment of the present invention, and the processor executes various functional applications and data processing by running the computer programs stored in the memory, that is, implements the signal processing method described above. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory remotely located from the processor, and these remote memories may be connected to the transmitter and receiver through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the transmitter and the receiver. In one example, the transmission device includes a Network adapter (NIC) that can be connected to other Network devices through a base station to communicate with the internet. In one example, the transmission device may be a Radio Frequency (RF) module, which is used to communicate with the internet in a wireless manner.
In this embodiment, a signal processing method operating in the above receiver is provided, and fig. 1 is a flowchart of a signal processing method according to an embodiment of the present invention, as shown in fig. 1, the method includes the following steps:
step S12, receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter;
step S14, generating a receiving signal of a receiver according to at least the transmitting signal;
step S16, performs demodulation bit processing on the received signal to obtain an estimate of the transmitted signal.
Through the above steps, a mode of receiving a transmission signal from a transmitter, where the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmitting antennas of the transmitter, may be adopted, and at least a reception signal of a receiver is generated by the transmission signal and a demodulation bit process is performed on the reception signal to obtain an estimate of the transmission signal, so as to achieve a purpose of fully considering a calculation demodulation bit process in an extension process, thereby achieving a technical effect of improving accuracy of a bit demodulation value to significantly improve decoding performance, and further solving a technical problem that a processing of calculating a demodulation bit is omitted in an extension process mode provided in a related art, so that demodulation values of a part of bits are not accurate enough, thereby resulting in poor subsequent decoding performance.
Optionally, in step S14, generating the receiving signal at least according to the transmitting signal may include performing the steps of:
step S141, determining a channel estimation matrix according to the first number and the second number of receiving antennas of the receiver;
step S142, obtaining a noise symbol with a second length, wherein the second length is determined by a second number;
step S143 generates a received signal using the transmitted signal, the channel estimation matrix, and the noise symbol.
In the process of the multiple-input multiple-output antenna (MIMO) Maximum Likelihood Detection (MLD) algorithm (K-best), assuming that the transmission signal of the transmitter is X, where X is a Quadrature Amplitude Modulation (QAM) symbol with a length of N, and these N symbols are respectively transmitted by N (corresponding to the first number) transmission antennas of the transmitter, the received signal of the receiver may be represented as: y = HX + W, where H is a channel estimation matrix of M × N, and is calculated by a channel estimation module of the receiver, M (corresponding to the second number) is the number of receive antennas, W is a noise symbol having a length M, and Y is a received signal vector having a length M and composed of received symbols on the M receive antennas.
Alternatively, in step S16, demodulating the received signal may include performing the steps of:
step S161, performing matrix conversion processing on the received signal to obtain a processed signal;
step S162, performs demodulation bit processing on the processed signal.
The processed signal may be obtained by performing a matrix transformation process on the vector representation of the received signal, and then performing a demodulation bit process on the processed signal.
Optionally, in step S161, performing matrix transformation on the received signal to obtain a processed signal may include the following steps:
step S1611, performing an orthogonal triangular decomposition process on the channel estimation matrix to obtain a first matrix and a second matrix, where the first matrix is an orthogonal matrix determined by the first number and the second number, and the second matrix is an upper triangular matrix determined by the first number;
in step S1612, the processed signal is calculated by using the conjugate matrix of the first matrix and the received signal.
In an alternative embodiment, the receiver may perform a quadrature triangular (QR) decomposition on the channel estimation matrix H to obtain H = QR, where Q is an M × N quadrature matrix (corresponding to the first matrix mentioned above), and Q is a matrix of M × N quadrature H Q = I, I is a unit matrix, and R is an upper triangular matrix of N × N (equivalent to the second matrix described above). The receiver then converts Q to H Multiplying Y by Y to obtain Z (equivalent to the processed signal) = Q H Y = RX + W ', wherein W' = Q H W。
Optionally, in step S162, demodulating the transmission signal with the processed signal may include performing the following steps:
step S1621, aiming at the current single-layer signal to be processed, selecting a third number of candidate estimated values from the processed multilayer signals in the transmitting signal, and acquiring an approximate estimated value of the current layer corresponding to each candidate estimated value and a fourth number of expanded values expanded around the approximate estimated value to obtain a fifth number of expanded values, wherein the fifth number is obtained by calculating the third number and the fourth number;
step S1622, calculating a partial Euclidean distance of each extended value in the fifth number of extended values, and calculating a demodulation bit value of the current single-layer signal to be processed according to the partial Euclidean distance;
step S1623, judging whether the emission signal has a single-layer signal which is not processed yet, if not, ending the process; if so, the results are sorted in ascending order of partial euclidean distances, and a third number of spreading values are selected from the fifth number of spreading values as candidate evaluation values to be used, and the process returns to step S1621.
The transmitter may define data on each transmit antenna as one layer, and thus if N transmit antennas are provided on the transmitter, there are N layers of transmit signals in total. The receiver needs to detect the transmission signal of each layer, and for the transmission signal of each layer N (N = N, N-1 … 1, i.e., the above single-layer signal to be currently processed), the following processing is performed:
first, K1 (corresponding to the third number) candidate estimated values x are selected from the processed N … N +1 layer transmission signals (N-n) (k) (K =1 … K1). Specifically, the estimated value x for each candidate (N-n) (k) First, an approximation of x is obtained (n) Is estimated value of
Figure BDA0002422253340000081
Wherein Z is n Is the n-th element of Z, R n,m Is an element of the n-th row and m-columns of the matrix R, x N-n (k, m) is the m-th value of the k-th candidate vector of length (N-N) x. Then, surround again
Figure BDA0002422253340000082
Expanding the expanded value x of K2 (corresponding to the fourth number) modulation constellations (N-n+1) (K, n), K =1.. K2. Fig. 2 is a schematic diagram of an expansion manner according to an alternative embodiment of the present invention, as shown in fig. 2, the expansion manner is implemented by a table look-up manner, and the approximate estimation value and the expansion value can be determined by different filling types.
Next, for K1 × K2 (corresponding to the fifth number) spread values x that have already been obtained (N-n+1) (k) K =1.. K1 × K2 calculates its Partial Euclidean Distance (PED) value D (K) = | Z N-n+1 -R′x (N-n+1) (k)| 2 Wherein R' is a matrix consisting of the N-th to N-th rows of R, Z N-n+1 Are the values of the nth row to the nth row of Z.
Then, the demodulated bit value of the nth layer is calculated from the PED value.
And finally, for the K1X K2 spreading values x, performing ascending arrangement according to PED values of the K1X K2 spreading values x, selecting smaller candidate estimation values of the K1 PEDs according to an arrangement result, and performing demodulation bit processing on the next layer (the N-1 layer) until all the signals sent by the N layers are processed.
It should be noted that, in the process of calculating the demodulation bit i, it is necessary that the values of the bits i corresponding to all constellation symbols in the set of candidate estimation values x are not all 0 or all 1, otherwise, a large error exists when calculating the demodulation bit. Therefore, it is ensured in the above spreading procedure that the spread symbol has values of 0 and 1 for each bit, thereby improving the detection performance of the demodulated bit by ensuring that the symbol including all bits of 0 and 1 is included when the symbol is spread by K-best.
Optionally, in step S1622, calculating the demodulated bit value of the single-layer signal to be processed currently according to the partial euclidean distance may include the following steps:
step S16221, searching a first set and a second set corresponding to each bit in the current single-layer signal to be processed, where the first set is composed of values whose values of bits to be demodulated are 0 in the fifth number of spreading values, and the second set is composed of values whose values of bits to be demodulated are 1 in the fifth number of spreading values;
step S16222, searching a first value with the smallest fractional euclidean distance from the first set, and searching a second value with the smallest fractional euclidean distance from the second set;
in step S16223, the first value and the second value are used to calculate a demodulated bit value.
In the process of calculating the demodulated bit value of the nth layer according to the PED value, aiming at each bit corresponding to the modulation symbol of the nth layer at x (N-n+1) (k) The set s0 (equivalent to the first set) with the bit value of 0 and the set s1 (equivalent to the second set) with the bit value of 1 are found. Find the corresponding smallest PED D in s0 0 (corresponding to the first value above) and find the corresponding smallest PED D in s1 1 (corresponding to the second value) the demodulated bit value of the bit is D 0 -D 1
Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention or portions thereof contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (which may be a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
In this embodiment, a signal processing apparatus is further provided, and the apparatus is used to implement the foregoing embodiments and preferred embodiments, and the description of the apparatus is omitted for brevity. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 3 is a block diagram of a signal processing apparatus according to an embodiment of the present invention, as shown in fig. 3, the apparatus including: a receiving module 10, configured to receive a transmission signal from a transmitter, where the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmit antennas of the transmitter; a generating module 20, configured to generate a receiving signal of the receiver according to at least the transmitting signal; a processing module 30, configured to perform demodulation bit processing on the received signal to obtain an estimate of the transmitted signal.
Optionally, the generating module 20 includes: a determining unit (not shown in the figure) for determining a channel estimation matrix based on the first number and the second number of receive antennas of the receiver; an obtaining unit (not shown in the figure) for obtaining noise symbols of a second length, wherein the second length is determined by a second number; a first calculation unit (not shown in the figure) for generating a received signal using the transmitted signal, the channel estimation matrix and the noise symbol.
Optionally, the processing module 30 is configured to perform matrix transformation processing on the received signal to obtain a processed signal; and performing demodulation bit processing on the processed signal.
Optionally, the processing module 30 comprises: a decomposition unit (not shown in the figure) configured to perform an orthogonal triangle decomposition on the channel estimation matrix to obtain a first matrix and a second matrix, where the first matrix is an orthogonal matrix determined by a first number and a second number, and the second matrix is an upper triangular matrix determined by the first number; and a second calculating unit (not shown in the figure) for calculating to obtain a processed signal by using the conjugate matrix of the first matrix and the received signal.
Optionally, the processing module 30 comprises: a processing unit (not shown in the figure), configured to select, for a single-layer signal to be currently processed, a third number of candidate estimated values from multi-layer signals processed in a transmitted signal, and obtain an approximate estimated value of a current layer corresponding to each candidate estimated value and a fourth number of extended values extended around the approximate estimated value, so as to obtain a fifth number of extended values, where the fifth number is obtained by calculating the third number and the fourth number; a third calculating unit (not shown in the figure), configured to calculate a partial euclidean distance of each spreading value in the fifth number of spreading values, and calculate a demodulated bit value of the single-layer signal to be processed currently according to the partial euclidean distance; a judging unit (not shown in the figure) for judging whether the transmission signal has a single-layer signal which is not processed yet, if not, the process is ended; and if so, selecting a third number of expansion values from the fifth number of expansion values as candidate estimation values to be used according to ascending ranking results of the partial Euclidean distances, and returning the third number of expansion values to the processing unit.
Optionally, a third calculating unit (not shown in the figure), configured to search a first set and a second set corresponding to each bit in the current single-layer signal to be processed, where the first set is composed of values whose values of bits to be demodulated are 0 in a fifth number of spreading values, and the second set is composed of values whose values of bits to be demodulated are 1 in the fifth number of spreading values; searching a first numerical value with the minimum part Euclidean distance from the first set, and searching a second numerical value with the minimum part Euclidean distance from the second set; and calculating to obtain a demodulation bit value by adopting the first numerical value and the second numerical value.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
Embodiments of the present invention also provide a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.
Alternatively, in the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:
s1, receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter;
s2, generating a receiving signal of a receiver at least according to the transmitting signal;
and S3, demodulating the received signal to obtain the estimation of the transmitted signal.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
Embodiments of the present invention also provide an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the steps of any of the above method embodiments.
Optionally, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Optionally, in this embodiment, the processor may be configured to execute the following steps by a computer program:
s1, receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter;
s2, generating a receiving signal of a receiver at least according to the transmitting signal;
and S3, demodulating the received signal to obtain the estimation of the transmitted signal.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is substantially or partly contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk, and various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (13)

1. A signal processing method, comprising:
receiving a transmission signal from a transmitter, wherein the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmission antennas of the transmitter;
generating a receiving signal of a receiver according to at least the transmitting signal;
carrying out demodulation bit processing on the received signal to obtain an estimation on the transmitted signal;
wherein demodulating the received signal comprises:
a processing step, selecting a third number of candidate estimated values from the processed multilayer signals in the sending signals according to the current single-layer signals to be processed, and acquiring an approximate estimated value of the current layer corresponding to each candidate estimated value and a fourth number of expanded values expanded around the approximate estimated value to obtain a fifth number of expanded values, wherein the fifth number is obtained by calculating the third number and the fourth number;
calculating a partial Euclidean distance of each extended value in the fifth number of extended values, and calculating a demodulation bit value of the current single-layer signal to be processed according to the partial Euclidean distance;
judging whether the sending signal still has an unprocessed single-layer signal or not, and if not, ending the process; and if so, selecting the third number of expansion values from the fifth number of expansion values as candidate estimation values to be used according to the ascending ranking result of the partial Euclidean distance, and returning to the processing step.
2. The method of claim 1, wherein generating the receive signal based at least on the transmit signal comprises:
determining a channel estimation matrix from the first number and a second number of receive antennas of the receiver;
obtaining noise symbols of a second length, wherein the second length is determined by the second number;
generating the received signal using the transmitted signal, the channel estimation matrix, and the noise symbol.
3. The method of claim 1, wherein demodulating the received signal comprises:
performing matrix transformation processing on the received signal to obtain a processed signal;
and carrying out demodulation bit processing on the processed signal.
4. The method of claim 3, wherein performing a matrix transformation on the received signal to obtain the processed signal comprises:
performing orthogonal triangular decomposition processing on the channel estimation matrix to obtain a first matrix and a second matrix, wherein the first matrix is an orthogonal matrix determined by the first number and the second number, and the second matrix is an upper triangular matrix determined by the first number;
and calculating to obtain the processed signal by adopting the conjugate matrix of the first matrix and the received signal.
5. The method of claim 1, wherein calculating the demodulated bit values of the currently-processed single-layer signal from the partial Euclidean distance comprises:
searching a first set and a second set corresponding to each bit in the current single-layer signal to be processed, wherein the first set is composed of values with a value of 0 of a bit to be demodulated in the fifth number of spreading values, and the second set is composed of values with a value of 1 of the bit to be demodulated in the fifth number of spreading values;
searching the first set for a first value with the minimum partial Euclidean distance, and searching the second set for a second value with the minimum partial Euclidean distance;
and calculating to obtain the demodulation bit value by adopting the first numerical value and the second numerical value.
6. A signal processing apparatus, characterized by comprising:
a receiving module, configured to receive a transmission signal from a transmitter, where the transmission signal is a quadrature amplitude modulation symbol with a first length, and the first length is determined by a first number of transmit antennas of the transmitter;
a generating module, configured to generate a receiving signal of a receiver according to at least the transmitting signal;
a processing module, configured to perform demodulation bit processing on the received signal to obtain an estimate of the transmitted signal;
wherein the processing module comprises:
the processing unit is used for selecting a third number of candidate estimated values from multi-layer signals processed in the sending signals according to single-layer signals to be processed currently, acquiring an approximate estimated value of a current layer corresponding to each candidate estimated value and a fourth number of expanded values expanded around the approximate estimated value, and obtaining a fifth number of expanded values, wherein the fifth number is obtained by calculating the third number and the fourth number;
a third calculating unit, configured to calculate a partial euclidean distance of each of the fifth number of spreading values, and calculate a demodulated bit value of the current single-layer signal to be processed according to the partial euclidean distance;
the judging unit is used for judging whether the sending signal has a single-layer signal which is not processed yet, and if not, the process is ended; and if so, selecting the third number of expansion values from the fifth number of expansion values as candidate estimation values to be used according to ascending ranking results of the partial Euclidean distances, and returning the candidate estimation values to the processing unit.
7. The apparatus of claim 6, wherein the generating module comprises:
a determining unit configured to determine a channel estimation matrix according to the first number and a second number of receive antennas of the receiver;
an obtaining unit configured to obtain a noise symbol of a second length, wherein the second length is determined by the second number;
a first calculation unit configured to generate the received signal using the transmitted signal, the channel estimation matrix, and the noise symbol.
8. The apparatus of claim 6, wherein the processing module is configured to perform matrix transformation on the received signal to obtain a processed signal; and performing demodulation bit processing on the processed signal.
9. The apparatus of claim 8, wherein the processing module comprises:
a decomposition unit, configured to perform orthogonal triangle decomposition processing on a channel estimation matrix to obtain a first matrix and a second matrix, where the first matrix is an orthogonal matrix determined by the first number and the second number, and the second matrix is an upper triangular matrix determined by the first number;
and the second calculation unit is used for calculating to obtain the processed signal by adopting the conjugate matrix of the first matrix and the received signal.
10. The apparatus according to claim 6, wherein the third computing unit is configured to find a first set and a second set corresponding to each bit in the single-layer signal to be currently processed, where the first set is composed of values whose values of bits to be demodulated are 0 in the fifth number of spreading values, and the second set is composed of values whose values of bits to be demodulated are 1 in the fifth number of spreading values; searching the first set for a first value with the minimum partial Euclidean distance, and searching the second set for a second value with the minimum partial Euclidean distance; and calculating the demodulation bit value by adopting the first numerical value and the second numerical value.
11. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the signal processing method of any one of claims 1 to 5 when executed.
12. A processor for running a program, wherein the program is arranged to perform the signal processing method of any of claims 1 to 5 when running.
13. An electronic device comprising a memory and a processor, wherein the memory has a computer program stored therein, and the processor is configured to execute the computer program to perform the signal processing method according to any one of claims 1 to 5.
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