CN111475215A - Server starting method, device and related equipment - Google Patents
Server starting method, device and related equipment Download PDFInfo
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- CN111475215A CN111475215A CN202010269024.2A CN202010269024A CN111475215A CN 111475215 A CN111475215 A CN 111475215A CN 202010269024 A CN202010269024 A CN 202010269024A CN 111475215 A CN111475215 A CN 111475215A
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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Abstract
The application discloses a server startup method, which comprises the steps of reading BMC firmware from an F L ASH chip when a startup instruction is received, wherein the BMC firmware and the BIOS firmware are stored in the F L ASH chip, the BMC firmware is stored in a preset storage space, the BMC firmware is executed in the preset storage space, a BIOS controller is controlled to execute the BIOS firmware in the F L ASH chip, and server startup is completed.
Description
Technical Field
The present application relates to the field of server technologies, and in particular, to a server booting method, a server booting apparatus, a device, and a computer-readable storage medium.
Background
The server is generally designed with a BMC (Base Management Controller baseboard manager) for managing and monitoring the state information of the server, such as temperature, power consumption, etc. Referring to fig. 1, fig. 1 is a schematic structural diagram of a server in the prior art, in which BIOS (Basic Input and Output System ) FW (Firmware) is a program code read and executed by a CPU (Central Processing Unit) when a CPU is powered On, BMC is generally implemented by an SOC (System On Chip) Chip of an ARM (Advanced RISC Machine, a microprocessor) kernel, BMC FW is a program code read and executed when the BMC is powered On, and it can be seen that BIOS FM and BMC FW are respectively stored in different chips, chips of the two are independent, and code reading and execution from the FW Chip are not affected when the BMC is powered On.
However, when the BIOS FW and bmfw need to be updated, the contents in the two FM chips need to be refreshed respectively, and thus, the refresh process is complicated and inefficient because the contents in the two FM chips need to be refreshed at one time, and the reliability of the server system is greatly reduced and the system cost is increased because the BIOS FW and BMC FW are stored in a plurality of chips respectively.
Therefore, how to implement the unified management of the BIOS firmware and the BMC firmware in the server, reduce the cost of the server system, and improve the system reliability is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The server startup method can realize the unified management of the BIOS firmware and the BMC firmware in the server, reduce the system cost of the server and improve the system reliability; another object of the present application is to provide a server, a server boot device, an apparatus and a computer readable storage medium, which also have the above advantages.
In order to solve the foregoing technical problem, in a first aspect, the present application provides a server boot method, applied to a BMC, including:
when a starting-up instruction is received, reading BMC firmware from an F L ASH chip, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
storing the BMC firmware into a preset storage space;
and executing the BMC firmware in the preset storage space, and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip to complete the startup of the server.
Preferably, the BMC firmware is stored in a high address area of the F L ASH chip, and the BIOS firmware is stored in a low address area of the F L ASH chip.
Preferably, the controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip includes:
sending a power-on instruction to a power supply controller to enable the power supply controller to send a power-on signal to the BIOS controller:
the BIOS controller executes the BIOS firmware in the F L ASH chip based on the power-on signal.
In a second aspect, the application further provides a server, which comprises a BIOS controller, a BMC and an F L ASH chip, wherein the BIOS controller and the BMC are both connected to the F L ASH chip, and the F L ASH chip comprises a BIOS firmware storage area and a BMC firmware storage area;
the BMC is used for reading BMC firmware from the F L ASH chip according to a boot instruction and storing the BMC firmware in a preset storage space, executing the BMC firmware in the preset storage space and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip so as to complete the boot of the server.
Preferably, the service further includes a power controller, configured to send a power-on signal to the BIOS controller according to a power-on instruction sent by the BMC, so that the BIOS controller executes the BIOS firmware in the F L ASH chip based on the power-on signal.
Preferably, the preset storage space is a storage space provided by an SDRAM.
Preferably, the BIOS controller is connected to the F L ASH chip through an SPI interface, and the BMC is connected to the F L ASH chip through an SPI interface.
In a third aspect, the present application further discloses a server boot device, applied to a BMC, including:
the reading module is used for reading the BMC firmware from the F L ASH chip when a starting-up instruction is received, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
the storage module is used for storing the BMC firmware to a BMC memory;
and the boot module is used for executing the BMC firmware in the BMC memory and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip so as to complete the boot of the server.
In a fourth aspect, the present application further discloses a server booting device, including:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of any of the server power-on methods described above.
In a fifth aspect, the present application further discloses a computer-readable storage medium, in which a computer program is stored, and the computer program is used for implementing the steps of any one of the server booting methods described above when being executed by a processor.
The server boot method is applied to BMC and comprises the steps of reading BMC firmware from an F L ASH chip when a boot instruction is received, wherein the BMC firmware and the BIOS firmware are stored in the F L ASH chip, storing the BMC firmware into a preset storage space, executing the BMC firmware in the preset storage space, controlling a BIOS controller to execute the BIOS firmware in the F L ASH chip, and completing server boot.
Therefore, according to the server startup method provided by the application, the F L ASH chip is divided into two areas, the BIOS firmware and the BMC firmware are respectively stored in the different areas, the BIOS firmware and the BMC firmware can be simultaneously placed in the same F L ASH chip through the time of the power-on instruction reading of the system CPU and the BMC CPU, and the power-on of the system CPU and the BMC SOC is not influenced, so that the normal startup of the server is ensured.
The server, the server startup device, the equipment and the computer readable storage medium provided by the application all have the beneficial effects, and are not described again.
Drawings
In order to more clearly illustrate the technical solutions in the prior art and the embodiments of the present application, the drawings that are needed to be used in the description of the prior art and the embodiments of the present application will be briefly described below. Of course, the following description of the drawings related to the embodiments of the present application is only a part of the embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the provided drawings without any creative effort, and the obtained other drawings also belong to the protection scope of the present application.
FIG. 1 is a schematic diagram of a server in the prior art;
fig. 2 is a schematic flowchart of a server booting method provided in the present application;
FIG. 3 is a prior art address space map of BIOS firmware;
FIG. 4 is a prior art address space map of BMC firmware;
FIG. 5 is an address space map of server firmware in an F L ASH chip according to the present disclosure;
fig. 6 is a schematic structural diagram of a server provided in the present application;
fig. 7 is a schematic structural diagram of a server boot device according to the present application;
fig. 8 is a schematic structural diagram of a server boot device according to the present application.
Detailed Description
The core of the application is to provide a server startup method, which can realize the unified management of BIOS firmware and BMC firmware in the server, reduce the system cost of the server and improve the system reliability; another core of the present application is to provide a server, a server boot apparatus, a device and a computer-readable storage medium, which also have the above-mentioned advantages.
In order to more clearly and completely describe the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The server is generally designed with a BMC for managing and monitoring status information of the server, such as temperature, power consumption, and the like. The BIOS FW is a program code read and executed when the CPU is powered on, the BMC is generally implemented by an SOC chip of an ARM core, and the BMC FW is a program code read and executed when the CPU is powered on. However, when the BIOS FW and bmfw need to be updated, the contents in the two FM chips need to be refreshed respectively, and thus, the refresh process is complicated and inefficient because the contents in the two FM chips need to be refreshed at one time, and the reliability of the server system is greatly reduced and the system cost is increased because the BIOS FW and BMC FW are stored in a plurality of chips respectively.
Therefore, in order to solve the above technical problems, the present application provides a server boot method, which can implement unified management of the BIOS firmware and the BMC firmware in the server, reduce the system cost of the server, and improve the system reliability.
Referring to fig. 2, fig. 2 is a schematic flow chart of a server boot method provided in the present application, where the server boot method is applied to a BMC, and includes:
s101, when a starting-up instruction is received, reading BMC firmware from an F L ASH chip, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
in order to save development cost, an F L ASH chip can be divided into two storage areas for storing the BIOS firmware and the BMC firmware, namely the BIOS firmware and the BMC firmware are stored in the same F L ASH chip, therefore, when a starting instruction is received, the BIOS system is not powered on by default, and the BMC is powered on and reads the BMC firmware in the F L ASH chip.
In a preferred embodiment, the BMC firmware may be stored in the high address area of the F L ASH chip and the BIOS firmware may be stored in the low address area of the F L ASH chip.
The preferred embodiment provides a specific storage method of the BIOS firmware and the BMC firmware in the F L ASH chip, that is, the BMC firmware is stored in the high address area of the F L ASH chip, and the BIOS firmware is stored in the low address area of the F L ASH chip, specifically, taking the X86 server as an example, the BIOS firmware on the X86 platform is stored in the F L ASH chip, when the power is turned on, the address thereof is mapped into a segment of memory space, the BMC firmware is stored in the F L ASH chip, when the power is turned on, the address thereof is also mapped into a segment of memory space, further, please refer to fig. 3 and fig. 4, fig. 3 is an address space mapping diagram of a BIOS firmware in the prior art, fig. 4 is an address space mapping diagram of a BMC firmware in the prior art, it can be seen that the first execution address read by the CPU is 0 xffffffffffffffff 0, while the first execution address read by the SOC CPU is 0X0000000, that the first execution address of the BIOS firmware is located in the BMC firmware, that is located in the first execution address space of the BMC 5, and the address of the BMC chip, therefore, the address is also different from the ASH chip, the address of the ASH chip, the CPU L, the high address of the ASH chip, and the ASH chip, which is located in the SOC of the BMC 466.
Based on this, please refer to fig. 5, fig. 5 is an address space mapping diagram of the server firmware in the F L ASH chip provided in the present application, the F L ASH chip may be divided into 2 regions, the BIOS firmware is placed from the low address region of the F L ASH chip, and the BMC firmware is placed from the high address region of the F L ASH chip, so that the BIOS firmware and the BMC firmware are stored in the same F L ASH chip, and the BIOS function and the BMC function are not affected.
S102: storing the BMC firmware into a preset storage space;
it should be understood that the specific type of the preset storage space is not unique, and may be a storage medium connected to the BMC SOC or a memory card space created by the BMC SOC, which is not limited in this application.
S103, executing the BMC firmware in the preset storage space, controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip, and completing the startup of the server.
The method comprises the steps of executing the BIOS firmware and the BMC firmware to start the server, specifically, after the BMC firmware is stored in a preset storage space, executing the BMC firmware in the preset storage space, and meanwhile, controlling a BIOS controller to execute the BIOS firmware in an F L ASH chip, so that the execution of the BMC firmware and the BIOS firmware can be simultaneously realized, and the server is started.
As a preferred embodiment, the controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip may include sending a power-on command to the power controller to cause the power controller to send a power-on signal to the BIOS controller, and the BIOS controller executing the BIOS firmware in the F L ASH chip based on the power-on signal.
The preferred embodiment provides a more specific method for executing the BIOS firmware, and specifically, a power controller connected to the BMC and the BIOS controller may be configured to power up the BIOS controller, so that after the BMC stores the BMC firmware in a preset storage space, the BMC may send a power-up command to the power controller while executing the BMC firmware, and the power controller sends a power-up signal to the BIOS controller, so that the BIOS controller reads and executes the BIOS firmware from the F L ASH chip after powering up the BIOS controller.
Therefore, according to the server startup method provided by the application, the F L ASH chip is divided into two areas, the BIOS firmware and the BMC firmware are respectively stored in the different areas, the BIOS firmware and the BMC firmware can be simultaneously placed in the same F L ASH chip through the time of the power-on instruction reading of the system CPU and the BMC CPU, and the power-on of the system CPU and the BMC SOC is not influenced, so that the normal startup of the server is ensured.
In order to solve the technical problem, the application also provides a server which comprises a BIOS controller, a BMC and an F L ASH chip, wherein the BIOS controller and the BMC are connected with the F L ASH chip, and the F L ASH chip comprises a BIOS firmware storage area and a BMC firmware storage area;
the BMC is used for reading the BMC firmware from the F L ASH chip according to the starting instruction and storing the BMC firmware into a preset storage space, executing the BMC firmware in the preset storage space and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip so as to complete the starting of the server.
Specifically, the server provided by the embodiment of the application comprises a BIOS controller, a BMC and an F L ASH chip, wherein the BIOS controller is connected with an F L ASH chip, the BMC is connected with an F L ASH chip, and the F L ASH chip is divided into a BIOS firmware storage area and a BMC firmware storage area which are respectively used for storing BIOS firmware and BMC firmware.
As a preferred embodiment, the server may further include a power controller configured to send a power-on signal to the BIOS controller according to a power-on instruction sent by the BMC, so that the BIOS controller executes the BIOS firmware in the F L ASH chip based on the power-on signal.
Therefore, after the BMC firmware is stored in the preset storage space, the BMC can send a power-on command to the power controller while executing the BMC firmware, and the power controller sends a power-on signal to the BIOS controller, so that the BIOS controller can read and execute the BIOS firmware from the F L ASH chip after being powered on.
As a preferred embodiment, the preset Memory space may be a Memory space provided by an SDRAM (Synchronous dynamic random Access Memory).
The preferred embodiment provides a specific type of predetermined storage space, namely SDRAM, which can be applied to a memory and directly connected to BMC.
In a preferred embodiment, the BIOS controller and the F L ASH chip may be connected via an SPI Interface (serial peripheral Interface), and the BMC and the F L ASH chip may be connected via an SPI Interface.
Further, referring to fig. 6, fig. 6 is a schematic structural diagram of a server provided in the present application, and a specific boot process based on the server is as follows:
the method comprises the steps that firstly, an SPI interface of a PCH (Platform Controller Hub) and an SPI interface of a BMC SOC are connected to the same F L ASH chip, the F L ASH chip is divided into two areas which are used for storing BIOS firmware and BMC firmware respectively, wherein the CPU and the PCH are the BIOS controllers, and a memory connected with the BMC SOC is a preset storage space.
It can be seen that, in the server provided in the embodiment of the present application, the F L ASH chip is divided into two areas, and the BIOS firmware and the BMC firmware are respectively stored in different areas, and the BIOS firmware and the BMC firmware can be simultaneously placed in the same F L ASH chip without affecting the power on of the system CPU and the BMC SOC by the time of the power on and instruction reading of the system CPU and the BMC CPU, so as to ensure the normal power on of the server.
To solve the above technical problem, the present application further provides a server boot device, please refer to fig. 7, where fig. 7 is a schematic structural diagram of the server boot device provided in the present application, where the server boot device is applied to a BMC, and includes:
the reading module 1 is used for reading BMC firmware from an F L ASH chip when a starting-up instruction is received, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
the storage module 2 is used for storing the BMC firmware into the BMC memory;
and the boot module 3 is used for executing the BMC firmware in the BMC memory and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip to complete the boot of the server.
It can be seen that, in the server boot device provided in this embodiment of the present application, the F L ASH chip is divided into two areas, and the BIOS firmware and the BMC firmware are respectively stored in different areas, and the BIOS firmware and the BMC firmware can be simultaneously placed in the same F L ASH chip through the time for the system CPU and the BMC CPU to power on and read instructions, and the power on of the system CPU and the BMC SOC is not affected, so as to ensure normal boot of the server.
For the introduction of the apparatus provided in the present application, please refer to the above method embodiments, which are not described herein again.
To solve the above technical problem, the present application further provides a server boot device, please refer to fig. 8 and fig. 8, which are schematic structural diagrams of a server boot device provided in the present application, where the server boot device may include:
a memory 10 for storing a computer program;
the processor 20, when executing the computer program, may implement the steps of any of the server booting methods described above.
For the introduction of the device provided in the present application, please refer to the above method embodiment, which is not described herein again.
In order to solve the above problem, the present application further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, can implement the steps of any one of the server booting methods described above.
The computer-readable storage medium may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
For the introduction of the computer-readable storage medium provided in the present application, please refer to the above method embodiments, which are not described herein again.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The technical solutions provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall into the protection scope of the present application.
Claims (10)
1. A server startup method is applied to BMC and comprises the following steps:
when a starting-up instruction is received, reading BMC firmware from an F L ASH chip, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
storing the BMC firmware into a preset storage space;
and executing the BMC firmware in the preset storage space, and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip to complete the startup of the server.
2. The server boot method of claim 1, wherein the BMC firmware is stored in a high address area of the F L ASH chip and the BIOS firmware is stored in a low address area of the F L ASH chip.
3. The server boot method of claim 1, wherein the controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip comprises:
sending a power-on instruction to a power supply controller so that the power supply controller sends a power-on signal to the BIOS controller;
the BIOS controller executes the BIOS firmware in the F L ASH chip based on the power-on signal.
4. A server is characterized by comprising a BIOS controller, a BMC and an F L ASH chip, wherein the BIOS controller and the BMC are connected with the F L ASH chip, and the F L ASH chip comprises a BIOS firmware storage area and a BMC firmware storage area;
the BMC is used for reading BMC firmware from the F L ASH chip according to a boot instruction and storing the BMC firmware in a preset storage space, executing the BMC firmware in the preset storage space and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip so as to complete the boot of the server.
5. The server according to claim 4, further comprising a power controller configured to send a power-on signal to the BIOS controller according to a power-on command sent by the BMC, so that the BIOS controller executes the BIOS firmware in the F L ASH chip based on the power-on signal.
6. The server according to claim 4, wherein the predetermined storage space is a storage space provided by SDRAM.
7. The server of claim 4, wherein the BIOS controller is coupled to the F L ASH chip via an SPI interface, and wherein the BMC is coupled to the F L ASH chip via an SPI interface.
8. A server boot device, applied to BMC, comprising:
the reading module is used for reading the BMC firmware from the F L ASH chip when a starting-up instruction is received, wherein the F L ASH chip stores the BMC firmware and the BIOS firmware;
the storage module is used for storing the BMC firmware to a BMC memory;
and the boot module is used for executing the BMC firmware in the BMC memory and controlling the BIOS controller to execute the BIOS firmware in the F L ASH chip so as to complete the boot of the server.
9. A server boot device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of the server power-on method according to any of claims 1 to 3.
10. A computer-readable storage medium, in which a computer program is stored, which, when being executed by a processor, is adapted to carry out the steps of the server boot method according to any one of claims 1 to 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010269024.2A CN111475215A (en) | 2020-04-08 | 2020-04-08 | Server starting method, device and related equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010269024.2A CN111475215A (en) | 2020-04-08 | 2020-04-08 | Server starting method, device and related equipment |
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| CN111475215A true CN111475215A (en) | 2020-07-31 |
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| CN202010269024.2A Withdrawn CN111475215A (en) | 2020-04-08 | 2020-04-08 | Server starting method, device and related equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112130910A (en) * | 2020-08-24 | 2020-12-25 | 中科可控信息产业有限公司 | Equipment starting method and device, computer equipment and storage medium |
| CN113031975A (en) * | 2021-03-24 | 2021-06-25 | 山东英信计算机技术有限公司 | Method and device for sharing storage chip by multiple images and server |
| CN113127044A (en) * | 2021-04-13 | 2021-07-16 | 山东英信计算机技术有限公司 | BMC upgrading method and device and related components |
| CN114461286A (en) * | 2022-01-29 | 2022-05-10 | 苏州浪潮智能科技有限公司 | Server starting method and device and readable storage medium |
-
2020
- 2020-04-08 CN CN202010269024.2A patent/CN111475215A/en not_active Withdrawn
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112130910A (en) * | 2020-08-24 | 2020-12-25 | 中科可控信息产业有限公司 | Equipment starting method and device, computer equipment and storage medium |
| CN113031975A (en) * | 2021-03-24 | 2021-06-25 | 山东英信计算机技术有限公司 | Method and device for sharing storage chip by multiple images and server |
| CN113127044A (en) * | 2021-04-13 | 2021-07-16 | 山东英信计算机技术有限公司 | BMC upgrading method and device and related components |
| CN114461286A (en) * | 2022-01-29 | 2022-05-10 | 苏州浪潮智能科技有限公司 | Server starting method and device and readable storage medium |
| CN114461286B (en) * | 2022-01-29 | 2023-08-04 | 苏州浪潮智能科技有限公司 | Server starting method and device, electronic equipment and readable storage medium |
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