CN111475126A - Device and method for displaying information steganography - Google Patents
Device and method for displaying information steganography Download PDFInfo
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- CN111475126A CN111475126A CN202010245215.5A CN202010245215A CN111475126A CN 111475126 A CN111475126 A CN 111475126A CN 202010245215 A CN202010245215 A CN 202010245215A CN 111475126 A CN111475126 A CN 111475126A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/0021—Image watermarking
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Abstract
The invention provides a device and a method for steganography of display information, wherein the device comprises: the input end of the A/D chip is connected with the VGA signal output end of the host, and the output end of the A/D chip is connected with the input end of the FPGA chip; the output end of the FPGA chip is connected with the input end of the D/A chip; and the output end of the D/A chip is connected with a display. The invention solidifies the steganographic program in the FPGA chip, is safe and reliable, can effectively strengthen the precaution of confidential work, and has lower cost.
Description
Technical Field
The invention belongs to the technical field of servers, and particularly relates to a device and a method for displaying information steganography.
Background
The confidential information of the organization is stored in the confidential machine, and the information cannot be transmitted outside. At present, a secret-related machine protects a network, a USB port and the like of a computer through special software to ensure that secret-related information cannot be transmitted outside through the paths, but the secret-related information cannot be transmitted outside due to the fact that people who try to shoot and retain information on a display of the secret-related machine cannot be prevented, specific secret leakage information sources cannot be tracked, and better precaution cannot be achieved for subsequent secret keeping work. Therefore, there is a need for a device that can trace a specific divulgence source in time when finding a security-related image captured in violation, and that can take better precaution and warning effects on subsequent security work.
Disclosure of Invention
In view of the above-mentioned deficiencies of the prior art, the present invention provides a device and a method for steganography of display information, so as to solve the above-mentioned technical problems.
The embodiment of the application provides a display information steganography device, which comprises:
the input end of the A/D chip is connected with the VGA signal output end of the host, and the output end of the A/D chip is connected with the input end of the FPGA chip; the output end of the FPGA chip is connected with the input end of the D/A chip; and the output end of the D/A chip is connected with a display.
In an embodiment of the present application, the FPGA chip is installed with a steganographic program.
In an embodiment of the application, the equipment further comprises a single chip microcomputer, and the A/D chip, the D/A chip and the FPGA chip are all connected with the single chip microcomputer.
The invention also provides a steganography method for display information, which comprises the following steps:
the A/D chip converts the analog signal output by the host computer into a digital signal;
calling a steganography program by the FPGA chip to perform steganography processing on the digital signal;
the D/A chip converts the digital signal subjected to steganography into an analog signal and transmits the converted analog signal to a display.
In an embodiment of the present application, the invoking, by the FPGA chip, a steganography program to perform steganography processing on the digital signal includes:
and hiding the target information in the image frame through a steganographic program.
In one embodiment of the present application, the hiding the target information in the image frame by the steganographic process includes:
picking the number of embedded pixels according to a given Key (Key);
selecting a least significant bit from an image frame according to the number of pixels;
target information is inserted into the least significant bits.
In one embodiment of the present application, the method further comprises:
according to the number of the pixels and the secret information in the given binary format, whether the least important bits of the selected pixel points are the same as the secret information in the binary format to be embedded is compared:
if so, not changing the least significant bit;
if not, replacing the least important bit of the selected pixel point with the secret information in the binary format.
In one embodiment of the present application, the method further comprises:
and the singlechip is used for updating the functional programs of the A/D chip, the D/A chip and the FPGA chip.
The beneficial effect of the invention is that,
the hidden writing device and the hidden writing method for the display information provided by the invention have the advantages that the hidden writing device is additionally arranged between the confidential host and the display, VGA signals output by the host are collected, the hidden writing operation is carried out on the image by taking a frame as a unit, and then the image with the hidden writing data is output to the display. The invention solidifies the steganographic program in the FPGA chip, is safe and reliable, can effectively strengthen the precaution of confidential work, and has lower cost.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an apparatus according to an embodiment of the present application.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
Example 1
The present embodiment provides a display information steganography apparatus, including:
the input end of the A/D chip is connected with the VGA signal output end of the host, and the output end of the A/D chip is connected with the input end of the FPGA chip; the output end of the FPGA chip is connected with the input end of the D/A chip; and the output end of the D/A chip is connected with a display.
Example 2
Referring to fig. 1, the present embodiment provides a display information steganography apparatus including:
the input end of the A/D chip is connected with the VGA signal output end of the host, and the output end of the A/D chip is connected with the input end of the FPGA chip; the output end of the FPGA chip is connected with the input end of the D/A chip; and the output end of the D/A chip is connected with a display. And the FPGA chip is provided with a steganography program. The equipment further comprises a single chip microcomputer, and the A/D chip, the D/A chip and the FPGA chip are all connected with the single chip microcomputer.
Example 3
The embodiment provides a steganography method for display information, which comprises the following steps:
the A/D chip converts the analog signal output by the host computer into a digital signal;
calling a steganography program by the FPGA chip to perform steganography processing on the digital signal;
the D/A chip converts the digital signal subjected to steganography into an analog signal and transmits the converted analog signal to a display.
Example 4
The embodiment provides a steganography method for display information, which comprises the following steps:
s1, the information steganography device of the display intercepts the image analog signal output by the VGA line of the host, and the analog signal is converted into a digital signal by the A/D conversion chip.
And S2, hiding the target information to be written in each frame of the image by taking the converted digital signal as a unit through an FPGA steganography algorithm.
There are three steps for the embedding process:
(1) choosing the embedded pixel number L ength (message) by a given Key (Key) in Cover;
(2) selecting the least significant bit in the image frame by adopting a random interval method according to the number of pixels, comparing whether the least significant bit (L SB) of the points is the same as the secret information of the binary format to be embedded or not for the number of pixels determined by the step (1) and the secret information of the given binary format, if so, not changing the least significant bit (L SB), otherwise, executing the step (3);
(3) for the extraction process, the pixel position of the Stego embedded with the password information is found according to a Key (Key), then L SB of gray values of the pixels is extracted, the secret information is formed after arrangement, and finally the binary information is converted into text or other multimedia formats in other encoding formats such as ASCII codes or Unillocode codes.
And S3, converting the digital signal processed by the FPGA steganography algorithm into an analog semaphore by a D/A conversion chip. And finally displaying the converted analog signals at a display end through a VGA wire. The image with the steganographic data can be extracted by special software, and the function of tracking a confidential source is realized.
Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. A display information steganography device, comprising:
the input end of the A/D chip is connected with the VGA signal output end of the host, and the output end of the A/D chip is connected with the input end of the FPGA chip; the output end of the FPGA chip is connected with the input end of the D/A chip; and the output end of the D/A chip is connected with a display.
2. The display information steganography device of claim 1, wherein the FPGA chip is installed with a steganography program.
3. The device for steganography of display information according to claim 1, further comprising a single chip microcomputer, wherein the A/D chip, the D/A chip and the FPGA chip are all connected with the single chip microcomputer.
4. A method for steganographically displaying information, the method comprising:
the A/D chip converts the analog signal output by the host computer into a digital signal;
calling a steganography program by the FPGA chip to perform steganography processing on the digital signal;
the D/A chip converts the digital signal subjected to steganography into an analog signal and transmits the converted analog signal to a display.
5. The method of claim 4, wherein the FPGA chip calls a steganographic program to steganographically process the digital signal, comprising:
and hiding the target information in the image frame through a steganographic program.
6. The method of claim 5, wherein hiding the target information in the image frame by the steganographic process comprises:
picking the number of embedded pixels according to a given Key (Key);
selecting a least significant bit from an image frame according to the number of pixels;
target information is inserted into the least significant bits.
7. The method of claim 6, further comprising:
according to the number of the pixels and the secret information in the given binary format, whether the least important bits of the selected pixel points are the same as the secret information in the binary format to be embedded is compared:
if so, not changing the least significant bit;
if not, replacing the least important bit of the selected pixel point with the secret information in the binary format.
8. The method of claim 4, further comprising:
and the singlechip is used for updating the functional programs of the A/D chip, the D/A chip and the FPGA chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010245215.5A CN111475126A (en) | 2020-03-31 | 2020-03-31 | Device and method for displaying information steganography |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010245215.5A CN111475126A (en) | 2020-03-31 | 2020-03-31 | Device and method for displaying information steganography |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101018291A (en) * | 2006-10-19 | 2007-08-15 | 北京万东高星电子产品有限责任公司 | Medical X-ray TV system with the multi-recursive compound control noise reduction technology |
| CN101437148A (en) * | 2007-11-16 | 2009-05-20 | 西安电子科技大学 | Video information leakage resistance method and processing device |
| US20170154396A1 (en) * | 2015-12-01 | 2017-06-01 | Unisys Corporation | Method and system for protecting data using steganography |
| CN108111710A (en) * | 2017-12-15 | 2018-06-01 | 四川大学 | A kind of more image encryption methods that can reduce ciphertext and key data amount |
| CN108537049A (en) * | 2018-03-14 | 2018-09-14 | 中山大学 | A kind of adaptive steganographic algorithm based on bianry image |
-
2020
- 2020-03-31 CN CN202010245215.5A patent/CN111475126A/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101018291A (en) * | 2006-10-19 | 2007-08-15 | 北京万东高星电子产品有限责任公司 | Medical X-ray TV system with the multi-recursive compound control noise reduction technology |
| CN101437148A (en) * | 2007-11-16 | 2009-05-20 | 西安电子科技大学 | Video information leakage resistance method and processing device |
| US20170154396A1 (en) * | 2015-12-01 | 2017-06-01 | Unisys Corporation | Method and system for protecting data using steganography |
| CN108111710A (en) * | 2017-12-15 | 2018-06-01 | 四川大学 | A kind of more image encryption methods that can reduce ciphertext and key data amount |
| CN108537049A (en) * | 2018-03-14 | 2018-09-14 | 中山大学 | A kind of adaptive steganographic algorithm based on bianry image |
Non-Patent Citations (1)
| Title |
|---|
| KILLSHADOW: "隐写术（二）-传统数字图像隐写算法" * |
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Application publication date: 20200731 |