CN111464320A - Improved DTU system and method - Google Patents

Improved DTU system and method Download PDF

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Publication number
CN111464320A
CN111464320A CN201910058818.1A CN201910058818A CN111464320A CN 111464320 A CN111464320 A CN 111464320A CN 201910058818 A CN201910058818 A CN 201910058818A CN 111464320 A CN111464320 A CN 111464320A
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resistor
pin
chip
common capacitor
module
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蒙新亮
宋炜
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Xi'an Sainuo Internet Of Things Technology Co ltd
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Xi'an Sainuo Internet Of Things Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

An improved DTU system and method, including processor, power management module, starting up from module and hardware watchdog module; the processor is connected with the power management module, the starting self-starting module and the hardware watchdog module. The processor can include a baseband modem that functions as an application processor. In addition, the system also has a GNSS positioning function, so that the improved DTU system can accurately position. The key point of the improved DTU system is that the IO throughput capacity can be effectively improved by adopting an asynchronous IO communication model, and the GNSS positioning function is used and has the positioning capacity of a GPS and a Beidou. In addition, the improved DTU system can open any number of data channels by setting, effectively improves the communication capacity of data, and has the function of parallel processing in multiple working modes, including a TCP mode, a UDP mode, an HTTP mode and a short message mode.

Description

Improved DTU system and method
Technical Field
The invention relates to the technical field of DTUs, in particular to an improved DTU system and method.
Background
A dtu (data Transfer unit) is a wireless terminal device that is used exclusively for converting serial data into IP data or converting IP data into serial data and transmitting the serial data through a wireless communication network. The DTU is widely applied to the industries of meteorology, hydrology, water conservancy, geology and the like. In the DTU module in the prior art, particularly for a 4G communication chip, an additional single chip microcomputer is added outside a wireless communication module such as the 4G chip to realize communication. Under the resource constraint of the singlechip, the operation capability of a Central Processing Unit (CPU) of the singlechip is wasted on IO processing; meanwhile, hardware cost is additionally increased, a single-task model of the single-chip microcomputer severely restricts data transmission efficiency and the processing capacity of a Central Processing Unit (CPU) of the single-chip microcomputer, a polling model of the single-chip microcomputer easily causes data stability or data loss, in addition, common DTU modules in the market generally do not have the functions of GPS and Beidou positioning, and when the system is actually used, the position of equipment is acquired by using a base station positioning mode, so that the system is complex to operate and inaccurate in positioning, and the IO and data processing capacity of the common single-chip microcomputer is low; the available data channel of the DTU module is limited, and a user can only use the limited data channel for communication. Multiple modes of operation cannot exist simultaneously.
Disclosure of Invention
In order to solve the problems, the invention provides an improved DTU system and a method, which effectively overcome the defects that in the prior art, the operation capacity is wasted on IO processing, the hardware cost is additionally increased, the data transmission efficiency and the processing capacity of a Central Processing Unit (CPU) of a single chip microcomputer are restricted, the stability of data or data loss is easily caused, the operation is complex, the positioning is inaccurate, the IO and data processing capacity of the single chip microcomputer is low, the available data channel of a DTU module is limited, and a plurality of working modes cannot exist simultaneously.
In order to overcome the defects in the prior art, the invention provides a solution of an improved DTU system and a method, which comprises the following steps:
an improved DTU system comprises a processor, a power management module, a starting self-starting module and a hardware watchdog module;
the processor is connected with the power management module, the starting self-starting module and the hardware watchdog module.
The processor can include a baseband modem that functions as an application processor.
The Baseband modem used as an application processor can be an EC20 module, the EC20 module internally including a power management integrated circuit PMIC connected to a 19.2M crystal oscillator XO, a Baseband circuit Baseband, a radio Transceiver, a power amplification module PAM, a low noise amplifier L NA and a radio frequency Switch, the power management integrated circuit PMIC also connected to a flash memory NAND and a dynamic random access memory DDR2 SDRAM;
radio Transceiver driver is connected with power amplifier PA, duplexer Duplex, power amplification module PAM, low noise amplifier L NA and SAW filter, the power amplifier PA is connected with duplexer Duplex and power amplification module PAM, duplexer Duplex also is connected with power amplification module PAM, low noise amplifier L NA is connected with SAW filter two, SAW filter also is connected with radio frequency Switch.
A method for retrofitting a DTU system, comprising: when a data port, namely a data communication event occurs in an I/O system of an operating system, a software functional module enters a processing operation flow, and the processing operation flow comprises that data after the data processing is finished is submitted to the operating system in a filter chain and the operating system is responsible for sending the data out; the data processing process is to complete corresponding data processing by circulating data from the head to the tail once through the filter chain.
The invention has the beneficial effects that:
according to the improved DTU system, the SIM card can be automatically detected and the network can be automatically connected after the improved DTU system is powered on. If the network is abnormal, the abnormal state of the network can be immediately detected and the network is reconnected, and data can be transmitted in a bidirectional and transparent mode through the serial port and the network. In addition, the system also has a GNSS positioning function, so that the improved DTU system can accurately position. The key point of the improved DTU system is that the IO throughput capacity can be effectively improved by adopting an asynchronous IO communication model, and the GNSS positioning function is used and has the positioning capacity of a GPS and a Beidou. In addition, the improved DTU system can open any number of data channels by setting, effectively improves the communication capacity of data, and has the function of parallel processing in multiple working modes, including a TCP mode, a UDP mode, an HTTP mode and a short message mode.
Drawings
FIG. 1 is an internal block diagram of the EC20 module of the present invention.
FIG. 2 is a schematic diagram of the power management module of the present invention.
Fig. 3 is a schematic diagram of a first boot circuit of the present invention.
Fig. 4 is a schematic diagram of a second boot circuit of the present invention.
Fig. 5 is a schematic diagram of the counter circuit of the present invention.
Fig. 6 is a schematic diagram of the watchdog circuit of the present invention.
Fig. 7 is a schematic diagram of the level matching circuit of the present invention.
Fig. 8 is a schematic diagram of a 485 communication circuit of the present invention.
Fig. 9 is a schematic diagram of the 232 communication circuit of the present invention.
Fig. 10 is a schematic diagram of a SIM card protection circuit of the present invention.
Figure 11 is a schematic diagram of the SIM circuit of the present invention.
Fig. 12 is a schematic diagram of a communication indicating circuit of the present invention.
FIG. 13 is a schematic diagram of the Reload circuit of the present invention.
Fig. 14 is a schematic diagram of the Update circuit of the present invention.
FIG. 15 is a schematic diagram of the EC20 module of the present invention.
Fig. 16 is a schematic diagram of an L TE antenna of the present invention.
Fig. 17 is a schematic diagram of a GPS antenna of the present invention.
Detailed Description
The invention will be further described with reference to the following figures and examples.
As shown in fig. 1-17, the improved DTU system includes a processor, a power management module, a power-on self-starting module, and a hardware watchdog module; the processor is connected with the power management module, the starting self-starting module and the hardware watchdog module. The processor can include a baseband modem that functions as an application processor. The baseband modem serving as an application processor can be an EC20 module, whichThe EC20 module adopts a Baseband processor platform with an ARMCortexA7 kernel, the main frequency can reach 1.2GHz, the scheme supports network systems such as L TE-FDD/L TE-TDD/WCDMA/TD-SCDMA/CDMA/GSM with a diversity reception function, and is a full-network communication scheme, the SOC scheme applied by the EC20 module adopts a serial port to receive and transmit wireless network data without intervention of a user, the equipment is automatically completed, the equipment is on-line, data forwarding, automatic disconnection reconnection and other mechanisms, the hardware structure is simplified, the product cost is reduced, the actual size of a terminal product is reduced, and the like, the EC20 module can also serve as a 4G L TE module, the EC20 module internally comprises a power management integrated circuit PMIC, the power management integrated circuit is connected with a 19.2M crystal oscillator XO, a Baseband circuit Baseband, a radio Transceiver Transceiver, a power amplification module PAM, a low-noise amplifier 92 and a Switch power supply PMIC, the power supply management integrated circuit PMIC is connected with a first diode power amplifier, a power amplifier module, a power amplifier, a duplexer, a power amplifier module, a duplexer, a power amplifier, a duplexer, a power amplifier, a duplexer, a power amplifier, a duplexer, a power amplifier, a duplexer, a power amplifier, a duplexer, a capacitor, a diode, a capacitor, aThe power supply comprises a resistor R, a resistor R, a resistor R, a resistorThe power supply of the EC20 module can be carried out through the PWRKEY pin of the EC20 module when the VCC end is powered on through the RC circuit formed by the resistors and the capacitors in the first starting-up circuit, and the power supply of the EC20 module is carried out through the PWRKEY pin of the EC20 module when the VCC end is powered off. The second starting-up circuit comprises one end of a seventh common capacitor C46, one end of a thirteenth resistor R59 and a Vin pin of the SGM2019-3.3V chip which are connected with the VBAT end, the other end of the thirteenth resistor R59 is connected with an EN pin of the SGM2019-3.3V chip, a GND pin of the SGM2019-3.3V chip is grounded, a Vout pin of the SGM2019-3.3V chip is used as a VCC _3V3 end to be connected with one end of an eighth common capacitor C47, and the other end of the eighth common capacitor C47 is grounded. In addition, the user system which is currently matched with the improved DTU system is usually a 3.3V level system, so that a data serial port inside the improved DTU system is finally converted into a 3.3V serial port required by a user through a special level conversion circuit chip, namely an SGM2019-3.3V chip through a VCC-3V 3 end, thereby being convenient to access into the user system and having a serial port hardware flow control function. The hardware watchdog module comprises a counter circuit and a watchdog circuit; the watchdog circuit comprises one end of a fourteenth resistor connected with a GPIO1 pin of the EC20 module, the other end of the fourteenth resistor, one end of a fifteenth resistor and a base of a second triode Q1, an emitter of the second triode Q1 is grounded with the other end of the fifteenth resistor, a collector of the second triode Q1 and one end of a sixteenth resistor R9 are connected with one end of a ninth common capacitor C17, the other end of the ninth common capacitor C17, one end of a seventeenth resistor R10 and a PFI pin of a MIC706T chip, the other ends of a seventeenth resistor R10 and a sixteenth resistor R9 are connected with a VCC end, the VCC pin and the VCC end of the MIC706T chip are connected with one end of a tenth common capacitor C16, the GND pin of the MIC706T chip and the other end of the tenth common capacitor C16 are grounded, and the MIC 6342 chip of the MIC706T is connected with a VCC 16
Figure BDA0001953458240000071
Of pins with the MIC706T chip
Figure BDA0001953458240000072
Pin connections, of the MIC706T chip
Figure BDA0001953458240000073
A pin is connected with one end of an eighteenth resistor, a WDI pin of the MIC706T chip is connected with one end of a nineteenth resistor R8, the other end of the nineteenth resistor R8 is grounded, and the MIC706T chip is connected with one end of a resistor
Figure BDA0001953458240000074
The pin is connected with one end of a twentieth resistor R22; the counter circuit comprises the eighteenth resistor and a twentieth resistor R22, the other end of the eighteenth resistor, the base of a third triode Q2 and one end of a twenty-first resistor are connected, the emitter of the third triode Q2 and the other end of the twenty-first resistor are grounded, the collector of the third triode Q2, one end of a twenty-second resistor R17 and the INPUT pin of a CD4024B chip are connected, the other end of the twenty-second resistor R17 is connected with the VCC end, the GND pin of the CD4024B chip is grounded, the RESET pin of the CD4024B chip, the emitter of a fourth diode Q3, one end of a twenty-third resistor R14 and the COM pin of an SGM3157 switch chip are connected, the other end of the twenty-third resistor R14 is grounded, the base of the fourth diode Q3 is connected with the other end of a twentieth resistor R22, the collector of the fourth diode Q3 is connected with one end of a twenty-fourth resistor R24, the other end and the VCC end of twenty-fourth resistance R24 are connected, the collecting electrode of third triode Q2 is connected with one end of twenty-fifth resistance R12, the other end of twenty-fifth resistance R12 is connected with the NO pin of SGM3157 switch chip, the GND pin of SGM3157 switch chip is grounded, the IN pin of SGM3157 switch chip is connected with one end of twenty-sixth resistance R11, the V + pin of SGM3157 switch chip, the VCC end and one end of eleventh ordinary electric capacity C18 are connected, the other end of eleventh ordinary electric capacity C18 is grounded, the other end of twenty-sixth resistance R11, the other end of VCC end,The other ends of the twenty-seventh resistor R and the twenty-eighth resistor R are connected with the Q pin of the CD4024 chip and the Q pin of the CD4024 chip respectively, the VDD pin and the VCC pin of the CD4024 chip are connected with one end of a twelfth common capacitor C, the other end of the twelfth common capacitor C is grounded, the other ends of the twenty-ninth resistor R and the thirtieth resistor R are connected with the base of a fifth triode Q, the emitter of the fifth triode Q and the other end of the thirtieth resistor Q are grounded, the collector of the fifth triode Q, one end of a thirty-first resistor R and one end of a thirteenth common capacitor C are connected with one end of a thirteenth common capacitor C, the other end of the thirteenth common capacitor C is grounded, the other end of the thirty-first resistor R is connected with the RESET _ N pin of the EC module, a dedicated hardware watchdog module is designed to ensure the stability and reliability of the operation of the improved DTU system, because the processor of the improved DTU system operates under normal conditions that the TXNOT-IN system is connected with the TXET-TX-to the TXET-C-to the TX-C-TX-switch, the system-TXThe GND pin of the TXB0108 level shifter is grounded, the VCCB pin and the VCC terminal of the TXB0108 level shifter are connected to one end of a twentieth common capacitor C24, and the other end of the twentieth common capacitor C24 is grounded; the 485 communication circuit comprises one end of a thirty-second resistor R38 connected with a B7 pin of the TXB0108 level converter, the other end of the thirty-second resistor R38,
The USB host computer comprises a USB host computer, a USB host computer, a USB host computer, a USB host computer, a USB host, a USB host computer, a USB host computer, a USB host computer, a USB host computer, a USB host, a USB host computer, a USB host, a USB host, a USB host computer, a USB host, a USB host, a USB host, a USB host computer, a USB host computer, a USB host, a USB host, a USB host computer, a USB host, a USB host computer, a USB host, a USB host computer, a USB host, a USB host, a USB host, a USB, a USB host, a USB, a USB host, a USB, a USB host, a USB, a USB.
The method of the improved DTU system comprises the following steps: when a data port, namely a data communication event occurs in an I/O system of an operating system, a software functional module enters a processing operation flow, and the processing operation flow comprises that data after the data processing is finished is submitted to the operating system in a filter chain and the operating system is responsible for sending the data out; the data processing process is to complete corresponding data processing by circulating data from the head to the tail once through the filter chain.
The improved DTU system effectively improves the data throughput capacity in the using process, and effectively solves and improves the problem and capacity of platform access of complex network application; user equipment positioning is facilitated.
The present invention has been shown and described in detail with reference to the embodiments, and it will be understood by those skilled in the art that the present disclosure is not limited to the embodiments shown above, and various changes, modifications and substitutions may be made without departing from the scope of the present invention.

Claims (10)

1. An improved DTU system is characterized by comprising a processor, a power management module, a starting self-starting module and a hardware watchdog module;
the processor is connected with the power management module, the starting self-starting module and the hardware watchdog module.
The processor can include a baseband modem that functions as an application processor.
2. The improved DTU system of claim 1, wherein the Baseband modem used as the application processor may be an EC20 module, and the EC20 module includes a power management integrated circuit PMIC inside, which is connected to a 19.2M crystal oscillator XO, a Baseband circuit Baseband, a radio Transceiver, a power amplification module PAM, a low noise amplifier L NA, and a radio frequency Switch, which is also connected to a flash memory NAND and a dynamic random access memory DDR2 SDRAM.
3. The improved DTU system of claim 2, wherein the Transceiver driver is connected to a power amplifier PA, a duplexer Duplex, a power amplification module PAM, a low noise amplifier L NA, and a first SAW filter, the power amplifier PA is connected to the duplexer Duplex and the power amplification module PAM, the duplexer Duplex is also connected to the power amplification module PAM, a low noise amplifier L NA is connected to a second SAW filter, and the first SAW filter is also connected to the rf Switch.
4. The improved DTU system according to claim 1, wherein the power management module can include a DC-DC power management chip for high current small volume 3A output, the DC-DC power management chip for high current small volume 3A output can be a SY8303 chip, the power management module can further include a DC-DC converter, a ground terminal of the DC-DC converter is grounded, an output terminal of the DC-DC converter is connected to an anode of a first diode D2, a cathode of the first diode D2, one terminal of a first bi-directional zener diode D3, an anode of a first polarity capacitor C7, one terminal of a first common capacitor C7, one terminal of a second common capacitor C7, one terminal of the first resistor R7 and an IN pin of the SY8303 chip are connected, the other terminal of the first bi-directional zener diode D7, the other terminal of the first common capacitor C7 and the other terminal of the second common capacitor C7 are connected to the ground, the cathode of the first diode D7, the first common capacitor C7, the anode of the first diode D368372 is connected to the anode of the second common capacitor C7, the anode of the second common capacitor C7, the second common capacitor C7 is connected to the anode of the second common capacitor C7, the second common capacitor C7 is connected to the anode of the second common capacitor C7 to the second common capacitor C7, the anode of the second common capacitor C7, the second common capacitor C7 is connected to the second common capacitor C7 to the anode of the second common capacitor C7 to the second common capacitor C7, the second common capacitor C7 to the n terminal of the second common capacitor C7, the second common capacitor C7 is connected to the anode of the second common capacitor C7, the second common capacitor C7 to the second common capacitor C7, the second common capacitor C7 and the second common capacitor C7 to the anode of the second common capacitor C7 to the second common capacitor.
5. The improved DTU system of claim 1, wherein the power-on self-start module comprises a first power-on circuit and a second power-on circuit, the first power-on circuit comprises one end of a fifth resistor R53 and one end of a sixth common capacitor C40 which are both connected to VCC end, the other end of the sixth common capacitor C40 is connected to one end of a sixth resistor R54, the other end of the sixth resistor R54 and one end of a seventh resistor are connected to one end of an eighth resistor R55, the other end of the fifth resistor R53 and the other end of the eighth resistor R55 are connected to ground, the other end of the seventh resistor and one end of a ninth resistor are connected to the base of the first transistor Q11, the other end of the ninth resistor is connected to ground to the emitter of the first transistor Q11, the collector of the first transistor Q11 and one end of a tenth resistor R56 are connected to the PWRKEY pin of the EC20 module, and the other end of the tenth resistor R56 is connected to the PWRKEY pin, One end of an eleventh resistor R61 is connected with one end of a twelfth resistor R60, the other end of the eleventh resistor R61 is grounded, and the other end of the twelfth resistor R60 is connected with a VCC end;
the second starting-up circuit comprises one end of a seventh common capacitor C46, one end of a thirteenth resistor R59 and a Vin pin of the SGM2019-3.3V chip which are connected with the VBAT end, the other end of the thirteenth resistor R59 is connected with an EN pin of the SGM2019-3.3V chip, a GND pin of the SGM2019-3.3V chip is grounded, a Vout pin of the SGM2019-3.3V chip is used as a VCC _3V3 end to be connected with one end of an eighth common capacitor C47, and the other end of the eighth common capacitor C47 is grounded.
6. The improved DTU system of claim 1, wherein the hardware watchdog module comprises a counter circuit and a watchdog circuit;
the watchdog circuit comprises one end of a fourteenth resistor connected with a GPIO1 pin of the EC20 module, the other end of the fourteenth resistor, one end of a fifteenth resistor and a base of a second triode Q1, an emitter of the second triode Q1 is grounded with the other end of the fifteenth resistor, a collector of the second triode Q1 and one end of a sixteenth resistor R9 are connected with one end of a ninth common capacitor C17, the other end of the ninth common capacitor C17, one end of a seventeenth resistor R10 and a PFI pin of a MIC706T chip, the other ends of a seventeenth resistor R10 and a sixteenth resistor R9 are connected with a VCC end, the VCC pin and the VCC end of the MIC706T chip are connected with one end of a tenth common capacitor C16, the GND pin of the MIC706T chip and the other end of the tenth common capacitor C16 are grounded, and the MIC 6342 chip of the MIC706T is connected with a VCC 16
Figure FDA0001953458230000031
Of pins with the MIC706T chip
Figure FDA0001953458230000032
Pin connections, of the MIC706T chip
Figure FDA0001953458230000033
A pin is connected with one end of an eighteenth resistor, a WDI pin of the MIC706T chip is connected with one end of a nineteenth resistor R8, the other end of the nineteenth resistor R8 is grounded, and the MIC706T chip is connected with one end of a resistor
Figure FDA0001953458230000041
The pin is connected with one end of a twentieth resistor R22;
the counter circuit comprises the eighteenth resistor and a twentieth resistor R22, the other end of the eighteenth resistor, the base of a third triode Q2 and one end of a twenty-first resistor are connected, the emitter of the third triode Q2 and the other end of the twenty-first resistor are grounded, the collector of the third triode Q2, one end of a twenty-second resistor R17 and the INPUT pin of a CD4024B chip are connected, the other end of the twenty-second resistor R17 is connected with the VCC end, the GND pin of the CD4024B chip is grounded, the RESET pin of the CD4024B chip, the emitter of a fourth diode Q3, one end of a twenty-third resistor R14 and the COM pin of an SGM3157 switch chip are connected, the other end of the twenty-third resistor R14 is grounded, the base of the fourth diode Q3 is connected with the other end of a twentieth resistor R22, the collector of the fourth diode Q3 is connected with one end of a twenty-fourth resistor R24, the other end of the twenty-fourth resistor R24 is connected to a VCC terminal, the collector of the third triode Q2 is connected to one end of a twenty-fifth resistor R12, the other end of the twenty-fifth resistor R12 is connected to an NO pin of an SGM3157 switch chip, a GND pin of the SGM3157 switch chip is grounded, an IN pin of the SGM3157 switch chip is connected to one end of a twenty-sixth resistor R11, a V + pin, a VCC terminal of the SGM3157 switch chip and one end of an eleventh common capacitor C18 are connected, the other end of the eleventh common capacitor C18 is grounded, the other end of the twenty-sixth resistor R11, one end of the twenty-seventh resistor R19, one end of the twenty-eighth resistor R20 and one end of the twenty-ninth resistor R18 are connected, the other end of the twenty-seventh resistor R19 and the other end of the twenty-eighth resistor R20 are connected to a Q6 pin of the CD4024, a CD 40237 pin of the CD4024 chip B chip and a Q7 of the CD 40234 chip, and the VDD pin of the CD 39, The VCC end is connected with one end of a twelfth common capacitor C19, the other end of the twelfth common capacitor C19 is grounded, the other ends of the twenty-ninth resistor and the thirtieth resistor are connected with the base of a fifth triode Q4, the emitter of the fifth triode Q4 and the other end of the thirtieth resistor are grounded, the collector of the fifth triode Q4, one end of a thirty-first resistor R23 and one end of a thirteenth common capacitor C26 are connected, the other end of the thirteenth common capacitor C26 is grounded, and the other end of the thirty-first resistor R23 is connected with a RESET _ N pin of the EC20 module.
7. The improved DTU system of claim 1, wherein the improved DTU system further comprises a level matching circuit, a 485 communication circuit, and a 232 communication circuit;
the level matching circuit comprises a TXB0108 level shifter, a pin A3 of the TXB0108 level shifter is connected with a pin GPIO2 of the EC20 module, a pin A5 of the TXB0108 level shifter is connected with a pin MAIN _ RXD of the EC20 module, a pin A6 of the TXB0108 level shifter is connected with a pin MAIN _ TXD of the EC20 module, a pin A7 of the TXB0108 level shifter is connected with a pin MAIN _ RTS of the EC20 module, a pin A8 of the TXB0108 level shifter is connected with a pin MAIN _ CTS of the EC20 module, a pin VCCA of the TXB0108 level shifter is connected with one end of a nineteenth common capacitor C25, the other end of the nineteenth common capacitor C25 is grounded, one end of the OE pin of the TXB 0100108 level shifter, one end of a forty-fourth resistor R26 is connected with one end of a forty-R25, the other end of the EC 58R 26 is connected with one end of the fourth resistor EXT 2 of the EC 58R 20, and the EXT 2 is connected, the GND pin of the TXB0108 level shifter is grounded, the VCCB pin and the VCC end of the TXB0108 level shifter are connected with one end of a twentieth common capacitor C24, and the other end of the twentieth common capacitor C24 is grounded;
the 485 communication circuit comprises one end of a thirty-second resistor R38 connected with a B7 pin of the TXB0108 level shifter, the other end of the thirty-second resistor R38, one end of a thirty-third resistor R41, a DE pin of a MAX3485 chip and a DE pin of the MAX3485 chip
Figure FDA0001953458230000051
The other end of the thirty-third resistor R41 is connected with a VCC end, the RO pin of the MAX3485 chip is connected with the B5 pin of the TXB0108 level converter, the DI pin of the MAX3485 chip is connected with the B6 pin of the TXB0108 level converter, the VCC pin of the MAX3485 chip, one end of a fourteenth common capacitor C30 and a VCC end are connected, the other end of the fourteenth common capacitor C30 is grounded, the B pin of the MAX3485 chip, one end of a thirty-fourth resistor R27 and one end of a thirty-fifth resistor R36 are connected, the other end of the thirty-fourth resistor R27 is grounded, the other end of the thirty-fifth resistor R36, one end of a second bidirectional voltage stabilizing diode D10, one end of a third bidirectional voltage stabilizing diode D8 and the B pin of an RS serial port are connected, the A pin of the MAX 85 chip, one end of the thirty-sixth resistor R37 and one end of the thirty-seventh resistor R39 are connected, and the other end of the thirty-fourth resistor R39 is grounded, the other end of the thirty-sixth resistor R37, the other end of the second bidirectional voltage stabilizing diode D10 and one end of the fourth bidirectional voltage stabilizing diode D15 are connected with a pin A of an RS485 serial port, and the other end of the third bidirectional voltage stabilizing diode D8 and the other end of the fourth bidirectional voltage stabilizing diode D15 are grounded;
the 232 communication circuit comprises one end of a thirty-eighth resistor R29 connected with a pin B6 of the TXB0108 level shifter, the other end of the thirty-eighth resistor R29 is connected with a pin T2IN of a MAX3232 chip, a pin R2OUT of the MAX3232 chip is connected with a pin B5 of the TXB0108 level shifter, a pin V-of the MAX3232 chip is connected with one end of a fifteenth ordinary capacitor C31, the other end of the fifteenth ordinary capacitor C31 is grounded with a pin GND of the MAX3232 chip, a pin C1+ of the MAX3232 chip is connected with one end of a sixteenth ordinary capacitor C28, the other end of the sixteenth ordinary capacitor C28 is connected with a pin C1-of the MAX32 chip, a pin V + of the MAX3232 chip is connected with one end of a seventeenth ordinary capacitor C27, the other end and a terminal C3 and a terminal VCC of the MAX3232 chip are connected with a pin C2, the other end of the eighteenth common capacitor C29 is connected with a C2-pin of the MAX3232 chip, a T1OUT pin of the MAX3232 chip is connected with one end of a thirty-ninth resistor R32, the other end of the thirty-ninth resistor R32 is connected with an 8-pin of an RS232 serial port, a R1IN pin of the MAX3232 chip is connected with one end of a forty-resistor R28, the other end of the forty-fourth resistor R28 is connected with a 7-pin of an RS232 serial port, a T2OUT pin of the MAX3232 chip is connected with one end of a forty-first resistor R30, the other end of the forty-first resistor R30, one end of a fifth bidirectional zener diode D7 and a 2-pin of the RS232 serial port are connected, the other end of the fifth bidirectional zener diode D7 is grounded, a R2IN pin of the MAX3232 chip is connected with one end of a forty-second resistor R31, the other end of the forty-second resistor R31, one end of the sixth zener diode D9 and the RS232 serial port are connected, the other end of the sixth zener diode D9 is grounded.
8. The retrofit DTU system of claim 1, wherein the retrofit DTU system further comprises a SIM card protection circuit and a SIM circuit;
the SIM card protection circuit includes L ESDA6V8AW5T1G chip, pin 1 of the L ESDA6V8AW5T1G, one end of twenty-first capacitor C G, SIM _ C G K pin of the SIMCARD chip and one end of forty-fifth resistor R G are connected, the other end of the forty-fifth resistor R G is connected to USIM _ C G K pin of the EC G module, the other end of the twenty-first capacitor C G is grounded, pin 2 of the G ESDA6V8AW5T1G is grounded, pin 3 of the escda 6V 8V 5T1G, one end of the twenty-second capacitor C G, one end of the SIM _ DAT pin of the SIMCARD chip and one end of forty-sixth resistor R G are connected, the other end of the forty-sixth resistor R G is connected to USIM _ EC G pin of the USIM G module, the other end of the twenty-second capacitor C G is grounded, the SIM _ DAT pin of the SIMCARD chip and one end of the forty-sixth resistor R G is connected to ground, the third terminal of the fourth capacitor C G, the fourth capacitor C G is connected to ground, the third terminal of the escda 6 awda 6V _ C G, the third capacitor C G is connected to ground, the third pin of the third capacitor C G, the fourth capacitor C G is connected to ground, the third pin of the escad G, the third capacitor C G is connected to ground, the third capacitor C G is connected to ground;
the SIM circuit comprises a SIMCARD chip, a GND pin of the SIMCARD chip is grounded, one NC pin of the SIMCARD chip is connected with one end of a forty-eight resistor R21, and the other end of the forty-eight resistor R21 is grounded;
the improved DTU system also comprises a communication indicating circuit and a reloading circuit;
the communication indicating circuit comprises a forty-ninth resistor, one end of the forty-ninth resistor is connected with an ANT _ MAIN pin of the EC20 module, the other end of the forty-ninth resistor and one end of a fifty-fifth resistor are connected with a base electrode of a sixth triode Q6, the other end of the fifty-fifth resistor and an emitter electrode of a sixth triode Q6 are both grounded, a collector electrode of the sixth triode Q6 is connected with one end of a fifty-first resistor R43, the other end of the fifty-first resistor R43 is connected with a negative electrode of a first light emitting diode D11, and an anode electrode of the first light emitting diode D11 is connected with a VCC end;
the communication indicating circuit further comprises a fifty-second resistor, one end of the fifty-second resistor is connected with a pin GPIO5 of the EC20 module, the other end of the fifty-second resistor and one end of the fifty-third resistor are connected with a base electrode of a seventh triode Q7, the other end of the fifty-third resistor and an emitter electrode of the seventh triode Q7 are both grounded, a collector electrode of the seventh triode Q7 is connected with one end of a fifty-fourth resistor R40, the other end of the fifty-fourth resistor R40 is connected with a negative electrode of a second light emitting diode D13, and an anode of the second light emitting diode D13 is connected with a VCC end;
the communication indicating circuit further comprises a fifty-fifth resistor, one end of the fifty-fifth resistor is connected with a pin GPIO3 of the EC20 module, the other end of the fifty-fifth resistor and one end of a fifty-sixth resistor are connected with a base electrode of an eighth triode Q8, the other end of the fifty-sixth resistor and an emitter electrode of an eighth triode Q8 are both grounded, a collector electrode of the eighth triode Q8 is connected with one end of a fifty-seventh resistor R42, the other end of the fifty-seventh resistor R42 is connected with a negative electrode of a third light emitting diode D12, and an anode of the third light emitting diode D12 is connected with a VCC end;
the communication indicating circuit further comprises a fifty-eighth resistor, one end of the fifty-eighth resistor is connected with a pin GPIO4 of the EC20 module, the other end of the fifty-eighth resistor and one end of the fifty-ninth resistor are connected with a base electrode of a ninth triode Q9, the other end of the fifty-ninth resistor and an emitter electrode of the ninth triode Q9 are both grounded, a collector electrode of the ninth triode Q9 is connected with one end of a sixty resistor R44, the other end of the sixty resistor R44 is connected with a negative electrode of a fourth light emitting diode D14, and an anode electrode of the fourth light emitting diode D14 is connected with a VCC end;
the communication indicating circuit further comprises one end of a sixty-first resistor R45 connected with the VCC end, the other end of the sixty-first resistor R45 is connected with the anode of a fifth light-emitting diode D16, and the cathode of the fifth light-emitting diode D16 is grounded;
the Reload circuit comprises a KEY switch KEY, one end of the KEY switch KEY, one end of a twenty-first common capacitor C32, one end of a sixty-second resistor R46 and one end of a sixty-third resistor R47 are connected, the other end of the KEY switch KEY is grounded with the other end of the twenty-first common capacitor C32, the other end of the sixty-second resistor R46 is connected with a VCC end, and the other end of the sixty-third resistor R47 is connected with a B3 pin of the TXB0108 level shifter;
the improved DTU system also comprises an Update circuit;
the Update circuit comprises a MicroUSB interface, a VBUS pin of the MicroUSB interface is connected with a USB _ VBUS pin of an EC20 module, a GND pin of the MicroUSB interface is grounded, a D-pin of the MicroUSB interface is connected with one end of a sixty-fourth resistor R7, the other end of the sixty-fourth resistor R7 is connected with a USB _ DM pin of an EC20 module, a D + pin of the MicroUSB interface is connected with one end of a sixty-fifth resistor R6, and the other end of the sixty-fifth resistor R6 is connected with a USB _ DP pin of the EC20 module;
an ANT _ MAIN pin of the EC20 module, one end of a twenty-second common capacitor C43 and one end of a sixty-sixth resistor R58 are connected, the other end of the sixty-sixth resistor R58, the tail end of a L TE antenna and one end of a twenty-third common capacitor C42 are connected, and the other end of the twenty-second common capacitor C43 and the other end of the twenty-third common capacitor C42 are both grounded;
an ANT _ GNSS pin of the EC20 module is connected to one end of a twenty-fourth common capacitor C44, the other end of the twenty-fourth common capacitor C44 and one end of a third inductor L4 are connected to the terminal of the GPS antenna, the other end of the third inductor L4 is connected to one end of a sixty-seventh resistor R57, the other end of the sixty-seventh resistor R57 and a VCC end are connected to one end of a twenty-fifth common capacitor C45, and the other end of the twenty-fifth common capacitor C45 is grounded;
the improved DTU system can be disposed within a hollow housing having a hanger and a guide rail disposed on an outer wall of the hollow housing.
9. The improved DTU system of claim 1, further comprising a software function module stored in a flash NAND or dynamic random access memory DDR2SDRAM, wherein the software function module is configured to serially connect a plurality of filters to form a filter chain, wherein the software function module is further configured to filter data, wherein the data is filtered once by one filter of the filter chain, and wherein the corresponding data processing is completed once the data is circulated from the head to the tail through the filter chain;
asynchronous communication of the software function module is driven in an event triggering mode, namely when a data communication event occurs in a data port, the software function module enters a processing operation flow, data is submitted to an operation system after data processing is finished in a filter chain, and the operation system is responsible for sending the data out;
the filter comprises a serial port filter, a TCP filter, a UDP filter, an HTTP request filter, an MQTT filter and a short message filter; each filter can be hung on a plurality of filter chains;
the serial port filter is positioned at the head of the filter chain, and the TCP filter, the UDP filter, the HTTP request filter, the MQTT filter or the short message filter are positioned at the tail of the filter chain; when the data is from head to tail, the data is encoded, and when the data is from tail to head, the data is decoded.
10. A method of the improved DTU system, comprising: when a data port, namely a data communication event occurs in an I/O system of an operating system, a software functional module enters a processing operation flow, and the processing operation flow comprises that data after the data processing is finished is submitted to the operating system in a filter chain and the operating system is responsible for sending the data out; the data processing process is to complete corresponding data processing by circulating data from the head to the tail once through the filter chain.
CN201910058818.1A 2019-01-22 2019-01-22 Improved DTU system and method Pending CN111464320A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113225866A (en) * 2021-04-15 2021-08-06 东莞华明灯具有限公司 DMX composite dimming circuit system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113225866A (en) * 2021-04-15 2021-08-06 东莞华明灯具有限公司 DMX composite dimming circuit system
CN113225866B (en) * 2021-04-15 2023-03-17 东莞华明灯具有限公司 DMX composite dimming circuit system

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