CN111462710A

CN111462710A - Refreshing multiple regions of a display device simultaneously using multiple different refresh rates

Info

Publication number: CN111462710A
Application number: CN202010422742.9A
Authority: CN
Inventors: 王超昊; 李思贤; P·萨凯托; 张世昌; 黄俊尧; P·S·德尔泽克
Original assignee: Szczez Co ltd
Current assignee: Szczez Co ltd; Apple Inc
Priority date: 2014-08-05
Filing date: 2015-07-15
Publication date: 2020-07-28
Anticipated expiration: 2035-07-15
Also published as: KR20170024106A; CN106663402B; EP3178083A4; EP3178083A1; CN106663402A; KR101965079B1; CN111462710B

Abstract

The present invention relates to refreshing multiple regions of a display device simultaneously using multiple different refresh rates. Specifically, a display method is provided, which includes: operating a first subset of the pixel array at a first refresh rate, the first subset comprising a first row of pixels of the pixel array; simultaneously operating a second subset of the pixel array at a second refresh rate, the second refresh rate being different from the first refresh rate, the second subset including a second row of pixels of the pixel array adjacent to the first row of pixels; and during the operation and the simultaneous operation, altering image data to be displayed at the first row and image data to be displayed at the second row based at least on one of the first refresh rate or the second refresh rate.

Description

Refreshing multiple regions of a display device simultaneously using multiple different refresh rates

This application is a divisional application of the invention patent application having application number 201580041805.3, application date 2015, 7/15, entitled "refreshing multiple regions of a display device simultaneously using multiple different refresh rates".

Technical Field

The described embodiments relate generally to modifying a refresh rate of a display device. More particularly, the present embodiments relate to methods and apparatus for refreshing multiple regions of a display device simultaneously at different rates.

Background

Recent advances in computing devices have allowed visually impressive graphics to be displayed on many lightweight and often portable computing devices. Graphics may be provided by a variety of systems including a graphics processor and a display monitor. Many graphics processors may interact with a display monitor to provide images and video that may be updated or refreshed without the display monitor user perceiving any interruptions. However, during extended periods of time, both data transmission and light emission from the display monitor require a significant amount of energy that is not typically available when implemented in portable computing devices. Typically, this energy is dedicated to the conversion between the color and brightness levels of the display, and thus designing a display that does not provide the optimal conversion may degrade the user experience of the computing device. As a result, manufacturers must often choose between providing a more impressive visual display or conserving energy in order to provide a longer battery life for the computing device.

Many computing devices are used primarily for internet browsing, which may often require the display of various graphics. For example, some web pages are dedicated to streaming video and, therefore, may require a significant amount of effort from the graphics processor of the computing device. To provide a smooth video stream, the display monitor should be refreshed at a rate that allows the video to be presented smoothly on the display monitor. However, because typically the entire area of the display monitor is refreshed regardless of the size of the video being displayed, maintaining a high refresh rate may be inefficient with respect to energy consumption. Thus, even if a user of a computing device streams small videos on a large display monitor, the refresh rate will be dynamic relative to the video size. Because the hardware of many computing devices is not designed to adjust the refresh rate according to the application being executed, users are typically left with devices that cannot maintain a charge during frequent media playback periods. Thus, users are generally discouraged from displaying media streams until they can plug their computing device into a charging port, or until they know that they will not require battery life for other applications at a particular point in the day. Furthermore, while many processes of an application occur on a cloud server rather than a computing device, an idle screen displaying animations of various applications can also consume energy in a wasteful manner. In this way, in some cases, the application may consume more energy for aesthetic purposes only, rather than the primary purpose of the application.

Disclosure of Invention

A display device may include a pixel array, a gate driver operatively coupled to the pixel array, and a data driver operatively coupled to the pixel array.

In other embodiments, methods are listed for refreshing multiple regions of a display device simultaneously at different refresh rates. The method may include generating a first data frame and a second data frame, and comparing a plurality of rows of the first data frame to a plurality of rows of the second data frame. The method may also include determining a modified row of the second data frame, where the modified row is a different data row in the second data frame than a corresponding data row in the first data frame. Further, the method may comprise: a first portion of the display device corresponding to the modified row of the second data frame is caused to refresh at a first refresh rate, and a second portion of the display device adjacent to the first portion of the display device is caused to refresh at a second refresh rate.

In yet other embodiments, a machine-readable non-transitory storage medium is listed. The storage medium may store instructions that, when executed by a processor included in a computing device, cause the computing device to perform steps comprising: a first data frame and a second data frame corresponding to image data to be displayed on a display device are received. This step may also include comparing the first set of rows of the first data frame with the second set of rows and the third set of rows in the second data frame. Further, the step may include determining that a first subset of rows of the first set of rows is not the same as a first subset of rows of the second set of rows, and determining that a second subset of rows of the first set of rows is the same as a second subset of rows of the third set of rows. Further, the step may include: causing a first set of driver circuits corresponding to the second set of rows to transition to a high state and causing a second set of driver circuits corresponding to the third set of rows to transition to a low state.

Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the embodiments.

Drawings

The present disclosure will be readily understood by the following detailed description in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements.

FIG. 1 illustrates a computing device having a display including multiple regions, where the displayed graphics are static or dynamic.

Fig. 2 illustrates a system diagram for controlling a display device according to some embodiments discussed herein.

Fig. 3 shows a diagram of a display device with an array of light emitting diodes (L ED) connected to a gate driver and a data driver.

Fig. 4A to 4B show a gate driver circuit having a unit circuit and an output selector circuit.

Fig. 5 shows a diagram listing how multiple rows and regions of an ED array may be refreshed L at different rates based on the operation of the gate driver circuit.

Fig. 6A-6B illustrate problems and solutions associated with providing multiple refresh rates to L ED arrays.

FIG. 7 shows a diagram for performing multi-bank and multi-parameter gamma distributions in order to mitigate flicker and ripple issues at refresh boundaries.

FIG. 8 illustrates a method for modifying the refresh rate of a row or group of rows based on differences between frames provided to an L ED array.

FIG. 9 illustrates a method for adjusting L the refresh rate of one or more rows of the ED array based on the flicker content of one or more frames or images to be displayed by the L ED array.

FIG. 10 illustrates a method for refreshing L one or more rows of an ED array based on the amount of time that one or more rows have remained static or unchanged.

FIG. 11 is a block diagram of a computing device that may represent components of various embodiments discussed herein.

Detailed Description

This section describes representative applications of the methods and apparatus according to the present patent application. These examples are provided solely to add context and aid in the understanding of the described embodiments. It will thus be apparent to one skilled in the art that the embodiments may be practiced without some or all of these specific details. In other instances, well known process steps have not been described in detail in order to avoid unnecessarily obscuring the embodiments. Other applications are possible, such that the following examples should not be considered limiting.

In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in accordance with the embodiments. Although these embodiments are described in sufficient detail to enable those skilled in the art to practice the embodiments, it is to be understood that these examples are not limiting, such that other embodiments may be utilized and that modifications may be made without departing from the spirit and scope of the embodiments.

According to embodiments discussed herein, a lower refresh rate may be assigned to a portion of the display that is displaying a static image and a dynamic image, and a normal refresh rate may be assigned to a portion of the display that is displaying a dynamic image, the difference in these refresh rates may be implemented in part by an output selector circuit that may prevent updating one or more rows of the display, in particular, the display may include an ED 35 array having a plurality of rows, and each row may be connected to a gate driver that may be prevented from allowing the respective row based on the action of the output selector circuit, the data driver may provide updated frame data to an L array, and if the updated frame data is the same for two or more times, then the gate driver may be prevented from allowing the refresh of the respective row based on the action of the output selector circuit from providing the refresh output of the ED 35 array, and if the updated frame data is not equal to the EDed 2 array, the refresh rate may be adjusted by the EDED 2 array, or the EDS 2, or EDS may be adjusted to adjust the refresh rate of the ED 2, or EDS, such that the refresh rate may be adjusted when the EDS is adjusted, the EDS 2, the EDS may be adjusted, such that the EDS may be adjusted accordingly, the refresh rate may be adjusted accordingly adjusted, or adjusted, such that the display may be adjusted, or adjusted, and the display may be adjusted, such that the display may be adjusted accordingly, or adjusted, such that the display may be adjusted accordingly, when the display may be adjusted, or adjusted, such that the display may be adjusted, or adjusted, may be adjusted, such that the display may be adjusted, or adjusted, such that the display may be adjusted, or adjusted, such that the display may be adjusted, or adjusted, may be adjusted, such that the display may be adjusted, or adjusted, may be.

When multiple refresh rates are used simultaneously on a display device, the ripple may be visible by a user of the computing device to which the display device is attached. The ripple may be caused by the boundary between two adjacent portions of the display that operate at different refresh rates. To mitigate and prevent the occurrence of ripple, compensation methods are discussed herein. In one embodiment, a digital compensation method is used. The digital compensation method allows at least 2-bit spatial dithering to be performed on the data presented at the display boundary in question. In another embodiment, an interpolation process is used that interpolates at least two gamma curves based on the refresh rate of the line or lines in question. The interpolation results are output to the line or lines in question to adjust the gamma of the image to be displayed at the line or lines for making any ripple effect imperceptible.

These and other embodiments are discussed below with reference to fig. 1-11; however, those skilled in the art will readily appreciate that the detailed description given herein with respect to these figures is for explanatory purposes only and should not be construed as limiting.

FIG. 1 illustrates a computing device 100 having a display 102 that includes multiple regions, where the displayed graphics are static or dynamic. In particular, the display 102 of the computing device 100 includes a header row 104 and a dynamic icon row 106 that are continuously updated according to a cycle or period programmed within the computing device 100. The display 102 also includes a static area 108 that is not constantly updated but remains static until input is received from a user, a network connection, or other suitable input source of the computing device 100. The header line 104 may include indicators of wireless signal strength, clock time, and battery life, which may typically change at any given time. For this purpose, the header line 104 must display different values and adjust according to the dynamic changes that occur. The dynamic icon row 106 may also be modified according to the updates that occur at the dynamic icon 110. The dynamic icon 110 may display current date and clock time that is constantly changing and updated. In this way, the dynamic icon 110 should be refreshed more frequently than the static area 108 to reduce energy consumption, as discussed further herein. For example, during operation of an application on computing device 100, a display manager stored in computing device 100 may determine whether one or more lines currently presented on display 102 include dynamic data. Following this and as discussed further herein, the display manager may assign a higher refresh rate for rows that include dynamic data than rows that do not include dynamic data.

FIG. 2 shows a system diagram 200 for controlling a display device 210 according to some embodiments discussed herein, in particular, FIG. 2 shows how a computing device 202 disclosed herein interacts with a display device 210 to simultaneously assign different refresh rates to various regions of the display device 210, thereby conserving battery life of the computing device 202. the computing device 202 may include a memory 204 storing a display manager 206 for transmitting display data between a processor 208 and the display device 210. the display device 210 may include a data driver 216 for providing display data to an array of light emitting diodes (L ED) 214. the L ED array 214 may include L0 ED. of any suitable type for display at the display device 210, e.g., L ED array 214 may be an organic light emitting diode array 214. the gate driver 212 may be responsible for providing power to individual L ED 2 of the display device 210 and scanning 633 ED arrays 214 and rows and/or columns of display devices 214 according to the refresh rate provided from the display manager 206 and may be configured to control multiple pixel drivers, such as a pixel driver 210, a pixel driver 212, a pixel driver adapted to control a display device 210, and/or a display device comprising a display device capable of controlling light source, a display device 210, such as a display device 210, a display device comprising a plurality of light source, a display device comprising a display device, a display device comprising a plurality of light source, a pixel driver, a pixel array, a display device.

FIG. 3 shows a diagram 300 of a display device 210 having a L ED array 214 connected to a gate driver 212 and a data driver 216 As discussed further herein, the gate driver 212 may include a plurality of gate output controllers that provide power and scan data outputs to each row and/or column of the L ED array according to embodiments discussed herein, each gate output 302 may be limited by a refresh rate of each individual row or individual group of rows.

4A-4B illustrate a gate driver circuit 400 having a cell circuit 410 and an output selector 412. the gate driver circuit 400 includes a control circuit 408 connected to a plurality of transistors and inputs for allowing the control circuit 408 to scan for updates from the data driver 216. one or more of the plurality of transistors may be an oxide transistor (e.g., an oxide thin film transistor) that provides a very low off current to allow less power consumption when a low refresh rate is applied to L ED array 214. furthermore, by using an oxide transistor in combination with an organic L ED L array 214, a significant reduction in power consumption may be achieved compared to displays using low temperature polysilicon. accordingly, the apparatus and methods discussed herein may be implemented using a gate driver circuit 400 having one or more oxide thin film transistors connected to an organic L ED L array 214. additionally, in some embodiments, the gate driver circuit 400 may be incorporated into each gate output terminal 302 to provide a control signal output from the gate driver circuit 400 to a high scan signal output when a scan signal is applied to the gate driver circuit 402 or when a high scan signal output from the gate driver circuit 416 is not available, or when a high scan signal output from the gate driver circuit 416 is not available, or when a scan signal output is provided at the gate driver circuit 414, or when a scan signal output from the scan signal output is not available, or when a scan signal is provided at the scan signal output from the gate driver circuit 414, or when a scan signal output 414, or when a scan signal is not available, or when a scan signal is provided at the scan signal output of the scan signal output terminal 414, or when a scan signal output from the scan signal output terminal 414, or when a scan signal is not available, or when the scan signal is provided at the scan signal output of the scan circuit 414, or when the scan signal output of the scan signal.

FIG. 5 shows a graph 500 listing how multiple rows and regions of an L ED array 214 may be refreshed at different rates based on operation of a gate driver circuit 400. specifically, FIG. 5 lists examples when a first refresh rate is assigned to a first region 508 of the L ED array 214 that is greater than a second refresh rate assigned to a second region 510 of the L ED array 214. at frame 1, due to both the first refresh rate and the second refresh rate, both the first region 508 and the second region 510 are refreshed based on scanning performed on all rows of the 867 ED array 214. to explain, the first region 508 may be streaming video and the second region 510 may be a static image adjacent to the streaming video. from the second frame to an "N + 3" frame, the first refresh rate is such that the rows corresponding to the first region 508 at each frame to allow for updating the video at each frame, the second refresh rate is such that the rows corresponding to the second region are updated by the minimum energy rate 35510, and the refresh rate is not equal to the minimum energy saving of the ED array 214. after the refresh rate is applied, the refresh rate is equal to the minimum energy saving of the ED array 214, the refresh rate 358, 368 is equal to the minimum energy saving refresh rate of the ED array 214.

6A-6B illustrate problems and solutions associated with providing multiple refresh rates to L ED array 214. specifically, FIG. 6A illustrates a representation of refresh boundary 608, which may be visible to a user when the refresh rate of first region 508 is greater than the refresh rate of second region 510. A representation of refresh boundary 608 is seen in FIG. 6A, where average refresh line 606 is shown. average refresh line 606 is an example where first refresh rate 602 is greater than second refresh rate 604, and adjacent refresh boundary 608 exhibits both refresh rates at the same time. because of average refresh line 606, flicker or brightness ripple will be visible unless refresh boundary 608 is compensated for, to address the problem of flicker and ripple, solutions are listed in FIG. 6B and FIG. 7. specifically, FIG. 6B illustrates how compensation for refresh boundary 608 may be performed in the digital domain using one pixel set 610, which set of pixels may be interchanged on refresh boundaries 608 based on refresh rate, for example, pixel sets 352 with at least one pixel set boundary, and a technique may be performed to provide for smoothing pixel sets with a different pixel sets ordering between each pixel set and pixel set ordering (sometimes referred to as a pixel set) in order of pixel sets 612.

FIG. 7 shows a system diagram 700 for performing multi-bank and multi-parameter gamma distributions in order to mitigate the flicker and ripple problem at refresh boundaries 608. in particular, FIG. 7 shows a simulated solution for applying gamma switching to rows or row blocks in order to correct for flicker and ripple.A system diagram 700 includes a first bank 702 storing a first gamma curve and a second bank 704 storing a second gamma curve each of the first and second gamma curves is associated with one of two refresh rates that may be applied to L ED array 214, respectively.

FIG. 8 shows a method 800 for modifying the refresh rate of a row or group of rows based on the difference between frames provided to L ED array 214. in particular, method 800 includes step 802. generating a first data frame and a second data frame by display manager 206. comparing each first frame row (i.e., a row of the first data frame) to each second frame row (i.e., a row of the second data frame) may be performed at computing device 202 or display device 210 by one or more software modules within one or two respective devices. at step 804, the comparison of step 804 may be done sequentially or one at a time for each row or the comparison of all rows may be performed simultaneously. at step 806, display manager 206 determines whether the first frame row is different from the second frame row. if the first frame row is different from the second frame row, at step 808, display manager 206 causes the array row associated with the second frame row to be refreshed according to a normal frame rate.a low refresh rate 3560, if the first frame row is different from the normal frame refresh rate, the refresh rate is such that the refresh rate is greater than the normal frame refresh rate, such that the refresh rate is maintained at a low refresh rate is greater than a normal Hertz refresh rate, such that the refresh rate is applicable to a normal Hertz refresh rate, such that the refresh rate is maintained at a low refresh rate is greater than a normal Hertz frame refresh rate if the normal Hertz frame refresh rate, such that the normal frame refresh rate is such that the refresh rate is greater than a normal frame refresh rate, such that the normal refresh rate is not applicable at a normal frame refresh rate, and the refresh rate is such that the normal refresh rate is such that the refresh rate is not applicable at a refresh rate is No. 10.

FIG. 9 shows a method 900 for adjusting L ED array 214 refresh rate of one or more lines based on flicker content of one or more frames or images to be displayed by ED array 214. flicker content or flicker refers to the amount or severity of an apparent transition from frame to frame that a user may perceive when viewing a display of a computing device. method 900 includes step 902, where display manager 206 generates a first data frame and a second data frame. each of the first and second data frames includes one or more lines of data to be provided to L ED array 214. at step 904, display manager 206 compares each first frame line of the first frame with each second frame line of the second frame. after this, at step 906, display manager 206 determines whether the first line is different from the second frame line if the corresponding first frame line is refreshed at a very low frame rate.A flicker content refresh rate or a flash rate is not appropriate for the second frame 206, if the corresponding second frame line refresh rate is not appropriate for the second frame 206, such that the second frame refresh rate does not include a single refresh of the flicker content or a refresh at step 910.

FIG. 10 shows a method 1000 for refreshing L one or more rows of ED array 214 based on an amount of time that one or more rows have remained static or unchanged method 1000 includes step 1002 where display manager 206 determines L how long one or more rows of ED array 214 have remained static for at step 1004, display manager 206 compares the static time or the time that one or more rows have remained static or unchanged with a predetermined threshold time.

Fig. 11 is a block diagram of a computing device 1100 that may represent components of computing device 100 and/or computing device 202. It should be understood that the components, devices, or elements shown in fig. 11 and described with respect to fig. 11 may not be necessary, and thus some of them may be omitted in certain embodiments. The computing device 1100 may include a processor 1102, which represents a microprocessor, a coprocessor, circuitry, and/or a controller for controlling the overall operation of the computing device 1100. Although shown as a single processor, it is to be understood that the processor 1102 may comprise a plurality of processors. The multiple processors may be in operative communication with each other and may be collectively configured to perform one or more functions of the computing device 1100 as described herein. In some embodiments, the processor 1102 may be configured to execute instructions that may be stored at the computing device 1100 and/or otherwise accessible to the processor 1102. As such, whether configured by hardware or a combination of hardware and software, the processor 1102 is capable of performing operations and actions in accordance with the embodiments described herein.

Computing device 1100 can also include a user input device 1104 that allows a user of computing device 1100 to interact with computing device 1100. For example, user input device 1104 may take various forms, such as buttons, keypads, dials, touch screens, audio input interfaces, visual/image capture input interfaces, input in the form of sensor data, and so forth. Still further, the computing device 1100 may include a display 1108 (screen display) that is controllable by the processor 1102 to display information to a user. The controller 1110 may be used to interact with and control various devices via a device control bus 1112. Computing device 1100 can also include a network/bus interface 1114 coupled to a data link 1116. The data link 1116 may allow the computing device 1100 to couple to a host computer or an accessory device. The data link 1116 may be provided by a wired connection or a wireless connection. For wireless connectivity, the network/bus interface 1114 may include a wireless transceiver.

The computing device 1100 may also include a storage device 1118, which may have a single disk or multiple disks (e.g., hard disk drives), and a storage management module that manages one or more partitions (also referred to herein as "logical volumes") within the storage device 1118. In some embodiments, storage 1120 may include flash memory, semiconductor (solid state) memory, and the like. Still further, the computing device 1100 may include Read Only Memory (ROM)1122, Random Access Memory (RAM)1124, and the like. The ROM 1122 may store programs, code, instructions, utilities or processes to be executed in a non-volatile manner. RAM1124 can provide volatile data storage and store instructions related to components of a storage management module configured to perform the various techniques described herein. The computing device may also include a data bus 1126. The data bus 1126 may facilitate data and signal transfer between at least the processor 1102, the controller 1110, the network interface 1114, the storage device 1118, the ROM 1122, and the RAM 1124.

The various aspects, embodiments, implementations, or features of the described embodiments may be used alone or in any combination. Various aspects of the described implementations may be implemented in software, hardware, or a combination of hardware and software. The embodiments may also be embodied as computer readable code on a computer readable medium for controlling a production operation or as computer readable code on a computer readable medium for controlling a production line. The computer readable storage medium is any data storage device that can store data which can thereafter be read by a computer system. Examples of the computer readable storage medium include read-only memory, random-access memory, CD-ROMs, HDDs, DVDs, magnetic tapes, and optical data storage devices. The computer readable storage medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. In some embodiments, the computer-readable storage medium may be non-transitory.

The foregoing description, for purposes of explanation, used specific nomenclature to provide a thorough understanding of the embodiments described. It will be apparent, however, to one skilled in the art that these specific details are not required in order to practice the embodiments. Thus, the foregoing descriptions of specific embodiments have been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the embodiments to the precise form disclosed. It will be apparent to those skilled in the art that many modifications and variations are possible in light of the above teaching.

Claims

1. A display method, comprising:

operating a first subset of a pixel array at a first refresh rate, the first subset comprising a first row of pixels of the pixel array;

simultaneously operating a second subset of the pixel array at a second refresh rate, the second refresh rate being different from the first refresh rate, the second subset including a second row of pixels of the pixel array adjacent to the first row of pixels; and

during the operation and the concurrent operation, image data to be displayed at a first row and image data to be displayed at a second row are altered based on at least one of a first refresh rate or a second refresh rate.

2. The method of claim 1, wherein altering the image data to be displayed prevents visible ripples at the boundary between the first subset and the second subset.

3. The method of claim 1, wherein altering the image data to be displayed at the first row and the image data to be displayed at the second row comprises: for each of the at least one pixel of the first row, the pixel value for that pixel is interchanged with the pixel value for the corresponding pixel of the second row.

4. The method of claim 3, wherein interchanging comprises digitally interchanging a pixel value for the pixel with a pixel value for a corresponding pixel of the second row.

5. The method of claim 3, wherein the first subset is a first set of rows of the pixel array and the second subset is a second set of rows of the pixel array.

6. The method of claim 1, wherein altering the image data is based on a first refresh rate and a second refresh rate.

7. The method of claim 1, wherein altering the image data to be displayed at the first row and the image data to be displayed at the second row comprises performing a dithering operation on a plurality of pixel values of the first row and a corresponding plurality of pixel values of the second row.

8. The method of claim 1, wherein altering the image data to be displayed at the first row and the image data to be displayed at the second row comprises:

interpolation is performed for a first gamma curve associated with a first refresh rate and a second gamma curve associated with a second refresh rate.

9. The method of claim 8, wherein altering the image data to be displayed at the first row and the image data to be displayed at the second row further comprises:

for each of the at least one pixel of the first row, the result of the interpolation is applied to that pixel and to the corresponding pixel in the second row.

10. The method of claim 9, further comprising:

scaling a result of the interpolation prior to applying the result of the interpolation.

11. The method of claim 10, further comprising:

operating a third subset of the array of pixels at a first refresh rate and using a first gamma curve.

12. The method of claim 10, wherein altering the image data to be displayed at the first row and the image data to be displayed at the second row further comprises:

an analog compensation operation is performed.

13. A device having a display with an array of pixels, the device comprising:

a first region of the array configured to display first display content at a first refresh rate, a first subset of the first region of the array comprising a first row of pixels of the array;

a second region of the array configured to simultaneously display second display content at a second refresh rate, the second refresh rate being different from the first refresh rate, the second region comprising a second row of pixels of the array adjacent to the first row of pixels; and

a processor configured to alter image data of first display content to be displayed at a first row and image data of second display content to be displayed at a second row based on at least one of a first refresh rate or a second refresh rate.

14. The apparatus of claim 13, wherein the processor is further configured to dither a portion of a first display content associated with a first row and a portion of a second display content associated with a second row.

15. The apparatus of claim 14, wherein the processor is further configured to display image data of a second display content using at least one pixel of a first row while dithering the portion of the first display content associated with the first row and a portion of the second display content associated with a second row.

16. The apparatus of claim 13, further comprising:

a first bank storing a first gamma curve associated with a first refresh rate;

a second bank storing a second gamma curve associated with a second refresh rate; and

the processor is configured to perform interpolation on the first gamma curve and the second gamma curve to generate a row block gamma curve.

17. The apparatus of claim 16, wherein the processor is further configured to apply the row block gamma curve to image data of a first display content associated with a first row.

18. A display method, comprising:

receiving first display content to be displayed by a first row of pixels at a first refresh rate;

receiving second display content to be displayed by a second row of pixels at a second refresh rate, the second refresh rate being different from the first refresh rate, wherein the first row and the second row are adjacent rows in the pixel array; and

while displaying the first display content at the first refresh rate and the second display content at the second refresh rate, based on at least one of the first refresh rate or the second refresh rate,

the image data of the first display content and the image data of the second display content are altered.

19. The method of claim 18, wherein altering image data comprises performing a dithering operation on the at least some of the first display content and the second display content.

20. The method of claim 18, wherein altering image data comprises performing interpolation between a first gamma curve associated with a first refresh rate and a second gamma curve associated with a second refresh rate.