CN111462260B - Mura compensation method and device of display panel and electronic equipment - Google Patents

Mura compensation method and device of display panel and electronic equipment Download PDF

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CN111462260B
CN111462260B CN202010338881.3A CN202010338881A CN111462260B CN 111462260 B CN111462260 B CN 111462260B CN 202010338881 A CN202010338881 A CN 202010338881A CN 111462260 B CN111462260 B CN 111462260B
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compensation
gray
scale
display panel
data
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CN111462260A (en
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刘胜男
曾德源
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Chip Wealth Technology Ltd
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Abstract

The embodiment of the invention provides a mura compensation method and device of a display panel and electronic equipment, and relates to the field of panel display, wherein the method comprises the following steps: acquiring input gray-scale data of a video source to be displayed at a target pixel of a display panel; compressing input gray-scale data; determining a compensation factor at the target pixel; based on the compressed input gray-scale data and the compensation factors, obtaining compensation output data; the compensation output data is used to compensate for mura of the display panel. Therefore, the technical scheme provided by the embodiment of the invention can be adjusted in the full gray scale range no matter whether the brightness of the mura area is to be reduced or the brightness of the mura area is to be improved, so that the full gray scale mura compensation can be realized, and the problem that the full gray scale mura compensation cannot be realized in the prior art is solved.

Description

Mura compensation method and device of display panel and electronic equipment
Technical Field
The invention relates to the field of display equipment, in particular to a mura compensation method and device of a display panel and electronic equipment.
Background
mura refers to a phenomenon of uneven brightness in display when an image is displayed.
Currently, in the prior art, aiming at mura compensation of a display panel, gray scale is mainly reduced in a brighter place in screen display, so that display brightness is reduced; and the gray scale is increased in the darker place, so that the display brightness is increased, and the display brightness is uniform. However, this method has the following disadvantages: the above prior art approach of compensating with digital data has no compensatory room for maximum gray scale (e.g., 255 for 8bit data) since it compensates by adding a lambda value to the input data. However, in reality, there is a need for compensating for mura at full gray scale, especially 255 gray scale, so the above method cannot compensate for the mura defect at full gray scale brightness, and cannot meet the need.
Disclosure of Invention
In view of the above, the present invention is directed to a mura compensation method, apparatus and electronic device for a display panel.
In order to achieve the above object, the technical scheme adopted by the embodiment of the invention is as follows:
in a first aspect, an embodiment of the present invention provides a mura compensation method for a display panel, including:
acquiring input gray-scale data of a video source to be displayed at a target pixel of a display panel;
compressing the input gray-scale data;
Determining a compensation factor at the target pixel;
based on the compressed input gray-scale data and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel.
With reference to the first aspect, an embodiment of the present invention provides a first possible implementation manner of the first aspect, where the step of performing compression processing on the input gray-scale data includes:
compressing the input gray-scale data by applying a predetermined compression factor;
a step of determining a compensation factor at a target pixel, comprising:
a compensation factor at the target pixel is determined using a pre-constructed compensation factor matrix.
With reference to the first possible implementation manner of the first aspect, the embodiment of the present invention provides a second possible implementation manner of the first aspect, wherein the formula is appliedCalculating to obtain the compression factor; wherein K represents a compression factor; gmax represents the maximum gray level; dm_max represents the compensation factor matrix maximum compensation value.
With reference to the first possible implementation manner of the first aspect, the embodiment of the present invention provides a third possible implementation manner of the first aspect, where the formula is applied Calculating to obtain the compression factor; wherein K represents a compression factor, adelta represents a voltage margin of an analog voltage on an ordinate in a conversion relation curve of a digital programming voltage and the analog voltage; a0 and AGmax represent the maximum analog voltage corresponding to the digital program voltage VGmax and the minimum analog voltage corresponding to the digital program voltage V0, respectively.
With reference to the first possible implementation manner of the first aspect, the embodiment of the present invention provides a fourth possible implementation manner of the first aspect, where the process of constructing the compensation factor matrix includes:
acquiring a solid-color picture of a key point gray scale, and determining a brightness matrix of the solid-color picture;
obtaining an actual gamma value of the gray level of the key point by using the gamma relation between the brightness and the gray level;
an actual gray scale matrix G_r based on the actual gamma value of the gray scale of the key point;
and generating a compensation factor matrix based on the actual gray-scale matrix G_r.
With reference to the first aspect, an embodiment of the present invention provides a fifth possible implementation manner of the first aspect, where, before the step of performing compression processing on the input gray-scale data to obtain compressed gray-scale data, the method further includes:
And performing bit expansion processing on the input gray-scale data.
In an alternative embodiment, the method further comprises:
determining a digital programming voltage corresponding to the compensated output data;
determining an analog voltage corresponding to the digital programming voltage; the analog voltage is used for driving a light-emitting circuit of the display panel to generate the compensated visible light brightness.
In a second aspect, an embodiment of the present invention provides a mura compensation apparatus for a display panel, including:
the acquisition module is used for acquiring input gray-scale data of a video source to be displayed at a target pixel of the display panel;
the compression module is used for compressing the input gray-scale data;
a determination module for determining a compensation factor at the target pixel;
the processing module is used for obtaining compensation output data based on the input gray-scale data after compression processing and the compensation factors; the compensation output data is used for mura compensation of the display panel.
In a third aspect, an embodiment of the present invention further provides an electronic device, including a processor and a memory, where the memory stores machine executable instructions executable by the processor, where the processor may execute the machine executable instructions to implement the mura compensation method of the display panel according to any one of the foregoing embodiments.
In a fourth aspect, embodiments of the present invention further provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a mura compensation method of a display panel according to any of the foregoing embodiments.
The embodiment of the invention has the following beneficial effects: the embodiment of the invention provides a mura compensation method, a mura compensation device, electronic equipment and a computer readable storage medium of a display panel, wherein the method comprises the following steps: acquiring input gray-scale data of a video source to be displayed at a target pixel of a display panel; compressing input gray-scale data; determining a compensation factor at the target pixel; based on the compressed input gray-scale data and the compensation factors, obtaining compensation output data; the compensation output data is used to compensate for mura of the display panel. Therefore, the technical scheme provided by the embodiment of the invention can be adjusted in the full gray scale range no matter whether the brightness of the mura area is to be reduced or the brightness of the mura area is to be improved, so that the full gray scale mura compensation can be realized, and the problem that the full gray scale mura compensation cannot be realized in the prior art is solved.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows a flowchart of a mura compensation method of a display panel according to an embodiment of the present invention;
fig. 2 is a flowchart illustrating another mura compensation method of a display panel according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating a mura compensation method of a third display panel according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating a mura compensation method of a fourth display panel according to an embodiment of the present invention;
fig. 5 shows a schematic diagram of a mura compensating device of a display panel according to an embodiment of the present invention;
FIG. 6 shows an original gamma programming map voltage plot at an 8bit 255 gray scale;
FIG. 7 shows a graph of modified gamma programming map voltage at 8bit 255 gray scale;
FIG. 8 illustrates a graph of digital programming voltage versus analog voltage as employed by an embodiment of the present invention;
fig. 9 shows an application scenario diagram of a mura compensation method of a display panel according to an embodiment of the present invention;
fig. 10 shows a schematic diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
It is noted that relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The current mura defect compensation aims at compensating the uneven brightness of middle and low gray scales, and specifically comprises the following steps:
(1) Firstly, when the gray scale of a key point (such as 32/64/128/192/224 gray scale and the like) is displayed, a CCD camera is utilized to obtain red, green and blue (R/G/B) pictures of each gray scale defect panel;
(2) Calculating a brightness data matrix under each gray-scale CCD photo;
(3) Searching defective pixel points on the panel through brightness data, and calculating an actual brightness gray scale value corresponding to the actual brightness of each pixel point with the mura defect;
(4) Calculating a difference lambda between the actual brightness gray level and the input gray level to be compensated, wherein the difference lambda is a compensation value, and the lambda can be a data matrix, and the data in the matrix is the data required to be compensated for each pixel point in the panel;
(5) For the pixel points with mura defects, the lambda value is overlapped into the input data to be compensated in a digital compensation mode, so that the mura defects in panel display are compensated.
In summary, in the prior art, mura compensation for a display panel mainly reduces gray scale in a brighter place in screen display, and reduces display brightness; and the gray scale is increased in the darker place, so that the display brightness is increased, and the display brightness is uniform. However, the above-described prior art mura compensation method uses a digital data compensation method, since it compensates by adding a lambda value to the input data, there is no compensatory room for the maximum gray scale (e.g., 255 for 8bit data). In summary, the existing mura compensation method cannot compensate the mura defect under the full gray-scale brightness, and cannot meet the requirements.
Based on the above, the embodiment of the invention provides a mura compensation method, a mura compensation device and electronic equipment of a display panel, which can realize the mura compensation of a full gray scale range and relieve the technical problem that the mura defect under the full gray scale brightness cannot be compensated in the prior art.
For easy understanding, the mura compensation method of the display panel according to the embodiment of the present invention is first described below.
First embodiment
As shown in fig. 1, an embodiment of the present invention provides a mura compensation method of a display panel, including:
step S102, obtaining input gray-scale data of a video source to be displayed at a target pixel of a display panel;
step S104, compressing the input gray-scale data;
step S106, determining a compensation factor at the target pixel;
step S108, based on the input gray-scale data after compression processing and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel.
It should be noted that, S106 is used for convenience of description and does not represent the sequence thereof, and the step S106 may be performed before or after any step before the step S108, for example, the step S106 may be performed before the step S102, and the step S106 may be performed after the step S102 and before the step S104, so the step S106 should not be construed as limiting the embodiment of the present invention.
In an alternative embodiment, the step of determining the compensation factor at the target pixel in step S106 includes determining the compensation factor at the target pixel by applying a pre-constructed compensation factor matrix.
In an alternative embodiment, the step of compressing the input gray-scale data in step S104 includes:
a, compressing input gray-scale data by applying a predetermined compression factor;
in an alternative embodiment, the compression factor is a number greater than 0 and less than 1.
By using a compression factor K less than 1 for full gray scale compression, for example, for 8bit data, compressing the input data into a smaller range 0,255 x K, provides margin for compensation at the maximum gray scale 255 x K. Therefore, the method of the invention can realize full gray-scale mura compensation by adjusting the brightness of the mura area in the full gray-scale range no matter the brightness of the mura area is reduced or the brightness of the mura area is improved.
To compensate for full gray scale, an appropriate compression factor K needs to be determined to produce the best compensation effect with minimal resource costs (e.g., minimal occupied hardware resources).
Two methods of determining the compression factor are described below.
1. Taking into account the compensation accuracy and the memory requirements, the demura compensation calculation of the display panel is stored in the memory after completion. If the memory is relatively tight and the space is relatively small, then the data needs to be truncated, which may result in insufficient compensation capability, and for some areas where mura is severely defective, insufficient compensation may be possible. If full-precision demura data (compensation data) is selected to be stored in this case, the memory space required is necessarily increased, and thus a trade-off between compensation precision and memory requirements is required.
In view of this, in alternative embodiments, the formula may be appliedCalculating to obtain a compression factor; wherein K represents a compression factor; gmax represents the maximum gray level; dm_max represents the compensation factor matrix maximum compensation value.
Wherein the determination of dm_max comprises:
a) Setting a maximum limit Bth of the bit width of the memory;
specifically, the maximum limit Bth of the memory bit width can be designed according to the design requirement;
b) Setting a maximum threshold Eth of the total error;
specifically, a maximum threshold Eth of the total error can be designed and stored according to the compensation requirement;
after the parameter presetting is completed, the bit width selection process is executed below.
c) The initial stored data selectable bit width is first set.
The maximum value dm_max of the compensation factor matrix (abbreviated as DM matrix herein) under each key point gray scale (such as 32/64/128/192/224 gray scale, etc.) is counted, the bit width dm_max is determined, and a value smaller than dm_max bit width and smaller than the maximum limit Bth of the bit width is selected as the initial bit width b.
d) Counting the absolute error sum err of the compensation value of which the data bit width exceeds the bit width b and the maximum value which can be represented by the bit width b in each key gray scale compensation factor matrix;
e) If the absolute error and err values do not exceed the set error maximum threshold Eth, selecting the current bit width b as the storage bit width of the compensation matrix; otherwise, the current bit width cannot meet the requirement of compensation precision in calculation, so that the value of b needs to be readjusted;
f) Before the bit width b is adjusted, firstly judging the bit width threshold value, comparing whether the current bit width b exceeds the bit width threshold value allowed by the memory, if so, the value of b can not be increased any more, namely, only the current bit width b can be selected as the memory bit width of the compensation matrix; otherwise, the bit width b can be continuously adjusted;
g) The bit width b is adjusted, e.g. the value of b is increased by 1, and the decision of the current bit width b is continued in step d).
h) After selecting bit width b, the updated maximum compensation value dm_max is determined, and then the calculation of the compression factor K is continued.
For ease of understanding, the following description will be given of the procedure of selecting the compression factor K by taking gmax=255 as an example:
since the demura compensation of the middle and low gray levels generally does not exceed the range of the maximum value 255 represented by 8 bits, the effect of the compensation value of the middle and low gray levels on the compression factor is negligible. The input data with high gray scale has larger value (for example, 255 gray scale) before being uncompressed, and after adding a compensation value, the demura compensation value is more likely to exceed the 255 range. Therefore, the influence of the high gray-scale compensation value on the compression factor, especially 255 gray-scales, is emphasized here.
The compression factor K is calculated according to formula (3):
the calculated compression factor is used to compress the input gray-scale data.
Specifically, the updated maximum compensation value dm_max is obtained according to the selected compensation bit width b. Then 255 is determined to correspond to a maximum compensation value dm_max which should be compressed to 255-dm_max, e.g. determined dm_max=32, 255-32=223, i.e. 255 should be compressed to 223; the last calculated compression factor k= (255-dm_max)/255, e.g. k=223/255=7/8.
2. Considering that the driving voltage for driving the OLED light emission on the panel is generated by the driver IC, the voltage is determined by another set of relationship curves between the analog voltage and the digital voltage after the conversion relationship curve of the gray level and the digital programming voltage (referred to as a digital gamma curve, the conversion is a conversion related to the gamma relationship), and the analog voltage corresponding to each digital voltage is used to generate the visible light for the OLED driving.
In view of this, in an alternative embodiment, the formula is appliedCalculating to obtain a compression factor; wherein K represents a compression factor, adelta represents a voltage margin of an analog voltage on an ordinate in a conversion relation curve of a digital programming voltage and the analog voltage; a0 and AGmax represent the maximum analog voltage corresponding to the digital program voltage VGmax and the minimum analog voltage corresponding to the digital program voltage V0, respectively.
In particular, in the conversion curve of the digital programming voltage and the analog voltage, a certain voltage margin Adelta needs to be reserved for the compensation value in the setting of the analog voltage.
In the circuit design of driver IC or in the design requirement of the user, there may be a limitation to the analog voltage setting range value, that is, the magnitude of the voltage margin Adelta is limited, and on the basis of the limitation, the compression factor K is calculated by taking agmax=255 as an example, specifically, the calculation of K by Adelta is as follows:
And compressing the input gray-scale data by using the compression factor K.
It should be noted that the compression factor K may also be determined by a combination of the above two methods, for example, the compression factor is selected by a combination of the formula (3) and the formula (4).
In an alternative embodiment, the process for constructing the compensation factor matrix includes:
1. acquiring a pure-color picture of the gray level of the key point, and determining a brightness matrix of the pure-color picture;
wherein the pure color picture comprises pure red, pure green and pure blue pictures.
2. Obtaining the actual gamma value of the gray level of the key point by using the gamma relation between the brightness and the gray level;
3. an actual gamma value based on the brightness matrix and the gray level of the key point is an actual gray level matrix G_r;
4. a compensation factor matrix is generated based on the actual gray scale matrix g_r.
Further, the method further comprises: the compensation factor matrix DM is stored in a memory for compensation use when the panel is displayed.
The method comprises the steps of displaying pure red, pure green and pure blue pictures of key point gray scales on a panel, and collecting mura defect data by using CCD (charge coupled device) addition; calculating a demux compensation matrix according to a principle of the demux compensation; storing the compensation matrix in a memory; when the panel is compensated, the corresponding data in the compensation matrix is taken and applied to mura compensation; the IC driving panel displays the uniform picture to be displayed.
The mura compensation method of the display panel provided by the embodiment of the invention comprises the steps of obtaining input gray-scale data of a video source to be displayed at a target pixel of the display panel; compressing input gray-scale data; determining a compensation factor at the target pixel; based on the compressed input gray-scale data and the compensation factors, obtaining compensation output data; the compensation output data is used to compensate for mura of the display panel. Therefore, the method is a gray scale compression scheme, whether the brightness of the mura area is to be reduced or the brightness of the mura area is to be improved, the method is adjustable in the full gray scale range, the full gray scale mura compensation can be realized, and the problem that the full gray scale mura compensation cannot be realized in the prior art is solved.
Second embodiment
Considering the problem that the compression factor is adopted to compress the input data, the defect of gray scale combination can be generated.
Referring to fig. 2, on the basis of the first embodiment, an embodiment of the present invention provides another mura compensation method of a display panel, including:
step S202, obtaining input gray-scale data of a video source to be displayed at a target pixel of a display panel;
in step S204, the input gray-scale data is subjected to bit expansion processing.
For example, 8bit input gray scale data is converted into 10bit data by a 4-by-4 bit expansion process.
When the 8-bit data is subjected to the bit expansion process, the data can be converted to 10 bits by 4, and the data can be expanded to other bit widths.
Step S206, compressing the input gray-scale data;
step S208, determining a compensation factor at the target pixel;
step S210, based on the input gray-scale data after compression processing and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel.
The invention expands the input gray data to avoid gray combination and increase the calculation fineness.
Third embodiment
Referring to fig. 3, on the basis of the first embodiment, an embodiment of the present invention provides a mura compensation method of a third display panel, the method including:
step S302, obtaining input gray-scale data of a video source to be displayed at a target pixel of a display panel;
step S304, compressing the input gray-scale data;
step S306, determining a compensation factor at the target pixel;
step S308, based on the input gray-scale data after compression processing and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel.
Step S310, determining a digital programming voltage corresponding to the compensation output data;
step S312, determining an analog voltage corresponding to the digital programming voltage; the analog voltage is used to drive the light emitting circuit of the display panel.
In an alternative embodiment, step S310 may be implemented by:
1. determining a digital programming voltage corresponding to the compensation output data by applying the modified gamma programming mapping voltage curve;
the modified gamma programming mapping voltage curve (i.e. digital gamma curve) is obtained by compressing input digital data of the abscissa of the original gamma programming mapping voltage curve, while not compressing the digital programming voltage of the abscissa of the original gamma programming mapping voltage curve; FIG. 6 shows an original gamma programming map voltage plot at 8bit 255 gray levels, where the digital programming voltage for the 0 gray level is V0 and the digital programming voltage for the 255 gray level is V255, and a corresponding digital programming voltage can be selected for each gray level. In order to compensate for mura defects in AMOLED panel display, input gray-scale data is increased (or decreased) for middle and low gray scales by overlapping compensation values, and then a larger (or smaller) digital programming voltage is mapped in a digital gamma curve, so that the brightness of a mura area is improved (or decreased), and uniform display is realized. However, this prior approach does not compensate for the highest gray level 255; FIG. 7 shows a graph of modified gamma programming map voltage at an 8bit 255 gray scale.
It is contemplated that if the original digital gamma curve of fig. 6 is still used for compressed input data, the 255 gray scale is compressed to 255 x k, the digital programming voltage will be V (255 x k) instead of V255, and this compensation will reduce the overall brightness of the panel, although the mura defect on the panel can be compensated.
In view of this, the method of modifying the digital gamma curve is adopted in the method to overcome the problem of brightness reduction.
Specifically, in order to secure the brightness of the whole screen, a method of compressing only input digital data without compressing digital programming voltages is adopted, as shown in fig. 7.
Assuming that the maximum required brightness of the panel is Xnit, and the digital programming voltage of the pixel without mura defect corresponding to the Xnit brightness is V 255 . Therefore, in the digital gamma curve, the embodiment of the invention sets the digital programming voltage corresponding to the 255×k gray scale of 255 as V 255 As shown in fig. 7. Meanwhile, in the invention, the voltage for digital programming is V 255 After which a margin voltage V is reserved headroom So as to be used for high gray-scale mura compensation.
In the digital gamma curve shown in FIG. 7, the 0 gray scale corresponds to the V0 digital programming voltage, and the compressed gray scale 255 x K gray scale corresponds to the V 255 A digital programming voltage greater than 255 xK gray scale corresponding ratio V 255 Higher digital programming voltages. Assuming that the original input gray-scale data is g_ori, and the compressed and mura-compensated output gray-scale is 255, the digital programming voltage mapped in the digital gamma curve of fig. 7 is V 255 +V headroom
With the modified digital gamma curve of fig. 7, the digital programming voltage of the original input gray level g is identical to the digital programming voltage Vg mapped by the g gray level of the original digital gamma curve of fig. 6, although the original input gray level g is compressed to g×k, and thus, the overall display brightness of the display panel (e.g., AMOLED panel) is not changed.
In an alternative embodiment, step S312 may be implemented by:
1) Determining an analog voltage corresponding to a digital programming voltage by applying a conversion relation curve of the digital programming voltage and the analog voltage; the analog voltage is used for driving a light-emitting circuit of the display panel to generate the compensated visible light brightness.
And determining the corresponding analog voltage of the digital programming voltage by utilizing the corresponding curves of the digital programming voltage and the analog voltage, wherein the analog voltage drives an OLED light-emitting circuit in the AMOLED panel to generate the compensated visible light brightness.
Likewise, the description is given here taking 8bit 255 gray scale as an example:
FIG. 8 shows a graph of digital programming voltage versus analog voltage as used by an embodiment of the present invention (modified), the graph having monotonicity as shown in FIG. 8. In the embodiment of the present invention, since the modified digital gamma curve shown in fig. 7 is adopted, in order to ensure display brightness, the digital programming voltage of 255×k gray scale is set to V255, and therefore, first, the analog voltage corresponding to the V255 digital programming voltage should be set to the analog voltage capable of generating the desired visible light brightness.
Meanwhile, in fig. 7, for compensating the high gray level, the digital programming voltage corresponding to the 255×k+delta gray level compensation value (the maximum of 255 gray levels after compensation) is v255+v at the maximum headroom Accordingly, in the digital program voltage versus analog voltage curve of fig. 8, the range of the digital program voltage and the range of the analog voltage are properly enlarged. Therefore, in the method provided by the embodiment of the invention, a certain voltage margin Adelta needs to be reserved for the compensation value in the setting of the analog voltage.
According to the mura compensation method of the display panel, provided by the embodiment of the invention, the original digital gamma curve is modified, namely, the method of only compressing input digital data and not compressing digital programming voltage is adopted, so that the brightness of the whole display panel is ensured not to be reduced.
Fourth embodiment
Referring to fig. 4, an embodiment of the present invention provides a mura compensation method of a fourth display panel, the method including:
step S402, obtaining input gray-scale data of a video source to be displayed at a target pixel of a display panel;
in step S404, the input gray-scale data is subjected to bit expansion processing.
Step S406, compressing the input gray-scale data;
step S408, determining a compensation factor at the target pixel;
step S410, based on the input gray-scale data after compression processing and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel;
step S412, determining a digital programming voltage corresponding to the compensated output data;
step S414, determining an analog voltage corresponding to the digital programming voltage; the analog voltage is used for driving a light-emitting circuit of the display panel to generate the compensated visible light brightness.
For easy understanding, the following describes an application scenario of the mura compensation method of the display panel provided by the embodiment of the present invention with an 8bit video source displayed on an AMOLED panel and with reference to fig. 9:
referring to fig. 9, the method includes:
(1) For a given 8-bit video source, displaying on an AMOLED panel, wherein the gray scale data is input to a sub-pixel at a given position on the panel;
(2) After multiplying 4 bits, converting to a 10bit data space gray_10, wherein the data range is [0,1023];
(3) Compressing the 10bit data gray scale by using a compression factor to obtain gray_10xK, namely Cgray_10, wherein the data range is [0,1023 x K ];
(4) The compensation factor dm_g at the corresponding AMOLED panel position is searched in the memory, and it should be noted that the compensation value of the general gray scale (assuming that g1< g 2) between the key points g1 and g2 can be calculated by the linear difference of the formula (1):
calculating demura output data DMgray:
DMgray=gray_10*K+DM_g②;
(5) Mapping to obtain digital programming voltage corresponding to demura output data DMgray through the modified digital gamma curve shown in FIG. 7;
(6) The digital programming voltage is converted into the analog voltage through the relation curve of the digital programming voltage and the analog voltage shown in fig. 8, so that the pixel circuit is driven to emit light, and the luminance uniformity of demura can be met by the luminance of the pixel.
Specifically, by utilizing corresponding curves of the digital programming voltage and the analog voltage, the analog voltage corresponding to the digital programming voltage is determined, and the analog voltage drives the OLED light-emitting circuit in the AMOLED panel to generate the compensated visible light brightness.
FIG. 8 is a graph of digital programming voltage versus analog voltage for the present invention, which is monotonic as shown. Since we use the digital gamma curve shown in fig. 7 in the present invention, in order to ensure the display brightness, the digital programming voltage of 255×k gray scale is set to V255 in the present invention, so the analog voltage corresponding to the V255 digital programming voltage should be set to be the analog voltage capable of generating the desired visible light brightness.
Meanwhile, in order to compensate for the high gray level, in fig. 7, the digital programming voltage corresponding to the 255×k+delta gray level compensation value (the maximum gray level after compensation is 255 gray levels) is v255+vheadroom, and accordingly, in the digital programming voltage and analog voltage relationship curve of fig. 8, the range of the digital programming voltage and the range of the analog voltage are properly enlarged. Therefore, in the method of the present invention, a certain voltage margin Adelta needs to be set for the compensation value in the setting of the analog voltage.
The panel compensation principle of the invention is as follows: in the data compensation of the mura area on the panel, firstly, the input gray-scale digital data is compressed to a smaller range, and the digital data compensation is performed by adopting a mode of overlapping compensation factors, namely, the compressed input digital data is compensated by adding a delta value. According to the method, mura compensation can be performed on full gray scale of AMOLED panel display data, so that high gray scale, especially 255 gray scale mura compensation is realized, in actual panel display mura compensation, uniform panel display can be realized in the full gray scale range, and the application range is wider, and the practicability is stronger; for example, in order for an AMOLED panel to display output gray-scale data corresponding to an input pixel, the method firstly compresses the input gray-scale data through a gray-scale compression scheme, namely, compresses the input data into a smaller range [0,255 x k ], and provides margin for compensation at the position of 255 x k of the maximum gray-scale; and obtaining compensation output data according to the compressed data, converting the compensation output data into digital programming voltage, then corresponding to a light-emitting circuit of each OLED on the AMOLED panel, designing a conversion relation curve of the digital programming voltage and the analog voltage, converting the digital programming voltage into the analog voltage, and finally driving each OLED pixel circuit on the panel by the analog voltage to emit satisfactory corresponding gray-scale visible light.
Fifth embodiment
Referring to fig. 5, the embodiment of the present invention further provides a mura compensation apparatus for a display panel, including an obtaining module 501, a compressing module 502, a determining module 503, and a processing module 504;
the obtaining module 501 is configured to obtain input gray-scale data of a video source to be displayed at a target pixel of a display panel;
the compression module 502 is configured to compress input gray-scale data;
the determining module 503 is configured to determine a compensation factor at the target pixel;
the processing module 504 is configured to obtain compensated output data based on the compressed input gray-scale data and the compensation factor; the compensation output data is used for mura compensation of the display panel.
In an alternative embodiment, the compression module 502 is configured to apply a predetermined compression factor to compress the input gray-scale data when compressing the input gray-scale data;
in an alternative embodiment, the formula is appliedCalculating to obtain a compression factor; wherein K represents a compression factor; gmax represents the maximum gray level; dm_max represents the compensation factor matrix maximum compensation value.
In an alternative embodiment, the formula is appliedCalculating to obtain a compression factor; wherein K represents a compression factor, adelta represents a voltage margin of an analog voltage on an ordinate in a conversion relation curve of a digital programming voltage and the analog voltage; a0 and AGmax represent the maximum analog voltage corresponding to the digital program voltage VGmax and the minimum analog voltage corresponding to the digital program voltage V0, respectively.
In an alternative embodiment, the determining module 503 is configured to apply a pre-constructed compensation factor matrix to determine the compensation factor at the target pixel when determining the compensation factor at the target pixel.
In an alternative embodiment, the construction process of the compensation factor matrix includes: acquiring a pure-color picture of the gray level of the key point, and determining a brightness matrix of the pure-color picture; obtaining the actual gamma value of the gray level of the key point by using the gamma relation between the brightness and the gray level; the gamma relation between the brightness and the gray scale is existing or known; an actual gamma value based on the brightness matrix and the gray level of the key point is an actual gray level matrix G_r; a compensation factor matrix is generated based on the actual gray scale matrix g_r.
In an alternative embodiment, the compression module 502 is further configured to perform a bit expansion process on the input gray-scale data.
In an alternative embodiment, the determining module 503 is further configured to determine a digital programming voltage corresponding to the compensated output data; determining an analog voltage corresponding to the digital programming voltage; the analog voltage is used for driving a light-emitting circuit of the display panel to generate the compensated visible light brightness.
It will be clear to those skilled in the art that, for convenience and brevity of description, reference may be made to the corresponding process in the foregoing method embodiment for the specific working process of the apparatus described above, which is not described herein again.
The mura compensation device of the display panel provided by the embodiment of the invention has the same technical characteristics as the mura compensation method of the display panel provided by the embodiment, so that the same technical problems can be solved, and the same technical effects can be achieved.
Referring to fig. 10, an embodiment of the present invention further provides an electronic device 100, including: processor 40, memory 41, bus 42 and communication interface 43, processor 40, communication interface 43 and memory 41 being connected by bus 42; the processor 40 is arranged to execute executable modules, such as computer programs, stored in the memory 41.
The memory 41 may include a high-speed random access memory (RAM, random Access Memory), and may further include a non-volatile memory (non-volatile memory), such as at least one magnetic disk memory. The communication connection between the system network element and the at least one other network element is achieved via at least one communication interface 43 (which may be wired or wireless), which may use the internet, a wide area network, a local network, a metropolitan area network, etc.
Bus 42 may be an ISA bus, a PCI bus, an EISA bus, or the like. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, only one bi-directional arrow is shown in FIG. 10, but not only one bus or type of bus.
The memory 41 is used for storing a program, and the processor 40 executes the program after receiving the execution instruction, and the method executed by the apparatus for defining a flow in any of the foregoing embodiments of the present invention may be applied to the processor 40 or implemented by the processor 40.
The processor 40 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuitry in hardware or instructions in software in processor 40. The processor 40 may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but may also be a digital signal processor (Digital Signal Processing, DSP for short), application specific integrated circuit (Application Specific Integrated Circuit, ASIC for short), off-the-shelf programmable gate array (Field-Programmable Gate Array, FPGA for short), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be embodied directly in the execution of a hardware decoding processor, or in the execution of a combination of hardware and software modules in a decoding processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory 41 and the processor 40 reads the information in the memory 41 and in combination with its hardware performs the steps of the method described above.
The embodiment of the application also provides a computer readable storage medium, which stores machine executable instructions, and when the computer executable instructions are called and executed by a processor, the computer executable instructions cause the processor to execute the mura compensation method of the display panel provided by the embodiment of the application.
In this context, the processor may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or by instructions in the form of software. The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processor, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The methods, steps, and logic blocks disclosed in the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present application may be embodied directly in hardware, in a decoded processor, or in a combination of hardware and software modules in a decoded processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory, and the processor reads the information in the memory and, in combination with its hardware, performs the steps of the above method.
It will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the apparatus and modules described above may refer to the corresponding process in the foregoing method embodiment, which is not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a non-volatile computer readable storage medium executable by a processor. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A mura compensation method of a display panel, comprising:
acquiring input gray-scale data of a video source to be displayed at a target pixel of a display panel;
compressing the input gray-scale data;
determining a compensation factor at the target pixel;
based on the compressed input gray-scale data and the compensation factors, obtaining compensation output data; the compensation output data is used for mura compensation of the display panel;
a step of determining a compensation factor at a target pixel, comprising:
determining a compensation factor at the target pixel by applying a pre-constructed compensation factor matrix;
the construction process of the compensation factor matrix comprises the following steps:
acquiring a solid-color picture of a key point gray scale, and determining a brightness matrix of the solid-color picture;
obtaining an actual gamma value of the gray level of the key point by using the gamma relation between the brightness and the gray level;
an actual gray scale matrix G_r based on the actual gamma value of the gray scale of the key point;
and generating a compensation factor matrix based on the actual gray-scale matrix G_r.
2. The method of claim 1, wherein the step of compressing the input gray-scale data comprises:
And compressing the input gray-scale data by applying a predetermined compression factor.
3. The method of claim 2, wherein the formula is appliedCalculating to obtain the compression factor; wherein K represents a compression factor; gmax represents the maximum gray level; dm_max represents the compensation factor matrix maximum compensation value.
4. The method of claim 2, wherein the formula is appliedCalculating to obtain the compression factor; wherein K represents compression factor, adelta represents conversion relation curve of digital programming voltage and analog voltageVoltage margin of analog voltage of ordinate in line; a0 and AGmax represent the maximum analog voltage corresponding to the digital program voltage VGmax and the minimum analog voltage corresponding to the digital program voltage V0, respectively.
5. The method of claim 1, wherein prior to the step of compressing the input gray-scale data to obtain compressed gray-scale data, the method further comprises:
and performing bit expansion processing on the input gray-scale data.
6. The method according to claim 1, wherein the method further comprises:
determining a digital programming voltage corresponding to the compensated output data;
Determining an analog voltage corresponding to the digital programming voltage; the analog voltage is used for driving a light emitting circuit of the display panel.
7. A mura compensation apparatus for a display panel, comprising:
the acquisition module is used for acquiring input gray-scale data of a video source to be displayed at a target pixel of the display panel;
the compression module is used for compressing the input gray-scale data;
a determination module for determining a compensation factor at the target pixel;
the processing module is used for obtaining compensation output data based on the input gray-scale data after compression processing and the compensation factors; the compensation output data is used for mura compensation of the display panel;
the determining module is used for determining the compensation factors at the target pixels by applying a pre-constructed compensation factor matrix when determining the compensation factors at the target pixels;
the construction process of the compensation factor matrix comprises the following steps: acquiring a solid-color picture of a key point gray scale, and determining a brightness matrix of the solid-color picture; obtaining an actual gamma value of the gray level of the key point by using the gamma relation between the brightness and the gray level; an actual gray scale matrix G_r based on the actual gamma value of the gray scale of the key point; and generating a compensation factor matrix based on the actual gray-scale matrix G_r.
8. An electronic device comprising a processor and a memory, the memory storing machine executable instructions executable by the processor to implement the method of any one of claims 1-6.
9. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method according to any of claims 1-6.
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