CN111446270A - Integrated device based on gallium oxide - Google Patents

Integrated device based on gallium oxide Download PDF

Info

Publication number
CN111446270A
CN111446270A CN202010382774.0A CN202010382774A CN111446270A CN 111446270 A CN111446270 A CN 111446270A CN 202010382774 A CN202010382774 A CN 202010382774A CN 111446270 A CN111446270 A CN 111446270A
Authority
CN
China
Prior art keywords
gallium oxide
electrode
piezoelectric resonator
oxide layer
integrated device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010382774.0A
Other languages
Chinese (zh)
Inventor
卢星
王钢
陈梓敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Youdian Semiconductor Technology Co.,Ltd.
Original Assignee
National Sun Yat Sen University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Sun Yat Sen University filed Critical National Sun Yat Sen University
Priority to CN202010382774.0A priority Critical patent/CN111446270A/en
Publication of CN111446270A publication Critical patent/CN111446270A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N39/00Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses an integrated device based on gallium oxide, and relates to the field of semiconductor integration. The scheme is provided aiming at the technical vacancy that a single chip based on gallium oxide materials simultaneously integrates a piezoelectric resonator and a transistor in the prior art. The piezoelectric resonator comprises a piezoelectric resonator area and a transistor area which are arranged in parallel; the transistor area and the piezoelectric resonator area are arranged on two sides of the same gallium oxide layer, the gallium oxide layer is provided with an electrode pair in the piezoelectric resonator area, the electrode pair is electrically connected with the gallium oxide layer, and any electrode in the electrode pair is electrically connected with a source electrode in the transistor area. The piezoelectric resonator and the radio frequency signal amplifying circuit have the advantages that by adopting the gallium oxide semiconductor, the transistor and the piezoelectric resonator are simultaneously manufactured on one chip, the single-chip integration technical basis of the radio frequency signal amplifying circuit and the radio frequency filter in the radio frequency front end is realized, and the piezoelectric resonator has the advantages of high performance, low loss, high reliability, small size and low cost. The method is particularly suitable for the front-end equipment of the radio frequency technology.

Description

Integrated device based on gallium oxide
Technical Field
The invention relates to the field of semiconductor integration, belongs to a new generation of information technology, and particularly relates to an integrated device based on gallium oxide.
Background
With the advent of big data and the internet of things, the radio frequency communication technology is rapidly developed and widely applied. The radio frequency front end is a key component of communication equipment, is increasingly complex along with the upgrading of a communication system, and simultaneously faces the challenges of miniaturization, high efficiency, high reliability and low cost. The radio frequency signal amplifying circuit and the radio frequency filter are two indispensable components for constructing a radio frequency front end, wherein the radio frequency signal amplifying circuit comprises a power amplifier, a low noise amplifier and the like and is made of a semiconductor transistor; whereas radio frequency filters are usually implemented by piezoceramic resonators. Currently, in the mainstream rf front end, the amplifier circuit and the filter are two separate chips. There are the following problems: 1. the two independent chips cannot be integrated due to incompatible materials, so that the miniaturization of the system is not facilitated; 2. parasitic problems caused by multi-chip assembly can increase system power consumption and failure risks, and are not beneficial to improving the efficiency and reliability of equipment; 3. multi-chip assembly also does not facilitate further reduction in production costs.
On the other hand, gallium oxide is a new generation of ultra-wide bandgap semiconductor material, has the outstanding advantages of large forbidden bandwidth, high breakdown field strength, high electron saturation drift velocity, corrosion resistance, high temperature resistance, radiation resistance and the like, is a preferred material for preparing electronic devices with high frequency, high power, high temperature resistance, radiation resistance and the like, and has great application potential in the field of future radio frequency communication. The gallium oxide single crystal of the phase has a hexagonal symmetrical structure, has extremely strong piezoelectric polarization characteristics, can maintain the piezoelectric performance in a wider temperature range, and is very suitable for preparing a thin film piezoelectric resonator device with high frequency, low loss and high stability.
There is currently no specific application of gallium oxide materials to devices integrated in piezoelectric resonant and amplification circuits.
Disclosure of Invention
The invention aims to provide a gallium oxide-based integrated device to realize the simultaneous integration of a piezoelectric resonator and a transistor in a bulk chip.
The invention relates to an integrated device based on gallium oxide, which comprises a piezoelectric resonator area and a transistor area which are arranged in parallel; the transistor area and the piezoelectric resonator area are arranged on two sides of the same gallium oxide layer, the gallium oxide layer is provided with an electrode pair in the piezoelectric resonator area, the electrode pair is electrically connected with the gallium oxide layer, and any electrode in the electrode pair is electrically connected with a source electrode in the transistor area.
The integrated device based on the gallium oxide has the advantages that the gallium oxide semiconductor is adopted, the transistor and the piezoelectric resonator are simultaneously manufactured on one chip, the single-chip integration technical basis of a radio-frequency signal amplifying circuit and a radio-frequency filter in the radio-frequency front end is realized, and the integrated device based on the gallium oxide has the advantages of high performance, low loss, high reliability, small volume and low cost. In addition, the integrated device is compatible with the preparation process of the conventional gallium oxide electronic device, and the method is simple and reliable, so that the low cost is ensured.
The thickness of the gallium oxide layer is 0.1um to 20 um. The purpose is to disclose preferred value ranges.
The gallium oxide layer is composed of single-crystal phase gallium oxide. The aim is to disclose a preferred gallium oxide crystalline selection.
The electrode pair comprises a first electrode and a second electrode, the first electrode is arranged on the upper surface of the gallium oxide layer, and the second electrode is arranged on the lower surface of the gallium oxide layer; a through hole penetrating to the bottom of the device is arranged below the source electrode in the transistor area; at least one end of the second electrode penetrates through the through hole and is electrically connected with the source electrode.
The electrode pair comprises a first electrode and a second electrode which are interdigital electrodes, the first electrode and the second electrode are both arranged on the upper surface of the gallium oxide layer, and at least one end of the second electrode extends into the transistor area and is electrically connected with the source electrode. And providing another realization structure of the electrode pair.
Sequentially stacking a substrate, a buffer layer and a gallium oxide layer from bottom to top; the buffer layer and the substrate are provided with cavities in the piezoelectric resonator area, and the gallium oxide layer is provided with electrode pairs at the corresponding positions of the cavities; and the upper surface of the gallium oxide layer is also provided with a channel layer in a stacked manner in the transistor area, one end of the upper surface of the channel layer, which is close to the piezoelectric resonator area, is provided with a source electrode, the other end of the upper surface of the channel layer is provided with a drain electrode, and a grid electrode is arranged between the source electrode and the drain electrode. In providing a specific laminated structure.
The distance between the grid and the source is smaller than that between the grid and the drain. The transistor has the advantages of reducing parasitic resistance between the source electrode and the grid electrode and improving the withstand voltage between the drain electrode and the grid electrode, thereby obtaining the high frequency and high power performance of the transistor to the maximum extent.
The upper surface of the channel layer is also provided with a barrier layer below the source electrode, the grid electrode and the drain electrode. The channel carrier concentration and the mobility of the transistor can be improved, and further higher working frequency and larger output current can be obtained.
The grid is of a T-shaped structure. The method has the advantages that the length of the grid is reduced, and simultaneously, lower grid resistance is obtained, so that the transistor has high frequency and high power.
Drawings
Fig. 1 is a schematic structural diagram of a first embodiment of the gallium oxide-based integrated device according to the present invention.
Fig. 2 is a schematic structural diagram of a second embodiment of the gallium oxide-based integrated device according to the present invention.
Fig. 3 is a schematic structural diagram of a third embodiment of the gallium oxide-based integrated device according to the present invention.
Fig. 4 is a schematic structural diagram of a fourth embodiment of the gallium oxide-based integrated device according to the present invention.
Fig. 5 is a top view of a piezoelectric resonator region of the present invention.
Reference numerals: 101-substrate, 102-buffer layer, 103-gallium oxide layer, 104-channel layer, 105-barrier layer, 106-first electrode, 107-second electrode, 108-gate, 109-drain, 110-source.
Detailed Description
Example one
As shown in fig. 1, the integrated device based on gallium oxide of the present invention integrates a piezoelectric resonator and a transistor at the same time, and mainly includes a substrate (101), a buffer layer (102), and a gallium oxide layer (103) stacked from bottom to top. One side of the gallium oxide layer (103) is a transistor area, and the other side is a piezoelectric resonator area. The embodiment of the present invention is described by taking the structure of the field effect transistor as an example, and the conversion of the transistor type by those skilled in the art under the inventive concept is a known means without creative work.
The gallium oxide layer (103) is laminated on a channel layer (104) on the upper surface of the transistor area, and a source electrode (110), a grid electrode (108) and a drain electrode (109) are respectively arranged on the upper surface of the channel layer (104) to form a field effect transistor. Wherein the source (110) is proximate to the piezoelectric resonator region, the drain (109) is distal to the piezoelectric resonator region, and the gate (108) is disposed between the source (110) and the drain (109). In order to improve the high frequency and high power performance of the device, the gate (108) is arranged in a T-shaped structure and is closer to the source (110) and far away from the drain (109). And a through hole vertically penetrating through each layer is formed from the channel layer (104) to the substrate (101) below the source electrode (110), electrode metal is filled in the through hole, and the source electrode (110) is led out of the bottom of the substrate (101).
The gallium oxide layer (103) is provided with a first electrode (106) electrically connected with the piezoelectric resonator region on the upper surface of the piezoelectric resonator region. The substrate (101) and the buffer layer (102) are hollowed out by etching at the position below the first electrode (106) to form a cavity, and the position corresponding to the lower surface of the gallium oxide layer (103) is exposed. The exposed lower surface of the gallium oxide layer (103) is provided with a second electrode (107) which is electrically connected with the gallium oxide layer to form the piezoelectric resonator. The second electrode (107) is connected with electrode metal led out from the bottom of the substrate (101) into a whole through a lead, and the second electrode (107) is directly contacted with the source electrode (110), so that the technical scheme that the piezoelectric resonator and the transistor are integrated in one chip at the same time is realized. The first electrode (106) and the second electrode (107) form the electrode pair and are used for realizing electromechanical coupling with the gallium oxide layer (103). The materials of the substrate (101) and the buffer layer (102) are still remained around the cavity, because the buffer layer has weak piezoelectric property and is in an amorphous or polycrystalline structure, which hardly contributes to piezoelectric conversion and can cause absorption of acoustic oscillation energy. The arrangement of the cavity can effectively reduce the negative influence of the buffer layer on the sound wave, so that the electromechanical coupling coefficient of the piezoelectric resonator area is higher.
Preferably, the thickness of the gallium oxide layer (103) is 0.1um to 20um, and the gallium oxide layer is composed of single-crystal-phase gallium oxide. The constituent material of the substrate may be sapphire, silicon, or silicon carbide. The channel layer (104) may be comprised of a gallium oxide material.
The working principle of the invention is that the piezoelectric resonator realizes electromechanical coupling of radio frequency on the gallium oxide layer (103) through piezoelectric effect so as to complete filtering, and the filtered electric signal is amplified as required through the transistor in the same chip. The input and output of electric signals are realized by the electrode pairs respectively arranged on the upper surface and the lower surface by utilizing the longitudinal piezoelectric effect, and the piezoelectric ceramic has the advantages of strong piezoelectric effect and small loss.
The monolithic integration of the radio frequency signal amplification circuit and the radio frequency filter in the radio frequency front end is realized, and the radio frequency signal amplification circuit has the advantages of high performance, low loss, high reliability, small size and low cost. In addition, the integrated device is compatible with the preparation process of the conventional gallium oxide electronic device, and the method is simple and reliable, so that the low cost is ensured.
Example two
As shown in fig. 2, the present embodiment is different from the first embodiment mainly in that a barrier layer (105) is further stacked above the channel layer (104), and the barrier layer (105) may be made of an aluminum gallium oxide material. The source electrode (110), the grid electrode (108) and the drain electrode (109) are arranged above the barrier layer (105), and the relative positions in the transverse direction are the same as those of the first embodiment. The barrier layer (105) is provided to improve the channel carrier concentration and mobility of the transistor, thereby achieving a higher operating frequency and a larger output current.
EXAMPLE III
As shown in fig. 3, the present embodiment is different from the first embodiment mainly in that a through hole penetrating vertically is not provided, and the second electrode (107) and the first electrode (106) are interdigitated electrodes and are simultaneously provided on the upper surface of the gallium oxide layer (103). One end of the second electrode (107) is directly connected to the source electrode (110) through an electrode metal. The interdigitated electrode structure is shown in fig. 5.
The difference between the working principle of the present embodiment and the embodiment is that the input and output of the electrical signal are realized by the electrode pair located on the upper surface of the piezoelectric film by using the transverse piezoelectric effect, which has the advantages of simple structure and few preparation process steps.
Example four
As shown in fig. 4, the present embodiment is different from the third embodiment mainly in that a barrier layer (105) is further stacked above the channel layer (104), and the barrier layer (105) may be composed of an aluminum gallium oxide material. The source electrode (110), the grid electrode (108) and the drain electrode (109) are arranged above the barrier layer (105), and the relative positions in the transverse direction are the same as those of the embodiment. The barrier layer (105) is provided to improve the channel carrier concentration and mobility of the transistor, thereby achieving a higher operating frequency and a larger output current.
It will be apparent to those skilled in the art that various other changes and modifications may be made in the above-described embodiments and concepts and all such changes and modifications are intended to be within the scope of the appended claims.

Claims (9)

1. An integrated device based on gallium oxide comprises a piezoelectric resonator area and a transistor area which are arranged in parallel; the piezoelectric gallium oxide resonator is characterized in that the transistor area and the piezoelectric resonator area are arranged on two sides of the same gallium oxide layer (103), the gallium oxide layer (103) is provided with an electrode pair in the piezoelectric resonator area, the electrode pair is electrically connected with the gallium oxide layer (103), and any electrode in the electrode pair is electrically connected with a source electrode (110) in the transistor area.
2. The gallium oxide-based integrated device according to claim 1, wherein the gallium oxide layer (103) has a thickness of 0.1um to 20 um.
3. The gallium oxide-based integrated device according to claim 1, wherein the gallium oxide layer (103) is composed of single-phase gallium oxide.
4. The gallium oxide-based integrated device according to claim 1, wherein the electrode pair comprises a first electrode (106) and a second electrode (107), the first electrode (106) is disposed on the upper surface of the gallium oxide layer (103), and the second electrode (107) is disposed on the lower surface of the gallium oxide layer (103); the transistor area is provided with a through hole which is arranged below the source electrode (110) and penetrates to the bottom of the device; at least one end of the second electrode (107) penetrates through the through hole and is electrically connected with the source electrode (110).
5. The integrated device based on gallium oxide according to claim 1, wherein the electrode pair comprises a first electrode (106) and a second electrode (107) that are interdigitated electrodes, the first electrode (106) and the second electrode (107) are disposed on the upper surface of the gallium oxide layer (103), and at least one end of the second electrode (107) extends into the transistor region and is electrically connected to the source electrode (110).
6. An integrated device based on gallium oxide according to any one of claims 1 to 5, characterized in that a substrate (101), a buffer layer (102), a gallium oxide layer (103) are stacked in this order from bottom to top; the buffer layer (102) and the substrate (101) are provided with cavities in the piezoelectric resonator area, and the gallium oxide layer (103) is provided with electrode pairs at the corresponding positions of the cavities; the upper surface of the gallium oxide layer (103) is also provided with a channel layer (104) in a transistor area in a stacking mode, one end, close to the piezoelectric resonator area, of the upper surface of the channel layer (104) is provided with a source electrode (110), the other end of the upper surface of the channel layer is provided with a drain electrode (109), and a grid electrode (108) is arranged between the source electrode (110) and the drain electrode (109).
7. An integrated device based on gallium oxide according to claim 6, wherein the gate (108) is located at a distance from the source (110) less than the distance from the drain (109).
8. The gallium oxide-based integrated device according to claim 6, wherein the channel layer (104) further comprises a barrier layer (105) on the upper surface thereof under the source electrode (110), the gate electrode (108), and the drain electrode (109).
9. The gallium oxide-based integrated device according to claim 6, wherein the gate (108) is a T-shaped structure.
CN202010382774.0A 2020-05-08 2020-05-08 Integrated device based on gallium oxide Pending CN111446270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010382774.0A CN111446270A (en) 2020-05-08 2020-05-08 Integrated device based on gallium oxide

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010382774.0A CN111446270A (en) 2020-05-08 2020-05-08 Integrated device based on gallium oxide

Publications (1)

Publication Number Publication Date
CN111446270A true CN111446270A (en) 2020-07-24

Family

ID=71652145

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010382774.0A Pending CN111446270A (en) 2020-05-08 2020-05-08 Integrated device based on gallium oxide

Country Status (1)

Country Link
CN (1) CN111446270A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111640857A (en) * 2020-07-20 2020-09-08 中山大学 Application of gallium oxide in piezoelectric material, piezoelectric film and piezoelectric device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110085658A (en) * 2019-04-24 2019-08-02 中山大学 Gallium oxide semiconductor and preparation method thereof
CN110380702A (en) * 2019-07-25 2019-10-25 深圳市汇芯通信技术有限公司 Integrated device manufacturing method and Related product
CN110931433A (en) * 2019-10-22 2020-03-27 深圳市汇芯通信技术有限公司 Integrated device manufacturing method and related product

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110085658A (en) * 2019-04-24 2019-08-02 中山大学 Gallium oxide semiconductor and preparation method thereof
CN110380702A (en) * 2019-07-25 2019-10-25 深圳市汇芯通信技术有限公司 Integrated device manufacturing method and Related product
CN110931433A (en) * 2019-10-22 2020-03-27 深圳市汇芯通信技术有限公司 Integrated device manufacturing method and related product

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111640857A (en) * 2020-07-20 2020-09-08 中山大学 Application of gallium oxide in piezoelectric material, piezoelectric film and piezoelectric device

Similar Documents

Publication Publication Date Title
CN112532195B (en) Passive cavity type single crystal film bulk acoustic resonator structure and preparation method thereof
CN105684308B (en) Elastic wave device, filter element and communication device
CN205195673U (en) Wafer -level package device
US8502235B2 (en) Integrated nitride and silicon carbide-based devices
US7898047B2 (en) Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices
CN111245397A (en) Bulk acoustic wave resonator, method of manufacturing bulk acoustic wave resonator, bulk acoustic wave resonator unit, filter, and electronic apparatus
CN110113026B (en) Two-dimensional lamb wave resonator
US20050269904A1 (en) Thin film bulk acoustic resonator and method of manufacturing the same
US20210234531A1 (en) Film bulk acoustic resonator and fabrication method thereof
KR20000076295A (en) Thin film piezoelectric element
CN105811914B (en) A kind of bulk acoustic wave device, integrated morphology and manufacturing method
CN105703736B (en) A kind of bulk acoustic wave device and integrated morphology
WO2021077716A1 (en) Bulk acoustic resonator, filter, and electronic device
WO2022143286A1 (en) Single-crystal acoustic resonator, filter, and electronic device
CN105141278B (en) The amplification module that a kind of transistor is integrated with thin film bulk acoustic wave resonator
CN104158503A (en) X-waveband power amplifier based on GaN
CN111446270A (en) Integrated device based on gallium oxide
US11942916B2 (en) Fabricating method of film bulk acoustic resonator
US20220029605A1 (en) Surface acoustic wave resonator and multiplexer including the same
CN111510100B (en) Piezoelectric resonator based on gallium oxide film and preparation method thereof
WO2022188779A1 (en) Resonator and manufacturing method therefor, filter, and electronic device
CN113659953B (en) Bulk acoustic wave resonator assembly, manufacturing method and communication device
CN114584096A (en) High-bandwidth silicon reverse side etching type film bulk acoustic resonator and preparation method thereof
CN110540169B (en) Device and method for monolithic integration of FBAR filter and amplifier or switch
CN106253873A (en) A kind of FBAR harmonic tuning amplification module

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20210323

Address after: 201699 G08, 7th floor, building 11, 1569 Yushu Road, Songjiang District, Shanghai

Applicant after: Shanghai Youdian Semiconductor Technology Co.,Ltd.

Address before: 510275 Zhongshan University, 135 West Xingang Road, Guangdong, Guangzhou, Haizhuqu District

Applicant before: SUN YAT-SEN University

RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20200724