CN111404391A - Positive-shock active clamping driving circuit - Google Patents

Positive-shock active clamping driving circuit Download PDF

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Publication number
CN111404391A
CN111404391A CN202010332247.9A CN202010332247A CN111404391A CN 111404391 A CN111404391 A CN 111404391A CN 202010332247 A CN202010332247 A CN 202010332247A CN 111404391 A CN111404391 A CN 111404391A
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pin
control chip
comparator
voltage
capacitor
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Inventor
涂才根
张胜
谭在超
罗寅
丁国华
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Suzhou Covette Semiconductor Co ltd
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Suzhou Covette Semiconductor Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0048Circuits or arrangements for reducing losses
    • H02M1/0054Transistor switching losses
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention relates to a forward active clamping driving circuit, which comprises a control chip, a forward transformer, a main switching tube, an active clamping capacitor and two synchronous rectifier tubes, wherein a VIN pin of the control chip is connected with a VIN power supply. In addition, the voltages at the two ends of the primary winding of the forward transformer are in regular square wave shapes in each switching period, so that regular square waves are generated at the two ends of the secondary winding, the square wave voltages of the secondary winding can be used for driving the two synchronous rectifier tubes, a special synchronous rectification driving circuit is not required to be designed, the design is simplified, and the cost is reduced.

Description

Positive-shock active clamping driving circuit
Technical Field
The invention relates to the technical field of power management, in particular to an active clamp driving circuit based on a forward converter.
Background
The converter has a obvious weakness that a reset circuit is required to be added to demagnetize the transformer during the turn-off period of a main switching tube so as to prevent the transformer from being saturated magnetically, however, the conventional demagnetization means mainly comprises a third reset winding technology, a lossless L CD clamping technology and an RCD clamping technology, but the three technologies have respective disadvantages, such as the third reset winding technology is complex to manufacture and bears large voltage stress on the main switching tube, the current stress and on-state loss of the main switching tube of the L CD clamping technology are large, so that the system efficiency is low, and the RCD clamping technology consumes a large part of energy in the demagnetization process, so that the system efficiency is low.
Disclosure of Invention
The invention aims to provide a forward active clamping driving circuit which is novel, simple and practical in structure, a clamping branch is added on a traditional forward converter, the branch is formed by connecting an active clamping capacitor and an active clamping switch tube in series, a main switch tube and the active clamping switch tube utilize a specially designed driving module circuit (the realization of a driving module only needs to amplify step by step), and the framework can be adopted to well realize the large duty ratio and the high efficiency of a system and facilitate the design of a forward transformer.
In order to achieve the purpose, the invention adopts the technical scheme that the forward active clamp driving circuit comprises a control chip, a forward transformer, a main switching tube, an active clamp capacitor, a first synchronous rectifier tube, a second synchronous rectifier tube, an output inductor, an isolation module and an output capacitor, wherein a VIN pin of the control chip is connected with a VIN power supply, two ends of a primary winding of the forward transformer are respectively connected with the VIN power supply and a drain electrode of the main switching tube, two ends of a secondary winding of the forward transformer are connected with the first synchronous rectifier tube and the second synchronous rectifier tube, two ends of the output inductor are respectively connected with the secondary winding of the forward transformer and a circuit output end VOUT, the output capacitor is connected between the circuit output end and the ground in series, particularly, the positive end of the output capacitor is connected with the circuit output end, the negative end of the output capacitor is connected with the ground, the circuit output end is connected with a COMP pin and a, the grid of the main switch tube is connected with an OUTA pin of the control chip, the source of the main switch tube is connected with a CS1 pin of the control chip, the anode of the active clamping capacitor is connected with the drain of the main switch tube, the cathode of the active clamping capacitor is connected with the source of the active clamping switch tube, the grid of the active clamping switch tube is connected with an OUTB pin of the control chip, the drain of the active clamping switch tube is grounded, the GND pin of the control chip is grounded, a first external resistor and a first external capacitor are connected between a VIN power supply and the ground in series, the RAMP pin of the control chip is connected between the first external resistor and the first external capacitor, and a second external resistor is connected between the RT pin of the control chip and the ground in series.
As an improvement of the invention, the invention also comprises a current sampling resistor, a first voltage dividing resistor, a second voltage dividing resistor, a third voltage dividing resistor, a first diode and a second diode, wherein the current sampling resistor is arranged on a main switch branch circuit, the current sampling resistor is connected between the source electrode of a main switch tube and the ground in series, the CS1 pin of a control chip is connected between the source electrode of the main switch tube and the current sampling resistor, the first voltage dividing resistor and the second voltage dividing resistor are voltage dividing resistors for controlling the voltage of a COMP pin of the chip, one end of the first voltage dividing resistor and the second voltage dividing resistor are connected in series and then connected with the output end of the isolation module, the other end of the first voltage dividing resistor and the second voltage dividing resistor are connected, the CS2 pin of the control chip is connected between the first voltage dividing resistor and the second voltage dividing resistor, the output sampling network is connected between the input end of the isolation module and the output end of the circuit, the output sampling network is formed by connecting two resistors in series, the anode of the capacitor pump is connected with the OUTB pin of the control chip, the cathode of the capacitor pump is connected with the grid electrode of the active clamping switch tube, the second externally-hung capacitor is connected between the VCC pin of the control chip and the ground in series, the third externally-hung capacitor is connected between the COMP pin of the control chip and the ground in series, the first diode is connected between the VCC pin of the control chip and an auxiliary winding coupled with the output inductor in series, and the second diode is connected between the grid electrode and the drain electrode of the active clamping switch tube in series.
As an improvement of the invention, a voltage regulation module, an internal power supply/bias/enable module, a first driving module, a second driving module, an oscillator, a switch MOS tube, a logic module, an RS trigger, a first comparator, a second comparator, an OR gate, two pull-down MOS tubes are arranged in the control chip, a VIN pin is connected with the input end of the voltage regulation module, the output end of the voltage regulation module is connected with a VCC pin and the internal power supply/bias/enable module, the internal power supply/bias/enable module supplies power, enables and biases to each module in the control chip, the VCC supplies power to the first driving module and the second driving module, the input end of the oscillator is connected with an RT pin, the oscillator determines the switching frequency of the control chip, the output end of the oscillator is connected with the input end of the logic module and the S end of the RS trigger, the grid electrodes of the switch MOS tube, the R end of the RS trigger and the grid electrodes of the two pull-down MOS tubes are connected with the output end of the, the output ends of the RS trigger are respectively connected with the input ends of the first drive module and the second drive module, the output ends of the first drive module and the second drive module are respectively connected with an OUTA pin and an OUTB pin, the source electrode of the switch MOS tube is connected with a RAMP pin, the forward input ends of the first comparator and the second comparator are connected with a RAMP pin, the reverse input end of the first comparator is connected with a COMP pin, the reverse input end of the second comparator is connected with 3.5V reference voltage, the forward input ends of the third comparator and the fourth comparator are respectively connected with a CS1 pin and a CS2 pin, the reverse input ends of the third comparator and the fourth comparator are respectively connected with 0.5V reference voltage, and the output ends of the first comparator to the fourth comparator are respectively connected with the input end of an OR gate, the output end of the OR gate is connected with the input end of the logic module, the positive direction input ends of the third comparator and the fourth comparator are respectively connected with the source electrodes of the two pull-down MOS tubes, and the drain electrodes of the two pull-down MOS tubes are grounded.
As an improvement of the invention, the value range of the VIN power supply is 30-100V, and the value range of the VCC power supply is 8-15V.
As an improvement of the invention, the main switch tube is an NMOS tube, and the active clamping switch tube is a PMOS tube.
As a modification of the present invention, the isolation module is composed of a T L431 and an optical coupler.
As an improvement of the invention, the first comparator is a loop comparator, the second comparator is a volt-second clamp comparator, the third comparator is a main switch branch overcurrent protection comparator, and the fourth comparator is an output voltage undervoltage protection comparator.
As an improvement of the present invention, the input voltage of the RAMP pin of the control chip is a RAMP voltage, and the peak value of the RAMP voltage is 3.5V.
As an improvement of the present invention, when the VIN power supply is constant, the maximum on-time (i.e. duty ratio) of the circuit system is determined by the values of the first external resistor and the first external capacitor, and the duty ratio of the system can be greater than 0.5.
As an improvement of the invention, the first and second synchronous rectifier tubes are NMOS tubes.
Compared with the prior art, the circuit has the advantages that the overall structural design is ingenious, the structure is novel, simple and practical, a clamping branch is added on a traditional forward converter, the branch is formed by connecting an active clamping capacitor and an active clamping switch tube in series, the main switch tube and the active clamping switch tube are driven by a driving circuit specially designed in a control chip, and the design of a system large duty ratio, high efficiency and convenience for designing a forward transformer can be well realized. In addition, the voltages at the two ends of the primary winding of the forward transformer are in regular square wave shapes in each switching period, so that regular square waves are generated at the two ends of the secondary winding, the square wave voltages of the secondary winding can be used for driving the two synchronous rectifier tubes, a special synchronous rectification driving circuit is not required to be designed, the design is simplified, and the cost is reduced.
Drawings
Fig. 1 is an architecture diagram of a forward active clamp driver circuit according to a preferred embodiment of the present invention.
Fig. 2 is a waveform diagram of the main signals of the forward active clamp driving circuit according to the preferred embodiment of the present invention.
Detailed Description
For a better understanding and appreciation of the invention, it is further described and illustrated below in connection with the accompanying drawings.
The forward active clamp driving circuit of the preferred embodiment shown in fig. 1 is an active clamp forward converter, and a clamping branch is added to a conventional forward converter, and the clamping branch is formed by connecting an active clamp capacitor and an active clamp switching tube in series, and the main switching tube and the active clamp switching tube are driven by a specially designed driving circuit, that is, the main switching tube and the active clamp switching tube are driven by respective independent driving modules (the driving design only needs to adopt conventional multi-stage inverter amplification).
The control chip IC is a forward drive chip for performing magnetic reset by active clamp, the VIN pin of the control chip IC is connected with the VIN power supply, two ends of the primary winding of a forward transformer T1 are respectively connected with the VIN power supply and the drain of a main switch tube N1, two ends of the secondary winding of the forward transformer T1 are connected with a first synchronous rectifier tube N2 and a second synchronous rectifier tube N3, two ends of an output inductor L are respectively connected with the secondary winding of the forward transformer T1 and the output end VOUT of a circuit, an output capacitor Cout is connected between the output end of the circuit and the ground in series, specifically, the positive end of the output capacitor Cout is connected with the output end of the circuit, the negative end of the output capacitor L is connected with the COMP pin and the CS2 pin of the control chip IC through an Isolation module EA & Isolation, the gate of the main switch tube N1 is connected with the OUTA pin of the control chip IC, the source of the main switch tube N1 is connected with the source of the control chip Cout 1 pin of the control chip, the CS1 pin of the control chip is connected with the drain of the active clamp switch tube P1 and the drain of the active clamp C1, the drain of the first clamp IC are connected with the drain of the switch tube C4624, the drain of the first clamp transistor C, the switch C4624, the drain of the switch C of the switch transistor C465, the switch C is connected with the drain of the external clamp transistor C, the drain of the switch C of the switch transistor C, the switch transistor C4624, the switch transistor C of the switch transistor C, the switch C4624, the switch C of the switch transistor C of the switch.
The control chip IC has a CS1 pin connected between the Source of the main switch tube N1 and the current sampling resistor R3, first and second voltage dividing resistors R5 are voltage dividing resistors of a COMP pin of the control chip, the first and second voltage dividing resistors R5 are connected in series, one end of the first and second voltage dividing resistors is connected with an output end of the Isolation module EA & Isolation, the other end of the first and second voltage dividing resistors is grounded, the COMP pin of the control chip IC is connected between an output end of the Isolation module EA & Isolation and first and second voltage dividing resistors R5R4, a CS2 pin of the control chip IC is connected between the first and second voltage dividing resistors R2, therefore, whether the voltage of the COMP pin of the control chip IC is too high or not can be detected at the pin of the CS2, the CSS 2 pin is connected to the output end of the circuit, namely whether an overload phenomenon occurs at the output end of the CSS 2 pin, an output network of the CSS 2 is connected between the output terminal of the Isolation chip IC and the output terminal of the switch of the Isolation module, the CSS 2, the switch, the output terminal of the CSS 2 is connected between the output terminal of the switch, the output terminal of the switch IC is connected between the switch, the switch of the switch, the switch of the switch IC 72, the switch is connected between the switch, the switch of the switch, the switch is connected between the switch of the switch, the switch of the switch is connected between the switch, the switch is connected between the switch, the switch of the switch, the switch of the switch, the switch of the switch is connected between the switch of.
Further, a voltage regulation module, an internal power supply/BIAS/enable module (L DO/BIAS/UV L O in the drawing), a first and a second driving module, an oscillator, a switch MOS, a logic module, an RS flip-flop, a first to a fourth comparator, an or gate, and two pull-down MOS transistors are provided inside the control chip IC, the voltage regulation module is used to convert a high voltage VIN into a medium voltage power VCC available inside the control chip IC, the VIN range is 30-100V, the VIN pin is connected to the input terminal of the voltage regulation module, the output terminal of the voltage regulation module is connected to a VCC pin and a DO/BIAS/UV L O module, L DO/BIAS/UV L O module is used to generate a low voltage power required inside the IC, various voltages, current biases, and enable signals of each module working, and supply power, enable and BIAS to each module inside the control chip IC, and determine the start voltage and under-voltage of VCC, which are supplied to the first and second VCC driving modules, the VCC range is set as the same-phase voltage, the same as the voltage of the first and the second VCC driving module, the same-voltage output terminal of the switch MOS, the switch MOS transistor is connected to the gate of the output terminal of the switch MOS 23, the output terminal of the gate of the switch MOS, the switch MOS transistor, the gate of the switch MOS transistor, the switch transistor, the switch, the.
The first comparator, the second comparator, the third comparator, the fourth comparator, the third comparator and the fourth comparator are used for controlling the turn-off of the control chip IC, wherein the forward input ends of the first comparator and the second comparator are connected with a RAMP pin, the reverse input end of the first comparator is connected with a COMP pin, the reverse input end of the second comparator is connected with a 3.5V reference voltage, the forward input ends of the third comparator and the fourth comparator are respectively connected with a CS1 pin and a CS2 pin, the reverse input ends of the third comparator and the fourth comparator are respectively connected with a 0.5V reference voltage, the output ends of the first comparator, the second comparator and the fourth comparator are respectively connected with the input ends of an OR gate, the output end of the OR gate is connected with the input end of a logic module, the forward input ends of the third comparator and the fourth comparator are respectively connected with the source electrodes of two pull-down MOS tubes.
The first comparator is a loop comparator, the RAMP is a voltage obtained by charging the VIN power supply to the first externally-connected capacitor C1 through the first externally-connected resistor R1, the voltage is a RAMP voltage, and when the RAMP voltage is higher than the COMP voltage, the control chip IC is controlled to be turned off. The second comparator is a volt-second clamp comparator, which limits the peak value of RAMP voltage of RAMP to 3.5V, and when RAMP reaches 3.5V, it will be reset immediately, so the waveform of RAMP voltage is shown as triangular wave in the figure. The third comparator is a main switch branch overcurrent protection comparator, and the fourth comparator is an output voltage undervoltage protection comparator. Where CS1 and CS2 are reset by the pull-down NMOS after each switch is completed.
Furthermore, the main switch tube N1 is an NMOS tube, and the active clamp switch tube P1 is a PMOS tube.
Further, the Isolation module EA & Isolation is composed of T L431 and an opto-coupler.
Furthermore, the first synchronous rectifier N2 and the second synchronous rectifier N3 both use NMOS transistors.
Specifically, the capacitor pump C3 and the second diode D2 are used to turn on or off the active clamp switching tube P1, for example, when the pin output of the control chip icotb is high, the Gate terminal (Gate terminal) of the active clamp switching tube P1 is raised to 0.7V by the capacitor pump C3 and the second diode D2, and for the active clamp switching tube P1, the Source voltage is 0V, the Gate voltage is 0.7V, and the active clamp switching tube P1 is turned off; when the output of the control chip icotb pin is low, the gate terminal of the active clamp switch P1 can be lowered to-VCC (usually-8V to-15V) by the capacitor pump C3, and the active clamp switch P1 is turned on.
The working principle is as follows:
firstly, from the topological structure of the whole circuit:
in the conducting stage of the main switch tube N1, the active clamping switch tube P1 is turned off, the leakage voltage of the main switch tube N1 is almost zero, and the voltage of the active clamping capacitor C5 is lowerThe voltage of the polar plate is-VC5The primary winding current increases and the RAMP voltage increases, while on the secondary side, winding L s is positive and negative, with the voltages at the two ends:
Figure DEST_PATH_IMAGE001
the first synchronous rectifier tube N2 is turned on, the second synchronous rectifier tube N3 is turned off, the winding power supply charges the output inductor L, and the winding power supply, the output inductor L, the output load and the first synchronous rectifier tube N2 form a loop.
After the main switching tube N1 is turned off, the active clamp switching tube P1 is turned on, the winding L P current charges the parasitic capacitor of the main switching tube N1, the L P current continues to increase before the leakage current voltage of the main switching tube N1 rises to VIN, when the leakage current voltage of the main switching tube N1 is higher than the electromotive force of the main switching tube N L P after VIN, the electromotive force is reversed, the current direction is from the power VIN to the ground through L P, the active clamp capacitor C5 and the active clamp switching tube P1, the current is gradually reduced, the plate voltage under the active clamp capacitor C5 is almost zero, and the upper plate voltage is VC5On the secondary side, the winding L s is negative and positive, the first synchronous rectifier N2 is turned off, the second synchronous rectifier N3 is turned on, the electromotive force of the output inductor L reverses, and the discharge provides energy to the output.
Therefore, for the secondary side, which is a BUCK structure, the output voltage can be expressed as:
Figure 193371DEST_PATH_IMAGE002
and D is the duty cycle. The voltage of the active clamp capacitor C5 can be expressed by the primary winding according to volt-second law as:
Figure 844932DEST_PATH_IMAGE004
the resistors R6 and R7 form a sampling network for outputting VOUT, if VOUT is low, COMP pull-down current of the optocoupler assembly to the control chip IC becomes low, COMP voltage rises, the duty ratio of a system is increased, more energy is transmitted to the output, the VOUT voltage rises, and therefore a constant voltage loop is achieved, and vice versa.
Secondly, from the perspective of the control chip IC:
the method comprises the steps that after a VIN power supply is electrified, a Regulator module generates a medium-voltage power supply VCC (generally 8-15V) for a control chip IC, the power supply is mainly used for driving, the VCC power supply generates various references, biases and enables through a L DO/BIAS/UV L O module, and after the enable is generated, other modules can work.
The control chip IC is controlled to turn off by comparing RAMP and COMP, but when COMP voltage is higher than 3.5V, the control chip IC can only be controlled to turn off by the inversion of the second comparator, and the inversion of the second comparator actually controls the maximum on-time (Ton _ max), so Ton _ max is actually determined by the external resistor and capacitor of RAMP pin, and the principle of charging and discharging the capacitor can be obtained:
VIN*Ton_max=3.5*R1*C1
according to the formula, when VIN is fixed, the maximum on-time (or duty ratio) is determined by the external first external resistor R1 and the first external capacitor C1, so that the system duty ratio D can be greater than 0.5, and a large turn ratio can be realized in the design of the transformer. In connection with the aforementioned voltage formula of the active clamp capacitor C5, the maximum voltage of the active clamp capacitor C5 is easy to control, so that when the type selection main switch tube N1, the active clamp switch tube P1 and the active clamp capacitor C5 are selected according to the voltage withstanding requirement, and the method is economical and safe.
Fig. 2 shows waveforms of the main signals, which are respectively COMP waveform, RAMP waveform, Drain end waveform of the main switching tube N1, current I L p waveform of the primary winding, and current waveform of the active clamp capacitor C5, COMP voltage is lower than 3.5V, and the control chip IC is turned off by comparing RAMP and COMP voltages.
time t 0-t 1: the control chip IC starts to be conducted, the RAMP voltage starts to rise in a slope mode from 0V, the main switching tube N1 is in a conducting state, the Drain voltage is 0V, the electromotive force of a primary winding is positive, negative and positive at the moment, the current path flows from a parasitic diode of the main switching tube N1 to the primary winding and then to the VIN power supply, and therefore the current is gradually reduced;
t 1-t 2, after the current of the primary winding is reduced to 0, the current path is from the power supply VIN to the primary winding and then to the main switching tube N1, at the moment, the current continuously rises, the RAMP voltage also rises during the period until the RAMP voltage exceeds the COMP voltage, the main switching tube N1 is turned off, and the current of the primary winding rises to the highest value I L p _ max;
t 2-t 3: the main switch tube N1 is turned off, the active clamp switch tube P1 is turned on, the current of the primary winding can continue to flow because the current of the primary winding can not change suddenly, at the moment, the current path is from the VIN power supply to the active clamp capacitor C5 through the primary winding and then to the active clamp switch tube P1, and the current on the winding is the current on the capacitor. For the primary winding, the upper end voltage is VIN, the lower end voltage is VC5, and usually VC5 is greater than VIN, so the electromotive force of the winding is negative at the top and positive at the bottom, and the current tends to be gradually reduced;
t 3-t 4: at the time of t3, the current of the primary winding is reduced to 0, the electromotive force of the primary winding is still negative at the top and positive at the bottom, the current path flows from the active clamping switch tube P1 to the active clamping capacitor C5, and then flows to the VIN power supply through the primary winding, and the current is increased;
t 4-t 5: at the time of t5, the main switch tube N1 is switched on, the active clamp switch tube P1 is switched off, a new current path is generated because the current of the primary winding cannot change suddenly, and the current flows to the primary winding from a parasitic diode of the main switch and then to the VIN power supply; thereby repeating a new switching cycle.
From the waveform of fig. 2, the Drain terminal voltage of the main switching tube N1 is in a regular square wave shape, that is, the voltage at both ends of the primary winding is in a regular square wave shape in each period, so that regular square waves are generated at both ends of the secondary winding, and for the first synchronous rectifier tube N2 and the second synchronous rectifier tube N3, the square wave voltage of the secondary winding can be used for driving, and a synchronous rectification driving circuit does not need to be specially designed, thereby simplifying the design and reducing the cost.
The technical means disclosed in the invention scheme are not limited to the technical means disclosed in the above embodiments, but also include the technical scheme formed by any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and such improvements and modifications are also considered to be within the scope of the present invention.

Claims (10)

1. A forward active clamp drive circuit, characterized by: the positive voltage regulator comprises a control chip, a forward transformer, a main switching tube, an active clamping capacitor, a first synchronous rectifier tube, a second synchronous rectifier tube, an output inductor, an isolation module, an output capacitor and a VIN pin of the control chip, wherein two ends of a primary winding of the forward transformer are respectively connected with the VIN power supply and a drain electrode of the main switching tube, two ends of a secondary winding of the forward transformer are respectively connected with a first synchronous rectifier tube and a second synchronous rectifier tube, two ends of the output inductor are respectively connected with the secondary winding of the forward transformer and a circuit output end VOUT, the output capacitor is connected between the circuit output end and the ground in series, the circuit output end is connected with a COMP pin and a CS2 pin of the control chip through the isolation module, a grid electrode of the main switching tube is connected with an OUTA pin of the control chip, a source electrode of the main switching tube is connected with a CS1 pin of the control chip, an anode of the active clamping capacitor is connected with the drain electrode, the grid electrode of the active clamping switch tube is connected with an OUTB pin of the control chip, the drain electrode of the active clamping switch tube is grounded, a GND pin of the control chip is grounded, a first external resistor and a first external capacitor are connected between a VIN power supply and the ground in series, a RAMP pin of the control chip is connected between the first external resistor and the first external capacitor, and a second external resistor is connected between an RT pin of the control chip and the ground in series.
2. The forward active clamp driving circuit according to claim 1, further comprising a current sampling resistor, first and second voltage dividing resistors, an output sampling network, a capacitor pump, a second external capacitor, a third external capacitor, first and second diodes, wherein the current sampling resistor is disposed in the main switch branch, specifically, the current sampling resistor is connected in series between the source of the main switch tube and ground, the CS1 pin of the control chip is connected between the source of the main switch tube and the current sampling resistor, the first and second voltage dividing resistors are voltage dividing resistors of the COMP pin voltage of the control chip, one end of the first and second voltage dividing resistors is connected to the output end of the isolation module, the other end is grounded, the COMP pin of the control chip is connected between the output end of the isolation module and the first voltage dividing resistor, the CS2 pin of the control chip is connected between the first and second voltage dividing resistors, the output sampling network is connected between the input end of the isolation module and the output end of the circuit, the anode of the capacitor pump is connected with the OUTB pin of the control chip, the cathode of the capacitor pump is connected with the grid electrode of the active clamping switch tube, the second externally-hung capacitor is connected between the VCC pin of the control chip and the ground in series, the third externally-hung capacitor is connected between the COMP pin of the control chip and the ground in series, the first diode is connected between the VCC pin of the control chip and the auxiliary winding coupled with the output inductor in series, and the second diode is connected between the grid electrode and the drain electrode of the active clamping switch tube in series.
3. A positive active clamp driving circuit as claimed in claim 2, wherein the control chip is internally provided with a voltage regulation module, an internal power/bias/enable module, a first and a second driving modules, an oscillator, a switching MOS transistor, a logic module, an RS trigger, a first to a fourth comparators, an OR gate, and two pull-down MOS transistors, wherein VIN pin is connected with the input end of the voltage regulation module, the output end of the voltage regulation module is connected with a VCC pin and the internal power/bias/enable module, the internal power/bias/enable module supplies power, enables and biases to the modules in the control chip, VCC supplies power to the first and the second driving modules, the input end of the oscillator is connected with an RT pin, the oscillator determines the switching frequency of the control chip, the output end of the oscillator is connected with the input end of the logic module and the S end of the RS trigger, the gate of the switch MOS tube, the R end of the RS trigger and the gates of the two pull-down MOS tubes are all connected with the output end of the logic module, the output end of the RS trigger is respectively connected with the input ends of the first drive module and the second drive module, the output ends of the first drive module and the second drive module are respectively connected with an OUTA pin and an OUTB pin, the source electrode of the switch MOS tube is connected with a RAMP pin, the forward input ends of the first comparator and the second comparator are connected with the RAMP pin, the reverse input end of the first comparator is connected with a COMP pin, the reverse input end of the second comparator is connected with a 3.5V reference voltage, the forward input ends of the third comparator and the fourth comparator are respectively connected with a CS1 pin and a CS2 pin, the reverse input ends of the third comparator and the fourth comparator are respectively connected with a 0.5V reference voltage, the output ends of the first comparator and the fourth comparator are respectively connected with the input end of an OR gate, the output end of the OR gate is connected with the input end of the logic module, the forward input ends of the third comparator and the, the drains of the two pull-down MOS tubes are grounded.
4. A forward active clamp driver circuit as claimed in any one of claims 1 to 3 wherein said VIN supply is of a value in the range 30 to 100V and said VCC supply is of a value in the range 8 to 15V.
5. The positive active clamp driver circuit of claim 4, wherein the input voltage to the RAMP pin of the control chip is a RAMP voltage, and the peak value of the RAMP RAMP voltage is 3.5V.
6. A forward active clamp drive circuit as claimed in claim 5 wherein said main switching transistor is NMOS transistor and said active clamp switching transistor is PMOS transistor.
7. A forward active clamp driver circuit as claimed in claim 6 wherein said isolation module is comprised of T L431 and optocouplers.
8. The forward active clamp driver circuit of claim 7 wherein said first and second synchronous rectifiers are NMOS transistors.
9. The positive active clamp driver circuit of claim 8, wherein the duty cycle of the circuitry is determined by the values of the first externally hanging resistor and the first externally hanging capacitor when the VIN power supply is constant, and the system duty cycle can be greater than 0.5.
10. The forward active clamp driver circuit of claim 9 in which the first comparator is a loop comparator, the second comparator is a volt-second clamp comparator, the third comparator is a main switch branch over-current protection comparator, and the fourth comparator is an output voltage under-voltage protection comparator.
CN202010332247.9A 2020-04-24 2020-04-24 Positive-shock active clamping driving circuit Pending CN111404391A (en)

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CN202010332247.9A CN111404391A (en) 2020-04-24 2020-04-24 Positive-shock active clamping driving circuit

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Application Number Priority Date Filing Date Title
CN202010332247.9A CN111404391A (en) 2020-04-24 2020-04-24 Positive-shock active clamping driving circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116094337A (en) * 2023-01-21 2023-05-09 天航长鹰(江苏)科技有限公司 Brick module power supply based on active clamp forward topology

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116094337A (en) * 2023-01-21 2023-05-09 天航长鹰(江苏)科技有限公司 Brick module power supply based on active clamp forward topology

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