CN111384083B - Pixel arrangement structure, display panel and display device - Google Patents
Pixel arrangement structure, display panel and display device Download PDFInfo
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- CN111384083B CN111384083B CN201811610691.1A CN201811610691A CN111384083B CN 111384083 B CN111384083 B CN 111384083B CN 201811610691 A CN201811610691 A CN 201811610691A CN 111384083 B CN111384083 B CN 111384083B
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
- H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
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Abstract
The application relates to a pixel arrangement structure, a display panel and a display device, wherein the pixel arrangement structure comprises a plurality of pixel units; the pixel unit comprises a first sub-pixel, a second sub-pixel and a third sub-pixel; a via hole setting area is also arranged in the pixel unit; the first sub-pixel, the second sub-pixel and the third sub-pixel are arranged around the hole setting area; the auxiliary electrode via hole is arranged in the via hole arrangement region, so that the first sub-pixel, the second sub-pixel and the third sub-pixel in the pixel unit are arranged around the auxiliary electrode formed in the auxiliary electrode via hole, and the first sub-pixel, the second sub-pixel and the third sub-pixel share one auxiliary electrode, so that the uniformity of voltage drop is improved, and the phenomenon of non-uniform light emission can be effectively improved.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a pixel arrangement structure, a display panel and a display device.
Background
With the continuous development of information technology, the importance of displays as visual information transmission media is further increasing, pushing the display toward lighter, thinner, lower power consumption, lower cost, and better image quality.
An Organic Light-Emitting Diode (OLED) display is one of many types of displays, and is a main direction of research on display devices at present due to the advantages of self-luminescence, fast response, wide viewing angle, high brightness, light weight, and the like. OLED displays can be classified into top-emitting OLED displays and bottom-emitting OLED displays, wherein the top-emitting OLED displays have become a research hotspot in recent years due to the larger aperture ratio available.
The top emission type OLED display often introduces an auxiliary electrode in communication with the top transparent electrode, but the conventional top emission type OLED display may block light of the light emitting layer during the process of arranging the auxiliary electrode, resulting in insufficient uniformity of light emission and affecting display quality.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a pixel arrangement structure, a display panel, and a display device that can effectively improve the phenomenon of uneven light emission.
A pixel arrangement structure includes a plurality of pixel units; the pixel unit comprises a first sub-pixel, a second sub-pixel and a third sub-pixel; a via hole setting area is also arranged in the pixel unit; the first sub-pixel, the second sub-pixel and the third sub-pixel are arranged around the hole setting area; auxiliary electrode via holes are arranged in the via hole setting area.
The pixel arrangement structure has at least the following advantages:
the pixel unit comprises a first sub-pixel, a second sub-pixel and a third sub-pixel; a via hole setting area is also arranged in the pixel unit; the first sub-pixel, the second sub-pixel and the third sub-pixel are arranged around the hole setting area; the auxiliary electrode via hole is arranged in the via hole arrangement region, so that the first sub-pixel, the second sub-pixel and the third sub-pixel in the pixel unit are arranged around the auxiliary electrode formed in the auxiliary electrode via hole, and the first sub-pixel, the second sub-pixel and the third sub-pixel share one auxiliary electrode, so that the uniformity of voltage drop is improved, and the phenomenon of non-uniform light emission can be effectively improved.
In one embodiment, the via hole arrangement region is further provided with a pixel electrode via hole, and the pixel electrode via hole and the auxiliary electrode via hole are arranged at intervals.
In one embodiment, the pixel electrode via includes a first pixel electrode via, a second pixel electrode via, and a third pixel electrode via;
the first pixel electrode via hole is arranged close to the first sub-pixel; the second pixel electrode via hole is arranged close to the second sub-pixel; the third pixel electrode via hole is arranged close to the third sub-pixel; and the first pixel electrode via hole, the second pixel electrode via hole and the third pixel electrode via hole are uniformly arranged around the via hole arrangement region.
In one embodiment, the auxiliary electrode via is disposed in the middle of the via arrangement region, and the distances between the auxiliary electrode via and the first, second and third sub-pixels are equal.
In one embodiment, the first, second and third sub-pixels are independently selected from the group consisting of red, green and blue sub-pixels, and the first, second and third sub-pixels are different from each other.
In one embodiment, in any two adjacent pixel units, at least one identical sub-pixel of the first sub-pixel, the second sub-pixel and the third sub-pixel is adjacently disposed.
In one embodiment, the pixel cells are triangular; any two adjacent pixel units are arranged in a central symmetry way;
or (b)
The pixel units are isosceles right triangles; any two adjacent pixel units are arranged in a mirror symmetry mode.
In one embodiment, the first sub-pixel, the second sub-pixel, the third sub-pixel and the via arrangement region are all triangular, and the first sub-pixel, the second sub-pixel, the third sub-pixel and the via arrangement region together form a triangular pixel unit.
In one embodiment, the first sub-pixel, the second sub-pixel, the third sub-pixel and the via arrangement region are triangular with the same shape.
In another aspect, a display panel is provided, including the pixel arrangement structure described above.
The display panel has at least the following advantages:
the display panel adopts the pixel arrangement structure, so that the first sub-pixel, the second sub-pixel and the third sub-pixel in one pixel unit share one auxiliary electrode when the display panel is manufactured, the uniformity of voltage drop is improved, and the phenomenon of non-uniform light emission can be effectively improved.
In one embodiment, the method further comprises:
the substrate base plate is used for bearing the pixel arrangement structure;
the auxiliary electrodes are correspondingly arranged in the auxiliary electrode through holes and are used for electrically connecting the transparent top electrodes; a kind of electronic device with high-pressure air-conditioning system
The pixel electrodes are correspondingly arranged on one side of the light emitting layer facing the substrate, and are electrically connected with the driving circuit through pixel electrode through holes.
Drawings
FIG. 1 is a first schematic diagram of a pixel unit of a pixel arrangement structure according to a first embodiment;
FIG. 2 is a second schematic diagram of a pixel unit of the pixel arrangement structure in the first embodiment;
FIG. 3 is a first schematic view of a pixel arrangement structure according to a first embodiment;
FIG. 4 is a second schematic view of the pixel arrangement structure of the first embodiment;
FIG. 5 is a schematic diagram of a pixel unit of a pixel arrangement structure according to a second embodiment;
FIG. 6 is a schematic diagram of a pixel arrangement structure according to a second embodiment;
FIG. 7 is a schematic diagram of a pixel unit of a pixel arrangement structure according to a third embodiment;
FIG. 8 is a schematic diagram of a pixel arrangement structure in a third embodiment;
FIG. 9 is a schematic diagram illustrating a pixel electrode via arrangement of a pixel arrangement structure according to an embodiment;
FIG. 10 is a schematic diagram illustrating the arrangement of pixel electrode vias of a pixel arrangement structure according to one embodiment;
FIG. 11 is a schematic diagram of a pixel unit of a pixel arrangement structure according to a fourth embodiment;
fig. 12 is a schematic diagram of a pixel unit of a pixel arrangement structure in a fifth embodiment;
fig. 13 is a schematic view of a pixel arrangement structure in a fifth embodiment;
fig. 14 is a schematic diagram of a pixel unit of a pixel arrangement structure in a sixth embodiment;
fig. 15 is a schematic view of a pixel arrangement structure in a seventh embodiment;
fig. 16 is a schematic view of a pixel arrangement structure in an eighth embodiment;
fig. 17 is a schematic structural diagram of a display panel according to an embodiment.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to and integrated with the other element or intervening elements may also be present. The terms "disposed," "one side," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
In order to solve the problem that the conventional top emission type OLED display may block the light of the light emitting layer during the process of arranging the auxiliary electrode, resulting in insufficient light emission and affecting the display quality, in one embodiment, as shown in fig. 1, a pixel arrangement structure is provided, which includes a plurality of pixel units 11;
the pixel unit 11 includes a first subpixel 111, a second subpixel 113, and a third subpixel 115; a via hole setting region 117 is also provided in the pixel unit 11; the first subpixel 111, the second subpixel 113, and the third subpixel 115 are disposed around the hole-disposing region 117; an auxiliary electrode via 119 is provided in the via-hole placement region 117.
Wherein, two arbitrary adjacent pixel units (two adjacent pixel units refer to pixel units with common edges) in each pixel unit are arranged according to rules. For example, the above rules may be axisymmetric, centrosymmetric, mirror symmetric, sequentially arranged in the column direction and the row direction, etc., and the specific rule may be determined according to actual manufacturing. The axisymmetry, the center symmetry, and the mirror symmetry refer to the symmetry of the shapes of the adjacent two pixel units 11, and if not specifically described, it is not limited whether the first subpixel 111, the second subpixel 113, and the third subpixel 115 in the adjacent two pixel units 11 are symmetrical. The pixel arrangement structure formed by splicing the plurality of pixel units 11 according to the rule is beneficial to uniformly dispersing the auxiliary electrodes formed in the auxiliary electrode via holes in the pixel arrangement structure, so that the voltage drop of the transparent top electrode of the display panel is reduced, the uniformity of the luminous brightness is improved, and the display uniformity is improved.
The shape of the pixel units may be selected according to practical requirements, in one example, as shown in fig. 1 and 2, the pixel units 11 are rectangular, the rectangular pixel units 11 are arbitrarily divided into a first sub-pixel 111, a second sub-pixel 113, a third sub-pixel 115 and a via arrangement area 117, and further, as shown in fig. 3, any two adjacent pixel units 11 are spliced according to a rule of mirror symmetry to form a pixel arrangement structure. As shown in fig. 4, the pixel units 11 are arranged in the column direction and the row direction in order. The mirror symmetry is performed with the sides of the pixel unit 11 as symmetry axes.
In yet another example, as shown in fig. 5, the pixel unit 11 is a parallelogram, the pixel unit 11 of the parallelogram is arbitrarily divided into a first sub-pixel 111, a second sub-pixel 113, a third sub-pixel 115 and a via arrangement area 117, and further, as shown in fig. 6, any two adjacent pixel units 11 are spliced according to a rule of central symmetry to form a pixel arrangement structure. The center symmetry is symmetry with the midpoint of each side of the pixel unit 11 as the center.
In another example, as shown in fig. 7, the pixel units 11 are hexagonal, and the hexagonal pixel units 11 are arbitrarily divided into a first sub-pixel 111, a second sub-pixel 113, a third sub-pixel 115 and a via arrangement area 117, and further, as shown in fig. 8, any two adjacent pixel units 11 are spliced according to an axisymmetric rule to form a pixel arrangement structure. The axisymmetry is performed with the sides of the pixel unit 11 as symmetry axes.
One pixel unit 11 constitutes one pixel point in the display panel. Further, the pixel unit 11 is divided into the first sub-pixel 111, the second sub-pixel 113, the third sub-pixel 115 and the via setting area 117, and the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 are ensured to be disposed around the via setting area 117, that is, the via setting area 117 is disposed between the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115.
The first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 in the pixel unit 11 may be respectively selected from the required color pixels according to actual needs, specifically, the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 are independently selected from the red sub-pixel, the green sub-pixel and the blue sub-pixel, and the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 are different from each other.
The arrangement of the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 in the pixel unit 11 may be determined according to practical needs. In one example, the first sub-pixel 111 of two adjacent pixel units 11,
The second sub-pixel 113 and the third sub-pixel 115 may be independently disposed within the respective pixel units and are not associated with each other (as shown in fig. 3 and 4). In yet another example, in any adjacent two pixel units 11, at least one identical sub-pixel among the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115 is adjacently disposed. Note that, the same sub-pixel refers to a sub-pixel having the same shape and the same color as those of the selected sub-pixel, as shown in fig. 6, one and the same sub-pixel in two adjacent pixel units 11 are disposed adjacently, and one and the same sub-pixel in two adjacent pixel units 11 are disposed adjacently, as shown in fig. 8. The same sub-pixels in the two adjacent pixel units 11 are adjacently arranged, so that the same sub-pixels can be intensively arranged, which is beneficial to the production and manufacture of the display panel, so that the sub-pixels with the same color can be intensively arranged, the uniform mask opening can be adopted for preparation in the vapor plating process for manufacturing the display panel, or the uniform mask opening can be adopted for preparation in the same ink deposition area in the printing process, and the resolution of the display panel can be improved in multiple in the range of the mask opening or the ink deposition area with the same size, so that high-resolution or even ultrahigh-resolution display can be realized.
The via setting area 117 is an area reserved in the pixel unit 11 and available for setting the auxiliary electrode via 119 and the pixel electrode via 91, the via setting area 117 is surrounded by the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115, and the auxiliary electrode via 119 is equidistant from the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115. In one example, the auxiliary electrode via 119 may be arbitrarily disposed within the via-disposing region 117. Further, the auxiliary electrode via 119 is disposed in the middle of the via hole disposition area 117, so that the distances from the auxiliary electrode to the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 are equal, and uniform power transmission of the transparent electrode to the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 around each auxiliary electrode is achieved, so that the conductive uniformity of the transparent top electrode is further improved, and the display uniformity of the display panel is further improved.
In each embodiment of the pixel arrangement structure, the pixel unit includes a first sub-pixel, a second sub-pixel and a third sub-pixel; a via hole setting area is also arranged in the pixel unit; the first sub-pixel, the second sub-pixel and the third sub-pixel are arranged around the hole setting area; the auxiliary electrode via hole is arranged in the via hole arrangement region, so that the first sub-pixel, the second sub-pixel and the third sub-pixel in the pixel unit are arranged around the auxiliary electrode formed in the auxiliary electrode via hole, and the first sub-pixel, the second sub-pixel and the third sub-pixel share one auxiliary electrode, so that the uniformity of voltage drop is improved, and the phenomenon of non-uniform light emission can be effectively improved.
In one embodiment, as shown in fig. 9, the via hole arrangement region 117 is further provided with a pixel electrode via hole 91; the pixel electrode via 91 is spaced apart from the auxiliary electrode via 119.
The pixel electrode via 91 is used to electrically connect the pixel electrode and the driving circuit. The driving circuit is a TFT (Thin Film Transistor ) driving circuit. The pixel electrode via hole 91 is arranged in the via hole arrangement region, so that the pixel electrode via hole 91 and the pixel electrode are staggered, and the surface flatness of the pixel electrode is improved when the pixel electrode is formed, and the display uniformity of the display panel is further improved.
The pixel electrode via 91 may be disposed in any desired manner in the via arrangement region 117, and may be spaced apart from the auxiliary electrode via 119 as desired. In a specific embodiment, as shown in fig. 10, the pixel electrode via 91 includes a first pixel electrode via 911, a second pixel electrode via 913, and a third pixel electrode via 915; the first pixel electrode via hole 911 is disposed near the first subpixel 111; the second pixel electrode via 913 is disposed adjacent to the second subpixel 113; the third pixel electrode via 915 is disposed adjacent to the third subpixel 115; the first pixel electrode via hole 911, the second pixel electrode via hole 913 and the third pixel electrode via hole 915 are uniformly arranged around the via hole arrangement area 117, specifically, the distances from the first pixel electrode via hole 111, the second pixel electrode via hole 113 and the third pixel electrode via hole 115 to the corresponding sub-pixels are equal, and the first pixel electrode via hole 911, the second pixel electrode via hole 913 and the third pixel electrode via hole 915 are uniformly arranged around the via hole arrangement area, thereby not only being beneficial to reducing the size of the pixel electrode and manufacturing cost, but also being beneficial to making the size of each pixel electrode equal, and further improving the display uniformity of the display panel.
In each embodiment of the pixel arrangement structure, the pixel electrode via holes are arranged in the via hole arrangement area, so that the surface of the pixel electrode via holes is flat when the pixel electrodes are formed, the display uniformity of the display panel is promoted, and further, the pixel electrode via holes are uniformly arranged around the via hole arrangement area, and the display uniformity of the display panel is improved.
In one embodiment, as shown in fig. 11, the pixel units 11 are triangular; any two adjacent pixel units are arranged in a central symmetry mode.
It should be noted that, the central symmetry in this embodiment means that the triangle is rotated 180 degrees with the midpoint of each side of the triangle as the center, so that two adjacent pixel units form a parallelogram.
The triangular pixel unit 11 may be arbitrarily divided into the first sub-pixel 111, the second sub-pixel 113, the third sub-pixel 115, and the via setting area 117, so long as the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115 are ensured to be set around the via setting area 117.
In one example, as shown in fig. 12, the first sub-pixel 111, the second sub-pixel 113, the third sub-pixel 115, and the via setting area 117 are all triangular, and the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115 form a triangular pixel unit 11 together with the via setting area 117, that is, the triangular pixel unit 11 is divided into four triangles. Dividing the triangular pixel cells 11 into four triangles facilitates uniform division of the pixel cells 11, thereby facilitating uniform placement of the auxiliary electrode vias 119 and the pixel electrode vias 91 in the pixel arrangement structure.
Further, in one example, as shown in fig. 13, the first sub-pixel 111, the second sub-pixel 113, the third sub-pixel 115 and the via arrangement area 117 are triangles with the same shape, that is, the triangular pixel unit 11 is divided into four triangles, and the triangular pixel unit 11 is divided into four triangles, which is more beneficial to the uniform division of the pixel unit 11, and further is more beneficial to the uniform arrangement of the auxiliary electrode via 119 and the pixel electrode via 91 in the pixel arrangement structure.
In each embodiment of the pixel arrangement structure, the triangular pixel units are adopted, so that the auxiliary electrode through holes and the pixel electrode through holes are uniformly arranged, the auxiliary electrode through holes which are uniformly arranged are particularly formed, the auxiliary electrodes formed in the process of manufacturing the display panel can be uniformly distributed, uniform conduction of the transparent top electrode is promoted, the display uniformity of the display panel is improved, and the uniformly arranged pixel electrode through holes are formed, so that the surface of the pixel electrode formed in the process of manufacturing the display panel is flat, the sizes of the pixel electrode through holes are equal, and the display uniformity of the display panel is also improved.
In one embodiment, as shown in fig. 14, the pixel unit 11 is an isosceles right triangle; any two adjacent pixel units are arranged in a mirror symmetry mode.
It should be noted that, the mirror symmetry arrangement in this embodiment refers to symmetrically arranging two adjacent pixel units with each side of the isosceles right triangle as a symmetry axis.
The isosceles right triangle pixel unit 11 may be arbitrarily divided into the first sub-pixel 111, the second sub-pixel 113, the third sub-pixel 115, and the via setting area 117, as long as the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115 are ensured to be set around the via setting area 117.
In one example, as shown in fig. 14, the first subpixel 111, the second subpixel 113, the third subpixel 115, and the via setting area 117 are all triangular, and the first subpixel 111, the second subpixel 113, and the third subpixel 115 form an isosceles right triangle pixel unit 11 together with the via setting area 117, i.e., the isosceles right triangle pixel unit 11 is divided into four triangles. Dividing the triangular pixel cells 11 into four triangles facilitates uniform division of the pixel cells 11, thereby facilitating uniform placement of the auxiliary electrode vias 119 and the pixel electrode vias 91 in the pixel arrangement structure.
Further, in one example, as shown in fig. 15 and 16, the first subpixel 111, the second subpixel 113, the third subpixel 115, and the via setting area 117 are triangles with the same shape, that is, isosceles right triangle pixel units are equally divided into four isosceles right triangles, and equally dividing the isosceles right triangle pixel unit 11 into four isosceles right triangles is more beneficial to the uniform division of the pixel units 11, and further helps to uniformly set the auxiliary electrode via 119 and the pixel electrode via 91 in the pixel arrangement structure.
In one example, in any adjacent two pixel units 11, at least one identical sub-pixel among the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115 is adjacently disposed. As shown in fig. 15, the first sub-pixel 111 is disposed adjacently, or the second sub-pixel 113 is disposed adjacently, or the third sub-pixel 115 is disposed adjacently. As shown in fig. 16, in any adjacent pixel units, two identical sub-pixels are adjacently disposed in the first sub-pixel 111, the second sub-pixel 113, and the third sub-pixel 115.
The color pixels selected for the first sub-pixel 111, the second sub-pixel 113 and the third sub-pixel 115 may be selected according to actual usage, for example, in one example, the first sub-pixel 111 in fig. 16 is selected as a red sub-pixel,
The second sub-pixel 113 is a blue sub-pixel, and the third sub-pixel 115 is a green sub-pixel. In yet another example, the first sub-pixel 111 in fig. 16 selects a blue sub-pixel, the second sub-pixel 113 selects a red sub-pixel, and the third sub-pixel 115 selects a green sub-pixel. In another example, the first sub-pixel 111 in fig. 16 selects a red sub-pixel, the second sub-pixel 113 selects a green sub-pixel, and the third sub-pixel 115 selects a blue sub-pixel. Furthermore, the sub-pixels with the same color are concentrated and uniformly dispersed in the pixel arrangement structure, so that the display quality is greatly improved, and further, the same sub-pixels are concentrated, so that in the printing process for manufacturing the display panel, no pixel electrode through holes exist in the ink deposition area surrounded by the light-emitting area, the pixel bank does not need to be additionally arranged to cover the pixel electrode connecting through holes, the substrate flatness of the whole ink deposition area and the edge smoothness of the pixel bank are improved, the film forming uniformity in the printing process is improved, and the display uniformity is further improved.
In each embodiment of the pixel arrangement structure, the isosceles right triangle pixel units are adopted, so that the uniform arrangement of the auxiliary electrode via holes and the pixel electrode via holes is facilitated, the display uniformity of the display panel is improved, the isosceles right triangle is further divided uniformly, and the display uniformity of the display panel is improved.
In one embodiment, as shown in fig. 17, a display panel is provided that includes the pixel arrangement structure described in the embodiments of the pixel arrangement structure of the present application.
Further, the display panel further includes a substrate 1211, a plurality of auxiliary electrodes 1213, and a plurality of pixel electrodes 1217. The substrate 1211 is used to carry a pixel arrangement structure; a plurality of auxiliary electrodes 1213 are correspondingly arranged in the auxiliary electrode vias 119, and the auxiliary electrodes are used for electrically connecting the transparent top electrodes 1215; a plurality of pixel electrodes 1217 are correspondingly disposed on a side of the light emitting layer 1219 facing the substrate 1211, and the pixel electrodes 1217 are electrically connected to the driving circuit through the pixel electrode vias 91. Further, the display panel further includes a pixel bank1221.
In each embodiment of the display panel, the display panel adopts the pixel arrangement structure, so that the first sub-pixel, the second sub-pixel and the third sub-pixel in one pixel unit share one auxiliary electrode when the display panel is manufactured, the uniformity of voltage drop is improved, and the phenomenon of non-uniform light emission can be effectively improved.
In one embodiment, a display device is provided that includes a display panel described in embodiments of the display panel of the present application.
In the embodiments of the display device, the light-emitting brightness of the display device is uniform, the display quality is high, and a high-quality display picture can be provided for a user.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (9)
1. A pixel arrangement structure is characterized by comprising a plurality of pixel units; the pixel unit comprises a first sub-pixel, a second sub-pixel and a third sub-pixel; a via hole setting area is also arranged in the pixel unit; the first sub-pixel, the second sub-pixel and the third sub-pixel are arranged around the via hole arrangement area; an auxiliary electrode via hole is arranged in the via hole arrangement region; wherein the pixel units are triangular;
pixel electrode through holes are further formed in the through hole arrangement area, and the pixel electrode through holes and the auxiliary electrode through holes are arranged at intervals;
the first sub-pixel, the second sub-pixel and the third sub-pixel are independently selected from a red sub-pixel, a green sub-pixel and a blue sub-pixel, and the first sub-pixel, the second sub-pixel and the third sub-pixel are different from each other;
in any two adjacent pixel units, at least one identical sub-pixel among the first sub-pixel, the second sub-pixel and the third sub-pixel is adjacently arranged.
2. The pixel arrangement of claim 1, wherein the pixel electrode via includes a first pixel electrode via, a second pixel electrode via, and a third pixel electrode via;
the first pixel electrode via is arranged close to the first sub-pixel; the second pixel electrode via hole is arranged close to the second sub-pixel; the third pixel electrode via hole is arranged close to the third sub-pixel; and the first pixel electrode via hole, the second pixel electrode via hole and the third pixel electrode via hole are uniformly arranged around the via hole arrangement region.
3. The pixel arrangement structure according to claim 1, wherein the auxiliary electrode via is disposed in the middle of the via arrangement region, and the auxiliary electrode via is equidistant from the first sub-pixel, the second sub-pixel, and the third sub-pixel.
4. A pixel arrangement according to any one of claims 1 to 3, wherein the pixel units are isosceles right triangles; any two adjacent pixel units are arranged in a central symmetry mode or a mirror symmetry mode.
5. The pixel arrangement structure according to claim 4, wherein the first sub-pixel, the second sub-pixel, the third sub-pixel, and the via arrangement region are all triangular, and the first sub-pixel, the second sub-pixel, the third sub-pixel, and the via arrangement region together form the pixel unit of a triangle.
6. The pixel arrangement structure according to claim 5, wherein the first sub-pixel, the second sub-pixel, the third sub-pixel, and the via setting area are triangular shapes having the same shape.
7. A display panel comprising the pixel arrangement structure according to any one of claims 1 to 6.
8. The display panel of claim 7, further comprising:
a substrate for carrying the pixel arrangement structure;
the auxiliary electrodes are correspondingly arranged in the auxiliary electrode through holes and are used for being electrically connected with the transparent top electrode; a kind of electronic device with high-pressure air-conditioning system
The pixel electrodes are correspondingly arranged on one side of the light-emitting layer facing the substrate base plate, and the pixel electrodes are electrically connected with the driving circuit through the pixel electrode through holes.
9. A display device comprising the display panel according to claim 7 or 8.
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| JP2010027210A (en) * | 2008-07-15 | 2010-02-04 | Canon Inc | Manufacturing method of light-emitting element, and light-emitting element |
| JP6577344B2 (en) * | 2015-11-18 | 2019-09-18 | 株式会社ジャパンディスプレイ | Display device and manufacturing method thereof |
| KR102616580B1 (en) * | 2015-11-23 | 2023-12-22 | 삼성디스플레이 주식회사 | Organic light-emitting display apparatus and manufacturing the same |
| CN107863371B (en) * | 2017-10-19 | 2021-01-08 | 上海天马微电子有限公司 | Display panel and display device |
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