CN111381643A - Component power consumption switching circuit and mainboard thereof - Google Patents
Component power consumption switching circuit and mainboard thereof Download PDFInfo
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- CN111381643A CN111381643A CN201811625738.1A CN201811625738A CN111381643A CN 111381643 A CN111381643 A CN 111381643A CN 201811625738 A CN201811625738 A CN 201811625738A CN 111381643 A CN111381643 A CN 111381643A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
- G06F1/206—Cooling means comprising thermal management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Quality & Reliability (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
A component power consumption switching circuit and a mainboard thereof are provided. The controller has a receiving pin and an output pin. The receiving pin is used for receiving a temperature detection signal. The output pin normally outputs a first reference level, and the controller switches the output of the output pin to a second reference level which is not equal to the first reference level when judging that the temperature corresponding to the temperature detection signal is higher than a temperature threshold value. The south bridge chip is provided with an interrupt event trigger pin and an interrupt event output pin, and the interrupt event trigger pin is electrically connected with the output pin of the controller. When the output of the output pin is switched from the first level to the second level, the south bridge chip outputs a power consumption switching signal by the interrupt event output pin.
Description
Technical Field
The present invention relates to temperature control of computer systems, and more particularly to a power consumption switching circuit and a motherboard.
Background
The existing computer mainframe is designed to be light and thin, and even a fanless design is partially introduced. The interior of a computer host designed without a fan depends on natural convection for heat dissipation. The host with light and thin design is not beneficial to convection heat dissipation no matter whether the host is provided with a fan or not. Therefore, a relatively expensive heat dissipation design such as a heat pipe is required for such a host.
However, in some designs, the area of the overheating component may not be conducive to the placement of the heat sink, and heat dissipation may still be problematic. Therefore, the aforementioned computer host can only operate for a short time, and still has an unsolved overheating problem after operating for a long time. Alternatively, the system is forced to operate at low power to reduce the amount of heat generated, which would seriously affect performance.
The existing design mainly allows a user to manually adjust the efficiency mode according to the operation condition through the operation of a software interface, firstly operates the computer in a low-power mode when the overheating problem occurs, and then manually improves the efficiency mode of the computer after the overheating problem is eliminated.
Disclosure of Invention
In view of the problem of overheating of thin host or fanless system, the present invention provides a device power consumption switching circuit and a circuit board thereof to avoid the overheating problem.
The invention provides a component power consumption switching circuit, which comprises a controller and a south bridge chip. The controller has a receiving pin and an output pin. The receiving pin is used for receiving a temperature detection signal. The output pin normally outputs a first reference level, and the controller switches the output of the output pin to a second reference level which is not equal to the first reference level when judging that the temperature corresponding to the temperature detection signal is higher than a temperature threshold value. The south bridge chip is provided with an interrupt event trigger pin and an interrupt event output pin, and the interrupt event trigger pin is electrically connected with the output pin of the controller. When the output of the output pin is switched from the first level to the second level, the south bridge chip outputs a power consumption switching signal by the interrupt event output pin.
In at least one embodiment of the present invention, the controller is a fan controller.
In at least one embodiment of the present invention, the output pin is a pulse signal pin of the fan controller.
In at least one embodiment of the present invention, the fan controller has a pulse signal pin and a general output pin, the pulse signal pin is used for outputting a pulse signal for controlling the fan speed, and the output pin is the general output pin.
In at least one embodiment of the present invention, the device power consumption switching circuit further includes a temperature detector, and the receiving pin is connected to the temperature detector to receive the temperature detection signal.
In at least one embodiment of the present invention, the device power consumption switching circuit further includes a bios electrically connected to the south bridge chip, and the south bridge chip reads a power consumption switching setting value from the bios to encode the power consumption switching setting value as the power consumption switching signal.
In at least one embodiment of the present invention, the bios stores an initial power consumption setting value, when the temperature is lower than the temperature threshold, the output of the output pin returns from the second level to the first level, and the south bridge chip reads the initial power consumption setting value from the bios to generate a power return signal.
The invention also provides a mainboard which comprises a board body and an element power consumption switching circuit. The element power consumption switching circuit is arranged on the board body.
In at least one embodiment of the present invention, the motherboard further includes a north bridge chip electrically connected to the south bridge chip.
In at least one embodiment of the present invention, the north bridge chip provides a front side bus, a high speed graphics bus and a memory bus for connecting a cpu, a graphics processor and a memory module.
Through the element power consumption switching circuit, the controller on the existing mainboard, such as a fan controller, can be directly utilized to judge whether the temperature is too high. Through simple circuit configuration, the south bridge chip can be triggered to generate an interrupt event, so that the system enters power switching. In a system with low heat dissipation performance, such as a fanless system or a thin host machine which is difficult to dissipate heat, the power consumption of the elements is dynamically adjusted according to the temperature condition, so that the problem of poor heat dissipation performance of the system can be solved.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
FIG. 1 is a circuit block diagram of a component power consumption switching circuit according to a first embodiment of the present invention;
FIG. 2 is a diagram illustrating the timing of switching the temperature, the voltage level and the power consumption according to the first embodiment of the present invention;
FIG. 3 is a circuit block diagram of a component power consumption switching circuit according to a second embodiment of the present invention;
FIG. 4 is a circuit block diagram of a power consumption switching circuit according to a third embodiment of the present invention;
fig. 5 is a circuit block diagram of an element power consumption switching circuit according to a fourth embodiment of the present invention.
Wherein the reference numerals
100-element power consumption switching circuit 110 controller
114 output pin 116 temperature detector
118 fan socket 120 south bridge chip
122 interrupt event trigger pin 124 interrupt event output pin
130 bios 140 north bridge chip
142 memory bus 144 high speed graphics bus
146 front side bus 150 central processing unit
160 GPU 170 memory module
180 peripheral bus GPO general output pin
First alignment of T temperature detection signal V1
V2 second level SW power consumption switching signal
R power recovery signal
Detailed Description
The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:
as shown in fig. 1, a device power consumption switching circuit 100 according to a first embodiment of the present invention is used for switching power consumption of one of a plurality of devices, so as to change a heating and heat dissipation state of a computer system and dynamically maintain a system temperature.
As shown in fig. 1, the device power consumption switching circuit 100 includes a controller 110, a south bridge chip 120, a basic input output system 130(BIOS 130), a north bridge chip 140, a central processing unit 150, a graphics processing unit 160, and a memory module 170.
As shown in fig. 1, the controller 110 may be a fan controller, and may be configured to output a pulse signal (PWM) for controlling the rotation speed of the fan. The controller 110 has at least one receiving pin 112 and an output pin 114. The receiving pin 112 is connected to a temperature detector 116, such as a thermocouple, for receiving a temperature detection signal T. The output pin 114 normally outputs a first level V1. When the temperature corresponding to the temperature detection signal T is higher than a temperature threshold, the controller 110 switches the output of the output pin 114 to a second level V2 that is not equal to the first level V1.
As shown in FIG. 1, south bridge chip 120 has an interrupt event trigger pin 122 and an interrupt event output pin 124. The interrupt event trigger pin 122 is electrically connected to the output pin 114 of the controller 110; when the output of the output pin 114 is switched from the first level V1 to the second level V2, the change in the voltage level of the interrupt event trigger pin 122 is interpreted by the south bridge chip 120 as an interrupt event, and the interrupt event output pin 124 outputs a power consumption switch signal. The south bridge chip 120 also has a peripheral bus 180, such as Super I/O, for keyboard, hard disk, serial port peripheral connections.
As shown in FIG. 1, BIOS130 is electrically connected to south bridge chip 120 for performing basic I/O control of the system. In addition, the BIOS130 can allow the user to set the power consumption switching setting value transmitted by the power consumption switching signal through the setting interface, such as reducing the CPU frequency, reducing the memory transmission speed, prolonging the memory refresh time, or increasing the fan speed, so as to reduce the system temperature.
As shown in FIG. 1, the north bridge chip 140 is electrically connected to the south bridge chip 120 through an internal bus for processing high speed signal transmission. The north bridge chip 140 and the south bridge chip 120 may be independent chips or may be integrated into a single system chip. The north bridge chip 140 provides a Memory Bus 142(Memory Bus) and a High-speed graphics Bus 144(High-speed graphics Bus) for connecting the Memory module 170 and the graphics processor 160. In addition, the north bridge chip 140 provides a Front-side bus 146(Front-side bus) for the cpu 150 to electrically connect to the north bridge chip 140.
As shown in fig. 1 and 2, when the change of the power level of the interrupt event trigger pin 122 is interpreted as an interrupt event trigger by the south bridge 120, the power consumption switch setting value is read by the BIOS130 of the south bridge 120, and is encoded as the power consumption switch signal SW, which is output via the interrupt event output pin 124. The power consumption switching signal SW is transmitted to the cpu 150 via the north bridge chip 140. The power consumption switch signal SW forms an interrupt event to enable the cpu 150 to execute power consumption switching of specific components according to the power consumption switch setting value. The power consumption switching can be achieved by a power consumption switching program code loaded and executed by the cpu 150, or can be implemented by an instruction set built in the cpu 150 directly according to a power consumption switching setting value.
The power consumption switching signal SW may be a System Control Interrupt Event (SCI Event). After receiving the power switch signal SW, the cpu 150 may generate a corresponding SCI signal to the os, so that the os starts to perform power switch.
The BIOS130 also stores initial power consumption settings. After the computer is turned on, the south bridge chip 120 loads the initial power consumption setting value from the BIOS130 to make the operating system adjust the power consumption and operate normally. When the controller 110 determines that the temperature corresponding to the temperature detection signal T is higher than the temperature threshold, the interrupt event causes the south bridge chip 120 to load the power switch setting value to generate the power switch signal SW. The power consumption switching signal SW may be used to adjust the power consumption of one or more devices.
For example, the CPU 150 may have a low power long time operation mode (PL1) and a high power short time operation mode (PL2), the Memory transfer may have a low speed mode and a high speed mode, the operation mode and a low frequency operation mode, and the Memory Refresh rate (Memory Refresh) may be set to fast Refresh and slow Refresh.
The initial power consumption setting can be set to high power short time operation mode PL2, memory transfer high speed mode and memory refresh rate for fast refresh, while setting the fan to normal speed. After the computer is started, the power consumption of each element can be switched by the initial power consumption set value.
As shown in fig. 2, the temperature detector 116 may be used to detect the overall temperature of the system, or to detect the temperature of components such as the cpu 150 that are prone to heat generation. When the temperature detected by the temperature detector 116 is higher than the temperature threshold, that is, the controller 110 determines that the temperature corresponding to the temperature detection signal T is higher than the temperature threshold, the controller 110 switches the output of the output pin 114 from the first level V1(HIGH) to the second level V2(LOW), and the south bridge 120 is triggered and the BIOS130 loads the power consumption switch setting value. At this time, the initial power consumption setting may be set to the low power long time operation mode PL1, the memory transfer low speed mode, and the memory refresh rate to be slow update, while setting the fan to high speed. At this time, the cpu 150 can execute the system interrupt event, reduce the heat generation of the system, and improve the heat dissipation efficiency of the fan, so as to reduce the overall temperature of the system. The first level V1 and the second level V2 can be high level and low level, respectively, but the opposite setting is not excluded as long as the output condition of the controller 110 and the triggered condition of the south bridge chip 120 are modified correspondingly.
As shown in FIG. 2, after the temperature is lower than the temperature threshold, the output of the output pin 114 of the controller 110 returns from the second level V2 to the first level V1. At this time, it may be regarded as another system interrupt event, and trigger the south bridge 120 to read the initial power consumption setting value by the BIOS130, so as to generate a power recovery signal R. The power recovery signal R is transmitted to the cpu 150 through the north bridge chip 140, so that the cpu 150 performs power recovery, power consumption of each element is increased again, and the rotation speed of the fan is reduced to a normal rotation speed.
As shown in fig. 3, a device power consumption switching circuit 100 for switching power consumption of one of a plurality of devices according to a second embodiment of the present invention is disclosed. The device power consumption switching circuit 100 includes a fan controller 110a, a south bridge chip 120, a basic input output system 130(BIOS 130), a north bridge chip 140, and a central processing unit 150.
The second embodiment has the fan controller 110a as a controller. The fan controller 110a is in the form of a pulse signal pin. Here, a fan controller 110a having four pins is taken as an example, wherein one pin is a pulse signal pin. At this time, the fan controller 110a is not used to control the fan, i.e. the pulse signal pin is not used to output the pulse signal to the fan, but is used as the output pin 114 of the present invention. The PWM cycle of the pulse signal pin output as the output pin 114 can be adjusted by the fan controller 110a to continuously output the first level V1 or continuously output the second level V2. The pulse signal pin is typically connected to the fan socket 118 to drive the fan in response to the power from the power supply. Here, the pulse signal pin serves as an output pin 114, and the output pin 114 is still connected to a fan socket 118. At this point, this fan receptacle 118 does not provide a fan connection. Instead, a signal connection is used to electrically connect the contact of the fan jack 118 corresponding to the output pin 114 to the interrupt event trigger pin 122 of the south bridge chip 120. At this time, the pulse signal pins of the second embodiment cannot be used to drive the fan, and thus, are suitable for the fanless system.
As shown in fig. 4, a device power consumption switching circuit 100 for switching power consumption of one of a plurality of devices according to a third embodiment of the present invention is disclosed. The device power consumption switching circuit 100 includes a fan controller 110b, a south bridge chip 120, a basic input output system 130(BIOS 130), a north bridge chip 140, and a central processing unit 150.
The fan controller 110a of the third embodiment is in the form of a pulse signal pin and a General Purpose Output (GPO) pin. The pulse signal pins are still electrically connected to the fan socket 118 for outputting PWM to drive the fan. The general purpose output pin GPO is used as the output pin 114, and the interrupt event trigger pin 122 electrically connected to the south bridge 120 provides the first level V1 or the second level V2 to the south bridge 120. The third embodiment retains the fan socket 118 for driving the fan, so that the fan controller 110a can still output the pulse signal to the fan through the pulse signal pin, and is suitable for the fan system.
Referring to fig. 5, a motherboard according to a fourth embodiment of the present invention includes a board body 10 and the device power consumption switching circuit 100 according to the previous embodiment, wherein the controller 110, a south bridge chip 120, a basic input output system 130(BIOS 130), a north bridge chip 140 and a peripheral bus 180 are disposed on the board body 10 and electrically connected to each other through a printed circuit.
The cpu 150, the graphic processor 160, and the memory module 170 shown in fig. 5 are drawn by dashed lines, which mainly means that the cpu 150, the graphic processor 160, and the memory module 170 are not necessarily fixed on the motherboard. The north bridge chip 140 provides a front side bus 146, a high speed graphics bus 144, and a memory bus 142 for the CPU 150, the graphics processor 160, and the memory module 170 to connect. The cpu 150, the gpu 160 and the memory module 170 may be disposed On a Board (On-Board) and directly electrically connected to the north bridge chip 140 through the aforementioned bus. The cpu 150, the graphic processor 160 and the memory module 170 may also be electrically connected to the north bridge chip 140 indirectly through the electrical connectors; that is, the motherboard itself does not include the CPU 150, the graphics processor 160, and the memory module 170.
Through the aforementioned device power consumption switching circuit 100, the controller 110 on the conventional motherboard, such as the fan controller 110, can be directly utilized to determine whether the temperature is too high. With simple circuit configuration, it is able to trigger the south bridge chip 120 to generate an interrupt event, so as to let the system enter power switching. In a system with low heat dissipation performance, such as a fanless system or a thin host machine which is difficult to dissipate heat, the power consumption of the elements is dynamically adjusted according to the temperature condition, so that the problem of poor heat dissipation performance of the system can be solved.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A circuit for switching element power consumption, comprising:
a controller having at least a receiving pin and an output pin; the receiving pin is used for receiving a temperature detection signal, and the output pin normally outputs a first level; when the temperature corresponding to the temperature detection signal is higher than a temperature threshold value, the controller switches the output of the output pin to a second level which is not equal to the first level; and
a south bridge chip having an interrupt event trigger pin and an interrupt event output pin, the interrupt event trigger pin being electrically connected to the output pin of the controller; when the output of the output pin is switched from the first level to the second level, the south bridge chip outputs a power consumption switching signal by the interrupt event output pin.
2. The device power consumption switching circuit of claim 1, wherein the controller is a fan controller.
3. The device power consumption switching circuit of claim 2, wherein the output pin is a pulse signal pin of the fan controller.
4. The device power consumption switching circuit of claim 2, wherein the fan controller has a pulse signal pin for outputting a pulse signal for controlling the fan speed and a general output pin.
5. The device power consumption switching circuit of claim 1, further comprising a temperature detector, wherein a receiving pin is connected to the temperature detector for receiving the temperature detection signal.
6. The circuit of claim 1, further comprising a BIOS electrically connected to the south bridge chip, wherein the south bridge chip reads a power switch setting value from the BIOS to encode the power switch signal.
7. The device power consumption switching circuit of claim 6, wherein the BIOS stores an initial power consumption setting, the output pin returns from the second level to the first level when the temperature is lower than the temperature threshold, and the south bridge reads the initial power consumption setting from the BIOS to generate a power return signal.
8. A motherboard, comprising:
a plate body; and
the device power consumption switching circuit according to any one of claims 1 to 8, disposed on the board.
9. The motherboard of claim 8 further comprising a north bridge chip electrically connected to the south bridge chip.
10. The computer motherboard of claim 8 wherein the north bridge provides a front side bus, a high speed graphics bus and a memory bus for connecting a CPU, a graphics processor and a memory module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811625738.1A CN111381643A (en) | 2018-12-28 | 2018-12-28 | Component power consumption switching circuit and mainboard thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811625738.1A CN111381643A (en) | 2018-12-28 | 2018-12-28 | Component power consumption switching circuit and mainboard thereof |
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| CN111381643A true CN111381643A (en) | 2020-07-07 |
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| CN201811625738.1A Pending CN111381643A (en) | 2018-12-28 | 2018-12-28 | Component power consumption switching circuit and mainboard thereof |
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| US20150052397A1 (en) * | 2013-08-14 | 2015-02-19 | Kabushiki Kaisha Toshiba | Memory system and controlling method of memory system |
| TW201608367A (en) * | 2014-08-27 | 2016-03-01 | 緯創資通股份有限公司 | Chip device and electronic system thereof |
| CN107515814A (en) * | 2017-09-26 | 2017-12-26 | 余浩 | A kind of computer part monitoring system |
| CN108255283A (en) * | 2016-12-28 | 2018-07-06 | 瑞萨电子株式会社 | Semiconductor devices, operating condition control method and non-transitory computer-readable medium |
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2018
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| TW200746983A (en) * | 2006-06-09 | 2007-12-16 | Giga Byte Tech Co Ltd | Temperature control method of electronic component, and the system thereof component |
| TW200903983A (en) * | 2007-07-06 | 2009-01-16 | Hon Hai Prec Ind Co Ltd | Control circuit and method for computer fan |
| CN103345425A (en) * | 2013-05-28 | 2013-10-09 | 山东超越数控电子有限公司 | Method for achieving control over rotation speed of system fan through SMI interruption |
| US20150052397A1 (en) * | 2013-08-14 | 2015-02-19 | Kabushiki Kaisha Toshiba | Memory system and controlling method of memory system |
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Application publication date: 20200707 |