CN111371464A

CN111371464A - Polar code decoding method, device and equipment

Info

Publication number: CN111371464A
Application number: CN201811600879.8A
Authority: CN
Inventors: 郑征; 李航
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-12-26
Filing date: 2018-12-26
Publication date: 2020-07-03
Anticipated expiration: 2038-12-26
Also published as: CN111371464B

Abstract

The application discloses a Polar code decoding method, device and equipment. The method comprises the following steps: determining a freezing node between a first node of a Polar code and a target leaf node, wherein the first node is a middle node or a root node; and when the first node is decoded, calculating a log-likelihood ratio (LLR) from the first node to the target leaf node, wherein the PSUM from the first node to the target leaf node is 0. Corresponding apparatus and devices are also disclosed. By adopting the scheme of the application, the nodes of the binary tree do not need to be traversed, and the frozen nodes are skipped to carry out LLR calculation after the frozen nodes are determined through an LCA search algorithm, so that the decoding complexity can be reduced, and the decoding efficiency can be improved.

Description

Polar code decoding method, device and equipment

Technical Field

The present application relates to the field of communications technologies, and in particular, to a Polar code decoding method, apparatus, and device.

Background

Third generation partnership project (3)^rdgeneration paratnershirp project, 3GPP) standard selects Polar codes as the control channel error correction code scheme for next generation mobile communication systems (e.g., 5G NR).

Polar code is a recently newly proposed channel error correction code scheme. Polar codes are the only error correcting code schemes that have been proven to achieve channel capacity at the present time with polynomial processing complexity.

The decoding algorithms widely applied by Polar codes are a sequential-cancellation decoder (SC) algorithm and a list sequential-cancellation decoder (SCL) algorithm. The decoding process of the SC algorithm: all nodes are recursively processed in a depth-first search binary tree starting from N log-likelihood ratios (LLRs) received from the channel.

In the SC/SCL algorithm, a decoder traverses all nodes on a Polar decoding tree. When processing the frozen bit (frozen bit), the SC algorithm does not decode, and PSUM returns 0 directly; when decoding a frezen bit before the first information bit (info bit), the SCL algorithm directly returns to 0, and the remaining frezen bits directly return to 0 except for the PSUM, and the SCL algorithm also needs to calculate an LLR value according to the calculated frezen bit and update the metric value of the path.

In order to solve the problem that the parallelism of the original SC/SCL algorithm is low and the decoding rate is slow, Bo Yuan and the like propose a multi-bit decoding method, and the parallelism is improved to Mbit by exhausting all 2^ M branch paths of M bits. But due to circuit complexity constraints, M typically does 4. Gross et al proposed a Simplified serial cancellation decoder (Simplified SC) that demonstrated that decoding at the nodes in the middle layer was identical to the path metric results at the leaf nodes and that the decoding results PSUM were consistent. Gross generalizes the certification to SCL algorithm and proposes Rep, SPC, Rate1, Rate0, etc. decoding nodes. By special processing of different nodes, the decoding parallelism can be greatly improved (the maximum achievable parallelism depends on the complexity of the node decoding method).

The application of the Simplified SC/SCL algorithm allows successive frezen bits to be included in a node and translated together (or their cumulative path metrics to be calculated together).

The simplefied effect of the Simplified algorithm first comes from: 1) the complexity reduction brought by the reduction of the branch screening quantity brought by the high parallelism; and 2) the algorithm decodes at a high level, reducing the loop of LLR calculation, node decoding and routing at a lower level. However, the parallelism improvement of the nodes is limited by the Simplified algorithm and the hardware complexity. Even in the SC algorithm, the parallelism of Rate0 cannot be increased infinitely.

As shown in fig. 1, the decoding tree of fig. N-16 is examined for the drawbacks of the conventional algorithm. In FIG. 1, the solid leaf nodes are Info bits and the hollow leaf nodes are frezen bits.

The circle box 1 shown in fig. 1 is a Rate0 node of length 4 (in the figure, the D node is decoded on the S-2 layer, and the length is 4bit), and the

circle boxes

2 and 3 are a Rate0 node of length 2 (in the figure, the left child of the F/G node is decoded on the S-1 layer). It can be seen that, among all the frezen bit nodes, some of the frezen bit nodes cannot skip but can be decoded by other nodes, and if the nodes supported by the Simplified algorithm cannot be formed, the nodes can only be split into smaller decoding parallelism and decoded at a lower level. This adds extra LLR calculations and increases the amount of decoding calculations.

Further, in the simplefied algorithm, the decoding of the Rate0 node is premised on calculating the LLR of the layer where the node is located, which is not necessary in practice. As shown in FIG. 2, under a 64-bit node A, there are four leaf nodes D-G, where D-F is a 16-bit length Rate0 and G is a Rate1 node. In this case, the simplefied algorithm needs to calculate 16 LLRs for node D, decode 16bit PSUM for node D, return to node B, calculate 16 LLRs for node E, and so on until node G is decoded. The coding efficiency is low.

Therefore, how to effectively reduce the decoding complexity and improve the decoding efficiency is a problem to be solved urgently at present.

Disclosure of Invention

The application provides a Polar code decoding method, device and equipment, so as to effectively reduce decoding complexity and improve decoding efficiency.

In a first aspect, a decoding method of Polar codes is provided, where the method includes: determining a freezing node between a first node of a Polar code and a target leaf node, wherein the first node is a middle node or a root node; and when the first node is decoded, calculating a log-likelihood ratio (LLR) from the first node to the target leaf node, wherein the PSUM from the first node to the target leaf node is 0.

In the aspect, each node of the binary tree does not need to be traversed, and after the frozen node is determined, the frozen node is skipped to carry out LLR calculation through an LCA search algorithm, so that the decoding complexity can be reduced, and the decoding efficiency can be improved.

In one implementation, the frozen node is one or more nodes at the beginning of the binary tree of the Polar code, or the frozen node is one or more nodes in the middle of the binary tree of the Polar code, and the one or more nodes include leaf nodes.

In this implementation, the frozen nodes at the beginning or in the middle of the binary tree may be skipped and the LLRs for any node to the target leaf node may be computed, with the PSUM returned by these frozen nodes being 0.

In another implementation, the freezing node is one or more nodes in the middle of a binary tree of the Polar code, and the calculating LLRs from the first node to the target leaf node when decoding the first node includes: determining a lowest common father node LCA of a source leaf node and the target leaf node, wherein the LCA is a first node; determining a non-public part of the identifier according to the identifier of the LCA and the identifier of the target leaf node, wherein the identifier adopts binary representation; determining that an LLR calculation path from the first node to the target leaf node is a path represented by the non-public part of the identifier, wherein a first value of the identifier indicates F operation, and a second value of the identifier indicates G operation; and calculating LLR from the first node to the target leaf node according to the determined LLR calculation path.

In the implementation mode, a specific calculation mode for calculating the LLR by skipping the freezing node in the middle of the binary tree is provided, the LLR calculation is carried out by skipping the freezing node after the freezing node is determined through an LCA search algorithm without traversing each node of the binary tree, the decoding complexity can be reduced, and the decoding efficiency can be improved.

In yet another implementation, the determining the LCA of the source leaf node and the target leaf node includes: calculating an exclusive or result X of the middle sequence identification of the source leaf node and the middle sequence identification of the target leaf node; and starting calculation from the left side of the X, if the bit of the highest position 1 of the X is k, right-shifting the middle-order identifier of the source leaf node by d-k bits, and left-shifting the lowest position 1 of the identifier after right-shifting by d-k bits to obtain the middle-order identifier of the LCA, wherein d is the height of the binary tree of the Ployar code.

In the implementation mode, a specific LCA determining mode is given, and the LCA is determined according to the middle-order identification of the LCA, so that the mode is simple.

In yet another implementation, the determining a non-public portion of the identity based on the identity of the LCA and the identity of the target leaf node includes: and left aligning the identification of the LCA and the identification of the target leaf node, and determining the non-public part of the identification of the target leaf node and the identification of the LCA.

In yet another implementation, from the source leaf node to the LCA, if the right child of any second node has no passed node, the LLA of the left subtree of the second node is calculated, and the PSUM result of the right subtree of the second node is 0.

In this implementation, a method for solving the height of the skipped Polar decoding subtree in the PSUM process is given, and by solving the height, the reduced decoding complexity can be known.

In yet another implementation, left-aligning the identity of the LCA with the identity of the source leaf node, the PSUM result of the subtree whose right child is the root of the second node is 0 if the identity of the LCA and the identity of the source leaf node correspond to bits of 0 in the non-public part.

In yet another implementation, from the LCA to the destination leaf node, if the left child of any third node has no passing node, then no LLR is calculated for the left subtree of the third node.

In this implementation, a method for solving the height of the skipped Polar decoding subtree in the LLR solving process is provided, and by solving the height, the reduced decoding complexity can be known.

In yet another implementation, left-aligning the identifier of the LCA with the identifier of the target leaf node, and then calculating an LLR of a subtree whose left child is a root of a third node corresponding to a bit of 1 in the non-common part of the identifiers of the LCA and the target leaf node.

In a second aspect, a Polar code decoding apparatus is provided, which may implement the decoding method in the first aspect or any possible implementation manner of the first aspect. For example, the decoding device of the Polar code can be a chip or a device. The above-described method may be implemented by software, hardware, or by executing corresponding software by hardware.

In a possible implementation manner, the decoding apparatus of Polar code includes a processor, a memory; the processor is configured to support the apparatus to perform the corresponding functions of the decoding method. The memory is used for coupling with the processor, which holds the necessary programs (instructions) and/or data for the device. Optionally, the decoding apparatus of Polar code may further include an input/output interface for supporting communication between the apparatus and other devices.

In another possible implementation manner, the decoding device of Polar code may include a unit or a module for executing corresponding actions in the foregoing method.

In yet another possible implementation manner, the decoding apparatus of Polar code includes a processor; the processor is configured to support the apparatus to perform the corresponding functions of the decoding method.

In another possible implementation manner, the decoding apparatus of Polar code includes a processor, and the processor is configured to couple with a memory, read an instruction in the memory, and implement the method according to the instruction.

In a third aspect, there is provided a computer-readable storage medium having stored therein instructions, which, when run on a computer, cause the computer to perform the method of the first aspect described above.

In a fourth aspect, there is provided a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of the first aspect described above.

Drawings

Fig. 1 is an exemplary decoded number schematic of N-16;

FIG. 2 is a schematic diagram of an exemplary node in decoding using a Simplified algorithm;

FIG. 3 is a schematic diagram of coding an exemplary Polar code;

FIG. 4 is a schematic diagram of a generator matrix used for Polar code encoding of FIG. 3;

FIG. 5 is a schematic diagram of the decoding process of the SC algorithm;

FIG. 6 is a diagram illustrating nodes in different levels of a binary tree labeled with R according to an example embodiment of the present application;

FIG. 7 is a diagram illustrating nodes in different levels of a binary tree labeled with P according to an example embodiment of the present application;

FIG. 8 is a flowchart illustrating a decoding method for Polar codes according to an embodiment of the present application;

FIG. 9 is a schematic diagram of LLR calculation and decoding with skipping the initial frezen bit in one embodiment provided herein;

FIG. 10 is a schematic diagram of LLR calculation and decoding with skipping of intermediate frezen bits in one embodiment provided herein;

FIG. 11 is a schematic diagram of a high resolution of skipped Polar decoding subtrees in an embodiment provided by the present application;

FIG. 12 is a block diagram illustrating a decoding apparatus of Polar codes according to an embodiment of the present application;

fig. 13 is a schematic hardware structure diagram of a decoding device of Polar codes according to an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings.

Polar coding

In the following, the number of bits after one Polar code is coded is represented by N, and the number of bits before coding is represented by K. And the code rate R of Polar code is K/N. The coding scheme of Polar code shown in fig. 3, where N is 8. The resulting matrix is shown in fig. 4.

Decoding process of SC algorithm

As shown in fig. 5, for the decoding process of the SC algorithm: all nodes are recursively processed in a depth-first search binary tree starting with the N LLRs received from the channel.

1) F, calculating: sequentially calculating LLRs of left child nodes from alpha (2^ s LLRs) of the previous stage (s +1 stage) receiving the current stage (s stage);

2) decoding the left child node: returning a decision result beta _ l (2^ (s-1) hard bits) from the decoding of the left child node, wherein the beta _ l is PSUM returned by the (s-1 level) node;

3) g operation: calculating LLR of the right child node according to beta _ l (2^ (s-1) hard bits);

4) decoding the right child node: and returning a decision result beta _ r (2^ (s-1) hard bits) from the decoding of the right child node.

And returning a decoding result: and calculating beta _ i (2^ s hard bits) from beta _ l (2^ (s-1) hard bits) and beta _ r (2^ (s-1) hard bits), and returning to the upper stage (s +1 stage), wherein the beta _ i is the PSUM returned by the (s stage) node.

LCA (common node identifier) search algorithm with preprocessing and lowest common sense time

LCA, refers to the common parent node with the lowest height of two nodes.

Since Polar decoding trees are all full binary trees, the case of a full binary tree is considered here. The left edge is labeled with 0 and the right edge is labeled with 1, then R for each node is the label of the edge that passes from the root node to that node. As shown in fig. 6, a schematic diagram is shown in which nodes on different levels of the binary tree are labeled with R. Note that the root node has no R, and the R length of each layer is related to the number of layers.

Add R post 1 and make up to d bits (d is the total height of the tree, 4 in the example) to get P. As shown in fig. 7, a diagram is shown in which nodes on different levels of the binary tree are labeled P. Note that the root node has no R, and its P is fixed to

Starting from the root node, the binary tree is traversed by a method of middle-order traversal, each node is marked with a sequence number according to the sequence of successive access, and the sequence number is the middle-order sequence number. P is the middle sequence number (order). The process of solving the LCAs of two nodes in a full binary tree is as follows:

pretreatment: and performing middle-order traversal on the full binary tree, and sequentially giving a node reference number P.

And (3) solving LCA: the procedure of the LCA (i, j) of any two nodes (i, j) is: and (4) solving the exclusive or result X of i and j, if the bit of the highest position 1 of X is k (counting from 1 by calculation from the left side), shifting i by d-k bits to the right (non-cyclic shift), shifting the lowest position 1 by d-k bits to the left.

Examples are:

1) a source node i: 0001, destination node j: 1001, X is 1001, k is 1, d is 4, i is 0001 after being shifted right by 4-1-3 bits, the lowest position 1 is 0001, and i is 1000 after being shifted left by 4-1-3 bits, so LCA is the root node (1000).

2) A source node i: 0011, destination node j: 0101, X is 0110, k is 2, d is 4, i is 0001 after right shift by 4-2 bits, the lowest position 1 is 0001, 0100 after left shift by 4-2 bits, LCA is the left node of the second layer.

In the 64-bit decoding tree shown in fig. 2, for the redundant LLR calculation problem of the Rate0 node, a naive solution is to check whether all the child nodes are Rate0 before calculating the LLR of a node, and if so, the PSUM directly returns 0 without calculating LLR. The practical scheme is that the LLR calculation process from a certain node to another node is not quickly judged by traversing the tree nodes, namely the problem of quick routing of two nodes on a decoding tree is solved.

The application provides a Polar code decoding method, device and equipment, which do not need to traverse each node of a binary tree, skip the frozen node to perform LLR calculation after the frozen node is determined through an LCA search algorithm, can reduce decoding complexity and improve decoding efficiency.

Please refer to fig. 8, which is a flowchart illustrating a decoding method of Polar codes according to an embodiment of the present application. Wherein:

s801, determining a freezing node between a first node of a Polar code and a target leaf node, wherein the first node is a middle node or a root node.

Before calculating the LLR of a certain first node to a target leaf node, whether a frozen node exists between the first node and the target leaf node is determined. The first node may be the root node or any intermediate node.

S802, when decoding the first node, calculating a log-likelihood ratio from the first node to the target leaf node, where a PSUM from the first node to the target leaf node is 0.

Then, decoding the first node, and calculating the LLR from the first node to the target leaf node. When calculating the LLR, F operation and G operation are included for the nodes of each layer. When F operation is carried out, if the left child of the node is the frozen node, because the PSUM returned by the frozen node is 0, decoding does not need to be carried out by traversing each node under the first node, and for the node below which is the frozen node, LLR is directly transferred to the right for calculation, and the PSUM of the frozen node is 0.

Optionally, the frozen node is one or more nodes at the beginning of the binary tree of the Polar code, or the frozen node is one or more nodes in the middle of the binary tree of the Polar code, and the one or more nodes include leaf nodes.

In one embodiment, the LLR calculation and decoding may be skipped over the beginning frezen bits. As shown in fig. 9, circle 4 at the beginning of the binary tree (i.e., the nodes below node D are all frozen bits) and the leaf nodes in circle 5 are the frozen bits. Since the number of the leaf nodes passing through the edge is d (d is the tree height), in the binary representation of P (d +1 bits) of the leaf node, the lowest bit is 1, and the rest of the bits are R (d bits), that is: p ═ R (d-1), R (d-2), …, R (1),1 }. As in fig. 9, 16 leaf nodes are included; the binary tree has 5 levels, and d is 5.

According to the LCA search algorithm, the LLR calculation process from the root node to the leaf node can be obtained from P of the leaf node: and R (d-1) is the first edge from the root node, R (d-1) ═ 0 indicates that the left side is moved, R (d-1) ═ 1 indicates that the right side is moved, and the rest is analogized to R (1), so that the target leaf node can be reached.

If the leaf nodes below a certain intermediate node D are all free bits, the calculation process of the coding is as follows:

PSUM＝uG

where G is Polar's generator matrix, and when u is 0, PSUM is also 0, and the PSUMs returned by D to the previous layer are all 0. That is, in the LLR calculation process, the PSUM of the G operation input is 0. Therefore, in the calculation of the LLR, the left child does not need to wait for the PSUM information returned in the G operation (because it is necessarily 0), and the LLR obtained in the G operation can be directly passed to the right.

Then as shown in fig. 9, when calculating the LLR from the B node to the leaf node, the LLR obtained by the G operation can be passed to the right without waiting for the PSUM information returned by the left child D node (because it is necessarily 0) in the G operation. When calculating the LLR from the left node to the leaf node under the node E, the G operation process does not need to wait for the PSUM information returned by the left child (because it is necessarily 0), and the LLR obtained by the G operation can be directly transferred to the right. Thereby improving decoding efficiency.

In another embodiment, LLR calculation and decoding may be performed skipping the intermediate frozen bits. The freezing nodes are one or more nodes in the middle of a binary tree of the Polar code, and the calculating the LLR from the first node to the target leaf node when the first node is decoded comprises the following steps: determining a lowest common father node LCA of a source leaf node and the target leaf node, wherein the LCA is a first node; determining a non-public part of the identifier according to the identifier of the LCA and the identifier of the target leaf node, wherein the identifier adopts binary representation; determining that an LLR calculation path from the first node to the target leaf node is a path represented by the non-public part of the identifier, wherein a first value of the identifier indicates F operation, and a second value of the identifier indicates G operation; and calculating LLR from the first node to the target leaf node according to the determined LLR calculation path.

As shown in fig. 10, a FROZEN bit exists between b1 and b2, and between b2 and b 3. These frozen bits are located in the middle of the binary tree. The middle fragment, the frozen bit, may be skipped when LLR calculation and decoding are performed.

First, LCAs (b1, b2) of the first and last two information bits b1, b2 are determined. The determining the LCA of the source leaf node and the target leaf node may be according to the algorithm of the LCA described above, including: calculating an exclusive or result X of the middle sequence identification of the source leaf node and the middle sequence identification of the target leaf node; and starting calculation from the left side of the X, if the bit of the highest position 1 of the X is k, right-shifting the middle-order identifier of the source leaf node by d-k bits, and left-shifting the lowest position 1 of the identifier after right-shifting by d-k bits to obtain the middle-order identifier of the LCA, wherein d is the height of the binary tree of the Ployar code. The shortest path from b1 to b2 is b1- > LCA (b1, b2) - > b 2. b1- > LCA (b1, b2) is the path returned by the PSUM result, and LCA (b1, b2) - > b2 is the path of LLR computation. When representing a path, 0 is an F operation and 1 is a G operation.

Except that the PSUM input by the G operation performed on the LCA node (which is necessarily the G operation performed on the LCA node, otherwise the node is not the LCA) is not 0, the PSUM of the G operation of the other nodes (source node to LCA) is 0. Therefore, except that the G-operations of the LCA nodes need to be calculated (the calculation process of PSUM is identical to that of the conventional algorithm), the G-operations of other nodes can directly pass LLRs to right children, i.e. the PSUM-operations of these nodes are skipped and the PSUM result is 0.

Then, a method of rapidly solving the decoding path of LLR is described:

in one implementation, a method for fast LLR decoding path resolution using the intermediate sequence number is described as follows:

the two nodes are represented in binary form and left aligned, taking the same portion to the left as the binary representation of the LCA node. The path from the LCA to the target node may be obtained according to the node number: and (4) representing the LCA node and the target node as binary numbers and aligning the LCA node and the target node to the left, wherein the non-public part is a path from the LCA node.

Examples are:

1) r of the source node b1 is 0111, P is 01111, R of the destination node b2 is 1011, and P is 10111. The calculation method according to the LCA described above: x11000,

k

1, 01111 with bit 4 right shifted 5-1 is 00000, 1 is 00001, and with bit 4 left shifted 5-1 is 10000, so LCA is 10000 (root node). Since the LCA is the root node, there is no R. With R (1011) of the target node b2 left aligned with the root node, the non-common portion is 1011. Therefore, as shown in fig. 11, in curve 1, the path from LCA to b2 passing through b1 and b2 is 1011(0 is for F operation, and 1 is for G operation), i.e. from the root node, G is done first, then F is done, and then G is done twice to b 2.

2) R of the source node b2 is 1011, P is 10111, R of the destination node b3 is 1110, P is 11101, X is 01010, k is 2, 10111 right-shifted by 5-2-3 bits is 00010, 1 is 00011, and 11000 after left-shifted by 5-2-3 bits, so LCA is 11000 (node C). R is 1. Left-aligned R (1110) of target node b3 with R (1) of the LCA, the non-common portion is 110. Therefore, as shown in curve 2 of fig. 11, the path from LCA to b3 passing through b2 and b3 is 110(0 is F operation, 1 is G operation), i.e. from node C, G is performed twice, and then F is performed to b 3.

In one implementation, a method for fast LLR decoding path resolution is described as indicated by R number:

two leaf node numbers are represented in binary form (the high deficiency is filled with 0), and the same part length on the left side is the LCA node height, and the same part number on the left side is the LCA node number. The non-common part of the target node is a path from the LCA node to the target node.

Take the LLA calculation between b2 and b3 as an example: r of b2 is 1011, R of b3 is 1110, the same part continuing on the left is 1, so the LCA number (R) is 1, i.e., C node, LCA height is 5-1-4, b2 non-common part is 011, b3 non-common part is 110, the path from LCA to b3 is 110, G is done twice from C node, then F to b 3.

In addition, regarding the calculation of the height of the skipped subtree, for example, in this example: b3 is the LCA right child, so LCAs through b3 are subtrees that skip the LLR computation process, the non-common part is 110, so the height is 2 (the first 1 is located at position-1), and is actually the subtree corresponding to the left child of G; b2 is the LCA left child, so b2 to LCA are subtrees that skip PSUM calculation process, the non-common part is 011, because the right subtree is the node that needs to be passed through, so there is no skipped subtree.

Based on the above method, LLR calculation, PSUM calculation and decoding of the corresponding frozen bits skipping the middle frozen bits can be realized. It is noted that the method is applicable to SC/SCL and is compatible with different types of nodes of Simplified algorithms.

In yet another embodiment, a skipped Polar decoding sub-tree height solution method is described. In order to calculate the complexity of the skipped LLR calculation and the decoding of the node, the height of the skipped Polar decoding sub-tree needs to be solved.

In one implementation, a method for solving the height of the Polar decoding subtree skipped by the PSUM process is provided:

in the process that the starting node starts to the LCA, if the right child of the node does not pass through the node, the right subtree is the skipped subtree.

Fast solving method (taking the use of the middle-order numbering as an example): both LCA node and start node numbers are represented as binary and left aligned, then the subtree whose right child is the root of the node corresponding to the node whose bit is 0 in the non-public part can be skipped.

For example, in the above example, the LCA of b1 and b2 is the root node, and the R (1011) of the target node b2 is left aligned with the root node, then the non-common part is 1011, the node corresponding to bit of 0 in the non-common part is node F, and the PSUM procedure of the subtree whose right child is the root of node F can be skipped because the PSUM result is 0.

In another implementation, a method for solving the height of Polar decoding subtrees skipped by the LLR calculation process is provided:

in the process from the LCA to the destination node, if the left child of the node has no passed node, the left subtree is the skipped subtree.

Fast solving method (taking the use of the middle-order numbering as an example): the numbers of the LCA node and the destination node are both expressed as binary and are aligned to the left, then the sub-tree whose left child is the root of the node can be skipped over for the node corresponding to the bit of 1 in the non-public part.

For example, as shown in FIG. 11, R of source node b1 is 0111, R of destination node b2 is 1011, and LCA is the root node.

The path from b1 to LCA to b2 is divided into two segments, the first segment is from b1 to LCA, and the second segment is from LCA to b2

1) The path from B1 to the LCA is available from R (0111) of B1 (since there is no R at the root node), node B is the first left node, but the traversed path is E node right child of node B, so no sub-tree is skipped on the path from B1 to the LCA.

2) The path from LCA to B2 is available from R of B2 (also because the root node has no R), the first right direction is from the root node to C node, but the left child of LCA (node B) is the path we have traversed so this step does not skip a sub-tree, the second right direction is from F node to the right child of F node (No. 2), where the left child of F node (No. 1) we have not traversed so the left child of F (No. 1) is the sub-tree of the root node that can be skipped, sub-tree height is 2. The third right direction is the right child (node 6) of the right child (node 2) of F, where the left child (node 5) of node 2 also does not pass, so a subtree is also skipped, having a height of 1.

For another example, as shown in fig. 11, when R of b2 is 1011, b3 is 1110, and the same left part is 1, the number (R) of the LCA node is 1, that is, the C node, the height of the LCA node is 5-1-4, the non-common part with R of b2 is 011, and the non-common part with R of b3 is 110, the path from the LCA node-C node to b3 is: the C node performs two G operations and then performs one F operation to b 3.

Calculation of the height of the skipped subtree: b3 is the LCA right child, so the non-common part of LCAs through b3 is 110, so the left child of G (node 7) is skipped as the subtree of the root node.

b2 is the LCA left child, so b2 to LCA are subtrees that skip PSUM calculation process, the non-common part is 011, because F's right child (number 2) is the node that needs to be passed through, so there is no skipped subtree.

According to the decoding method of Polar codes, nodes of a binary tree do not need to be traversed, after the frozen nodes are determined, the frozen nodes are skipped through an LCA search algorithm to carry out LLR calculation, decoding complexity can be reduced, and decoding efficiency is improved.

The method of the embodiments of the present application is set forth above in detail and the apparatus of the embodiments of the present application is provided below.

Based on the same concept of the Polar code decoding method in the above embodiment, as shown in fig. 12, the embodiment of the present application further provides a Polar code decoding apparatus 1200, which can be applied to the decoding method shown in fig. 8. The decoding apparatus 1200 includes a determination unit 121 and a calculation unit 122. Wherein:

a determining unit 121, configured to determine a frozen node between a first node of a Polar code and a target leaf node, where the first node is an intermediate node or a root node;

a calculating unit 122, configured to calculate a log-likelihood ratio LLR from the first node to the target leaf node when decoding the first node, where a PSUM from the first node to the target leaf node is 0.

In another implementation manner, the frozen node is one or more nodes in the middle of the binary tree of the Polar code, and the calculating unit 122 is specifically configured to: determining a lowest common father node LCA of a source leaf node and the target leaf node, wherein the LCA is a first node; determining a non-public part of the identifier according to the identifier of the LCA and the identifier of the target leaf node, wherein the identifier adopts binary representation; determining that an LLR calculation path from the first node to the target leaf node is a path represented by the non-public part of the identifier, wherein a first value of the identifier indicates F operation, and a second value of the identifier indicates G operation; and calculating LLR from the first node to the target leaf node according to the determined LLR calculation path.

In another implementation, the determining unit 121 is specifically configured to: calculating an exclusive or result X of the middle sequence identification of the source leaf node and the middle sequence identification of the target leaf node; and starting calculation from the left side of the X, if the bit of the highest position 1 of the X is k, right-shifting the middle-order identifier of the source leaf node by d-k bits, and left-shifting the lowest position 1 of the identifier after right-shifting by d-k bits to obtain the middle-order identifier of the LCA, wherein d is the height of the binary tree of the Ployar code.

In another implementation, the determining unit 121 is specifically configured to: and left aligning the identification of the LCA and the identification of the target leaf node, and determining the non-public part of the identification of the target leaf node and the identification of the LCA.

More detailed descriptions about the determining unit 121 and the calculating unit 122 can be directly obtained by referring to the related descriptions of the decoding apparatus in the embodiment of the method shown in fig. 8, which are not repeated herein.

Fig. 13 is a schematic hardware structure diagram of a decoding device of Polar codes according to an embodiment of the present application. As shown in fig. 13, the decoding apparatus 1300 may include:

an input device 131, an output device 132, a memory 133 and a processor 134 (the number of processors 134 in the decoding apparatus may be one or more, and one processor is taken as an example in fig. 13). In some embodiments of the present application, the input device 131, the output device 132, the memory 133 and the processor 134 may be connected by a bus or other means, wherein the bus connection is taken as an example in fig. 13.

Wherein the processor 134 is configured to perform the following steps:

determining a freezing node between a first node of a Polar code and a target leaf node, wherein the first node is a middle node or a root node;

when the first node is decoded, calculating a log-likelihood ratio LLR from the first node to the target leaf node, wherein PSUM from the first node to the target leaf node is 0.

In another implementation, the frozen node is one or more nodes in the middle of a binary tree of the Polar code, and the step of calculating LLRs from the first node to the target leaf node by the processor 134 when decoding the first node includes: determining a lowest common father node LCA of a source leaf node and the target leaf node, wherein the LCA is a first node; determining a non-public part of the identifier according to the identifier of the LCA and the identifier of the target leaf node, wherein the identifier adopts binary representation; determining that an LLR calculation path from the first node to the target leaf node is a path represented by the non-public part of the identifier, wherein a first value of the identifier indicates F operation, and a second value of the identifier indicates G operation; and calculating LLR from the first node to the target leaf node according to the determined LLR calculation path.

In yet another implementation, the processor 134 performs the step of determining the LCA of the source leaf node and the target leaf node, including: calculating an exclusive or result X of the middle sequence identification of the source leaf node and the middle sequence identification of the target leaf node; and starting calculation from the left side of the X, if the bit of the highest position 1 of the X is k, right-shifting the middle-order identifier of the source leaf node by d-k bits, and left-shifting the lowest position 1 of the identifier after right-shifting by d-k bits to obtain the middle-order identifier of the LCA, wherein d is the height of the binary tree of the Ployar code.

In yet another implementation, the processor 134 performs the step of determining the non-public portion of the identity based on the identity of the LCA and the identity of the target leaf node, including: and left aligning the identification of the LCA and the identification of the target leaf node, and determining the non-public part of the identification of the target leaf node and the identification of the LCA.

The Polar code decoding device is used for executing the Polar code decoding method. Part or all of the decoding method of the Polar code can be realized by hardware or software.

Optionally, the decoding device of Polar code may be a chip or an integrated circuit when implemented specifically.

Optionally, when part or all of the decoding method of Polar code in the above embodiments is implemented by software, the decoding device of Polar code includes: a memory for storing a program; and a processor, configured to execute the program stored in the memory, and when the program is executed, enable the Polar code decoding device to implement the method for decoding Polar codes provided in the embodiment shown in fig. 8.

Alternatively, the memory may be a physically separate unit or may be integrated with the processor. The memory may also be used to store data.

Optionally, when part or all of the decoding method of Polar codes in the above embodiments is implemented by software, the decoding device of Polar codes may only include a processor. The memory for storing the program is arranged outside the decoding device of Polar codes, and the processor is connected with the memory through a circuit/electric wire and is used for reading and executing the program stored in the memory.

The processor may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.

The processor may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.

The memory may include volatile memory (volatile memory), such as random-access memory (RAM); the memory may also include a non-volatile memory (non-volatile) such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory may also comprise a combination of memories of the kind described above.

It is understood that the units in the decoding device embodiments of the above Polar codes may also be referred to as modules.

It can be understood that the functions of the functional modules of the device 1300 in this embodiment may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the relevant description of the foregoing method embodiment, which is not described herein again.

It should be noted that the terms "system" and "network" in the embodiments of the present application may be used interchangeably. The "plurality" means two or more, and in view of this, the "plurality" may also be understood as "at least two" in the embodiments of the present application. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" generally indicates that the preceding and following related objects are in an "or" relationship, unless otherwise specified.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the division of the unit is only one logical function division, and other division may be implemented in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. The shown or discussed mutual coupling, direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some interfaces, and may be in an electrical, mechanical or other form.

Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions according to the embodiments of the present application are wholly or partially generated when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on or transmitted over a computer-readable storage medium. The computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)), or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The usable medium may be a read-only memory (ROM), or a Random Access Memory (RAM), or a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape, a magnetic disk, or an optical medium, such as a Digital Versatile Disk (DVD), or a semiconductor medium, such as a Solid State Disk (SSD).

Claims

1. A decoding method of Polar codes is characterized by comprising the following steps:

2. The method of claim 1, wherein said frozen node is one or more nodes at the beginning of a binary tree of said Polar code or said frozen node is one or more nodes in the middle of a binary tree of said Polar code, said one or more nodes comprising leaf nodes.

3. The method of claim 2, wherein said frozen node is one or more nodes in the middle of a binary tree of said Polar codes, said calculating LLRs for said first node to said target leaf node when decoding said first node comprises:

determining a lowest common father node LCA of a source leaf node and the target leaf node, wherein the LCA is a first node;

determining a non-public part of the identifier according to the identifier of the LCA and the identifier of the target leaf node, wherein the identifier adopts binary representation;

determining that an LLR calculation path from the first node to the target leaf node is a path represented by the non-public part of the identifier, wherein a first value of the identifier indicates F operation, and a second value of the identifier indicates G operation;

and calculating the LLR from the first node to the target leaf node according to the determined LLR calculation path.

4. The method of claim 3, wherein the determining the LCAs of the source leaf node and the target leaf node comprises:

calculating an exclusive or result X of the middle sequence identification of the source leaf node and the middle sequence identification of the target leaf node;

and starting calculation from the left side of the X, if the bit of the highest position 1 of the X is k, right-shifting the middle-order identifier of the source leaf node by d-k bits, and left-shifting the lowest position 1 of the identifier after right-shifting by d-k bits to obtain the middle-order identifier of the LCA, wherein d is the height of the binary tree of the Ployar code.

5. The method of claim 3 or 4, wherein said determining a non-public portion of the identity based on the identity of the LCA and the identity of the target leaf node comprises:

and left aligning the identification of the LCA and the identification of the target leaf node, and determining the non-public part of the identification of the target leaf node and the identification of the LCA.

6. The method of any of claims 3 to 5, wherein from the source leaf node to the LCA, if any second node's right child has no passing node, then computing LLA for the left sub-tree of the second node whose right sub-tree has a PSUM result of 0.

7. The method of claim 6, wherein left aligning the identity of the LCA with the identity of the source leaf node, the PSUM result of the subtree whose right child is the root of the second node is 0 for the second node corresponding to the bit of 0 in the non-common portion of the identity of the LCA and the identity of the source leaf node.

8. The method of any of claims 3 to 7, wherein from the LCA to the destination leaf node, if the left child of any third node has no passed node, then no LLR is calculated for the left sub-tree of the third node.

9. The method of claim 8, wherein left aligning the identity of the LCA with the identity of the target leaf node, then a third node corresponding to a bit of 1 in the non-common part of the identity of the LCA and the identity of the target leaf node, then does not compute an LLR for a subtree rooted at a left child of the third node.

10. An apparatus for decoding Polar codes, the apparatus comprising:

the determining unit is used for determining a freezing node between a first node of a Polar code and a target leaf node, wherein the first node is a middle node or a root node;

a calculating unit, configured to calculate a log-likelihood ratio LLR from the first node to the target leaf node when decoding the first node, where a PSUM from the first node to the target leaf node is 0.

11. The apparatus of claim 10, wherein said frozen node is one or more nodes at the beginning of a binary tree of said Polar code or said frozen node is one or more nodes in the middle of a binary tree of said Polar code, said one or more nodes comprising leaf nodes.

12. The apparatus according to claim 11, wherein said frozen node is one or more nodes in the middle of a binary tree of said Polar codes, and said computing unit is specifically configured to:

13. The apparatus as claimed in claim 12, wherein said determining unit is specifically configured to:

14. The apparatus according to claim 12 or 13, wherein the determining unit is specifically configured to:

15. A chip system, the chip system comprising a processor for supporting a terminal device to implement the communication method of any one of claims 1 to 9.

16. A computer program product for, when executed on a computing device, implementing the method of any of claims 1-9.

17. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-9.