CN111367462B - Data processing method and device - Google Patents

Data processing method and device Download PDF

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CN111367462B
CN111367462B CN201811594377.9A CN201811594377A CN111367462B CN 111367462 B CN111367462 B CN 111367462B CN 201811594377 A CN201811594377 A CN 201811594377A CN 111367462 B CN111367462 B CN 111367462B
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tail
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linked list
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CN111367462A (en
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庄开锋
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Zhaoyi Innovation Technology Group Co ltd
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Zhaoyi Innovation Technology Group Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608—Saving storage space on storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The embodiment of the invention provides a data processing method and a data processing device, wherein the method is applied to a nonvolatile memory, a storage linked list is arranged in the nonvolatile memory, the storage linked list comprises at least one linked list node, and the linked list node is used for recording N blocks of data starting from a preset logical block address and corresponding timestamps. In the embodiment of the invention, the block data is stored in the nonvolatile memory in a linked list mode, specifically, the nonvolatile memory is provided with a storage linked list, the storage linked list comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, and N is a natural number. A plurality of block data and a timestamp corresponding to the plurality of block data can be recorded in one linked list node, and compared with the prior art in which one block data corresponds to one timestamp, the space can be obviously saved.

Description

Data processing method and device
Technical Field
The present invention relates to the field of memory processing technologies, and in particular, to a data processing method and apparatus.
Background
With the development of various electronic devices, embedded systems, and the like, nonvolatile memory devices are widely used in electronic products. In the nonvolatile storage, an eMMC (embedded multimedia Card) controller may be provided, and a memory space of the eMMC is generally small.
In the prior art, when data processing is performed in eMMC, the block data is usually implemented in arrays, and each array records one data and one KEY for indicating a data processing time stamp.
However, the inventor finds that the above technical solution has the following defects in the process of researching the above technical solution: since each array stores only one data, the space occupation is large, so that the eMMC can store only a small amount of data.
Disclosure of Invention
In view of the above problems, a data processing method and apparatus in an embodiment of the present invention are provided to solve the problem that space occupation is large due to array storage.
According to a first aspect of the present invention, a data processing method is provided, which is applied to a nonvolatile memory, wherein a storage linked list is arranged in the nonvolatile memory, the storage linked list comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, and N is a natural number; the method comprises the following steps:
receiving a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing timestamp;
determining tail logic block address information according to the head logic block address information and the block data number;
determining head chain table nodes corresponding to the head logical block address information in the storage chain table and head node positions corresponding to the head logical block address information in the head chain table nodes;
determining a tail link table node corresponding to the tail logical block address information in the storage link table and a tail node position corresponding to the tail logical block address information in the head link table node;
deleting intermediate linked list nodes between the head linked list nodes and the tail linked list nodes;
according to the head logical block address information at the head node position corresponding to the head linked list node, performing data processing corresponding to the data processing instruction in the head linked list node, and changing a timestamp corresponding to the position of performing data processing in the head linked list node into the processing timestamp;
and according to the tail node position of the tail logic block address information corresponding to the tail chain table node, performing data processing corresponding to the data processing instruction in the tail chain table node, and changing a timestamp corresponding to the position of performing data processing in the tail chain table node into the processing timestamp.
Preferably, the data processing instructions comprise insert data instructions;
the said according to the said head logical block address information is in the head node position that the said head linked list node corresponds, carry on the data processing corresponding to said data processing order in the said head linked list node, and change the said time stamp that the position that carries on the data processing in the said head linked list node corresponds to is the said processing time stamp, include:
performing insertion data processing in the head linked list nodes according to the head logical block address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions of the head linked list nodes for performing insertion data processing into the processing timestamps;
the data processing corresponding to the data processing instruction is performed in the tail chain table node according to the tail logical block address information at the tail node position corresponding to the tail chain table node, and the data processing method comprises the following steps:
and performing insertion data processing in the tail chain table node according to the tail node position of the tail logic block address information corresponding to the tail chain table node, and changing a timestamp corresponding to the position of performing insertion data processing in the tail chain table node into the processing timestamp.
Preferably, the data processing instructions also correspond to data to be inserted; the processing timestamp comprises an insertion timestamp;
according to the head logical block address information is in the head node position that the head linked list node corresponds, insert data processing in the head linked list node, and change the timestamp that the position that inserts data processing in the head linked list node corresponds is the processing timestamp, include:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
inserting the previous data corresponding to the head node position and the position after the head node position in the data to be inserted into the head linked list node from the head node position, and modifying the time stamps corresponding to the head node position and the position after the head node position to be the insertion time stamps;
the inserting data processing is carried out in the tail chain table node according to the tail logical block address information at the tail node position corresponding to the tail chain table node, and the timestamp corresponding to the position where the inserting data processing is carried out in the tail chain table node is changed into the processing timestamp, and the method comprises the following steps:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
correspondingly inserting the posterior data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node, and modifying the time stamps corresponding to the tail node position and the position before the tail node position to be the insertion time stamps;
the method further comprises the following steps:
and inserting intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
Preferably, the data processing instruction comprises a delete data instruction;
the basis the head logical block address information is in head link table node corresponding head node position carry out in the head link table node corresponding to the data processing of data processing instruction, and change carry out the timestamp that data processing's position corresponds in the head link table node and do the processing time stamp, include:
according to the head logical block address information at the head node position corresponding to the head linked list node, performing data deletion processing in the head linked list node, and changing a timestamp corresponding to the position of the head linked list node where the data deletion processing is performed into the processing timestamp;
the processing method includes the steps that according to the tail logical block address information at the tail node position corresponding to the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position where the data processing is carried out in the tail chain table node is changed to be the processing timestamp:
and according to the tail node position of the tail logic block address information corresponding to the tail chain table node, performing data deletion processing in the tail chain table node, and changing a timestamp corresponding to the position of the tail chain table node where the data deletion processing is performed into the processing timestamp.
Preferably, the processing time stamp includes: deleting the timestamp;
according to the head logical block address information at the head node position corresponding to the head linked list node, deleting data processing is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into the processing timestamp, including:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
changing a timestamp corresponding to a position for deleting data processing in the head linked list node into the deletion timestamp;
according to the tail logical block address information at the tail node position corresponding to the tail chain table node, deleting data in the tail chain table node, and changing the timestamp corresponding to the position of deleting data in the tail chain table node as the processing timestamp, the method comprises the following steps:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
and changing the timestamp corresponding to the position for deleting the data processing in the tail link table node into the deletion timestamp.
According to a second aspect of the present invention, there is provided a data processing apparatus, which is applied to a nonvolatile memory, wherein a storage linked list is arranged in the nonvolatile memory, the storage linked list includes at least one linked list node, the linked list node is configured to record N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, where N is a natural number; the device comprises:
the receiving module is used for receiving a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing timestamp;
the tail logic block address information determining module is used for determining tail logic block address information according to the head logic block address information and the block data number;
a head node position determining module, configured to determine a head linked list node corresponding to the head logical block address information in the storage linked list, and a head node position corresponding to the head logical block address information in the head linked list node;
a tail node position determining module, configured to determine a tail link table node corresponding to the tail logical block address information in the storage link table, and a tail node position corresponding to the tail logical block address information in the head link table node;
the intermediate linked list node deleting module is used for deleting the intermediate linked list node between the head linked list node and the tail linked list node;
a head linked list node processing module, configured to perform data processing corresponding to the data processing instruction in the head linked list node according to a head node position corresponding to the head linked list node to which the head logical block address information is stored, and change a timestamp corresponding to a position where data processing is performed in the head linked list node to the processing timestamp;
and the tail chain table node processing module is used for carrying out data processing corresponding to the data processing instruction in the tail chain table node according to the tail node position corresponding to the tail chain table node according to the tail logic block address information, and changing the timestamp corresponding to the position for carrying out data processing in the tail chain table node into the processing timestamp.
Preferably, the data processing instructions comprise insert data instructions;
the head chain table node processing module comprises:
the first head chain table node processing submodule is used for performing insertion data processing in the head chain table node according to the head logical block address information at the head node position corresponding to the head chain table node, and changing a timestamp corresponding to the position where the insertion data processing is performed in the head chain table node into the processing timestamp;
the tail chain table node processing module comprises:
and the first tail chain table node processing submodule is used for performing insertion data processing in the tail chain table node according to the tail logical block address information at the tail node position corresponding to the tail chain table node, and changing a timestamp corresponding to the position where the insertion data processing is performed in the tail chain table node into the processing timestamp.
Preferably, the data processing instructions also correspond to data to be inserted; the processing timestamp comprises an insertion timestamp;
the first head chain table node processing submodule comprises:
the first retaining unit is used for retaining data before the position of a head node in the head linked list nodes;
the first deleting unit is used for deleting the data corresponding to the head node position in the head linked list nodes and the data behind the head node position;
a first processing unit, configured to insert previous data in the to-be-inserted data, where the previous data corresponds to the head node position and a position after the head node position, into the head link table node from the head node position, and modify timestamps corresponding to the head node position and the position after the head node position to be the insertion timestamps;
the first tail link table node processing submodule comprises:
the second reservation unit is used for reserving data behind the tail node position in the tail chain table node;
the second deleting unit is used for deleting the data corresponding to the tail node position in the tail link table node and the data before the tail node position;
the second processing unit inserts the post data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node position correspondingly, and modifies the corresponding timestamps of the tail node position and the tail node position to be the insertion timestamps;
the device further comprises:
and the inserting module is used for inserting the intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
Preferably, the data processing instruction comprises a delete data instruction;
the head chain table node processing module comprises:
the second head linked list node processing submodule is used for carrying out data deleting processing in the head linked list nodes according to the head link address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions for carrying out data deleting processing in the head linked list nodes into the processing timestamps;
the processing module according to the tail chain table comprises:
and the second tail link table node processing submodule is used for deleting data in the tail link table node according to the tail node position corresponding to the tail link table node of the tail logical block address information, and changing the time stamp corresponding to the position where the data deletion processing is carried out in the tail link table node into the processing time stamp.
Preferably, the processing time stamp includes: deleting the timestamp;
the second head linked list node processing submodule comprises:
a third reserving unit, configured to reserve data before a head node position in the head linked list nodes;
a third deleting unit, configured to delete data corresponding to a head node position in the head linked list nodes and data after the head node position;
a first changing unit, configured to change a timestamp corresponding to a location in the head linked list node where data deletion processing is performed as the deletion timestamp;
the second tail link table node processing submodule includes:
a fourth reserving unit, configured to reserve data after a tail node position in the tail link table node;
a fourth deleting unit, configured to delete data corresponding to a tail node position in the tail link table node and data before the tail node position;
and the second changing unit is used for changing the timestamp corresponding to the position for deleting the data in the tail link table node into the deletion timestamp.
In the embodiment of the invention, the storage of the block data is realized in a linked list manner in the nonvolatile memory, specifically, the nonvolatile memory is provided with a storage linked list, the storage linked list comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, and N is a natural number. A plurality of block data and a timestamp corresponding to the plurality of block data can be recorded in one linked list node, and compared with the prior art in which one block data corresponds to one timestamp, the space can be obviously saved. The implementation of the data processing of the nonvolatile memory in the embodiment of the present invention is as follows: after receiving a data combing instruction corresponding to the head logical block address information, the block data number and the processing timestamp, determining tail logical block address information according to the head logical block address information and the block data number; then determining head chain table nodes corresponding to the head logical block address information in the storage chain table and head node positions corresponding to the head logical block address information in the head chain table nodes; determining tail link table nodes corresponding to the tail logical block address information in the storage link table and tail node positions corresponding to the tail logical block address information in the head link table nodes; when the nonvolatile memory is used for processing, the original data is invalid no matter the data is written or deleted, so that the intermediate linked list node between the head linked list node and the tail linked list node is deleted; according to the head node position of the head logic block address information corresponding to the head linked list node, data processing corresponding to the data processing instruction is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into a processing timestamp; according to the tail logical block address information at the tail node position corresponding to the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position where the data processing is carried out in the tail chain table node is changed into a processing timestamp; thereby realizing data processing for the nonvolatile memory.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 is a flowchart of a data processing method according to an embodiment of the present invention;
fig. 2 is a block diagram of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description thereof. It should be understood that the specific embodiments described herein are merely illustrative of the invention, are only a few examples of the invention, are not intended to limit the invention.
Referring to fig. 1, a flowchart of a data processing method is shown, and is applied to a nonvolatile memory, where the nonvolatile memory is provided with a storage chain table, the storage chain table includes at least one chain table node, and the chain table node is used to record N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, where N is a natural number.
In the embodiment of the present invention, the preset logical Block Address may be LBA0, where LBA (logical Block Address) is a general mechanism for describing an Address of a Block where data on the storage device is located; for example, a linked list node records (LBA 0, CNT 100, KEY 55), where CNT is the number of block data and KEY is the timestamp corresponding to the block data; it can be shown that 100 blocks of data starting from LBA0 are stored in the linked list node, and the storage time stamp of the 100 blocks of data is identified as 55.
The method specifically comprises the following steps:
step 101: receiving a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing time stamp.
In the embodiment of the present invention, the data processing instruction may be an insertion instruction, a deletion instruction, and the like corresponding to the nonvolatile memory, and the data processing instruction corresponds to the header logical block address information, the block data number, and the processing timestamp of the data to be inserted. Specifically, the first logical block address information may be logical address information corresponding to a first block data in the data to be inserted, and the number of block data may be the number of block data included in the data to be inserted; the processing timestamp may be a timestamp corresponding to the received data processing instruction, or may also be a timestamp corresponding to the data to be inserted when the data to be inserted is processed, which is not specifically limited in this embodiment of the present invention.
For example, the data processing instruction may correspond to (LBA 10, cnt 6, key 66), which indicates that the data processing instruction is to perform processing of 6 blocks of data at LBA10, LBA 11, LBA12, LBA13, LBA14, LBA15, LBA10 is header logical block address information, and the processing timestamp may be identified by 66.
Step 102: and determining tail logic block address information according to the head logic block address information and the block data number.
For example, if the operation of adding 1 to the address information is repeated from the head logical block address information to instruct the number of operations to reach 1 position less than the number of the block data, the address information can be obtained as a logical view. Taking the example that the data processing instruction may correspond to (LBA 10, CNT 6, KEY 66), the tail LBA information may be determined to be LBA15 as described with reference to step 101.
It is understood that, a person skilled in the art may determine the logical block address information according to an actual application scenario, and the embodiment of the present invention is not limited in this respect.
Step 103: and determining head linked list nodes corresponding to the head logical block address information in the storage linked list and head node positions corresponding to the head linked list nodes of the head logical block address information.
In the embodiment of the present invention, as an example, it is assumed that a storage chain table includes 3 chain table nodes, where a first chain table node records (LBA 0, CNT 12, key 22), a second chain table node records (LBA 12, CNT 2, key 33), a third chain table node records (LBA 14, CNT 5, key 44), and a data processing instruction corresponds to (LBA 10, CNT 6, key 66), it may be determined that the head logical block address information 10 belongs to the first chain table node, the first chain table node is the head chain table node, and the head logical block address information is LBA10 at a head node corresponding to the head chain table node.
Step 104: and determining a tail link table node corresponding to the tail logical block address information in the storage link table, and determining a tail link table node corresponding to the tail logical block address information in the head link table node.
Continuing with the example in step 103, because the tail LBA information LBA15 belongs to a third linked list node, the third linked list node is a tail linked list node, and the tail LBA information LBA15 is located at a tail node corresponding to the tail linked list node.
Step 105: and deleting the intermediate linked list node between the head linked list node and the tail linked list node.
Continuing with the example in step 103, since data in the same address is deleted regardless of the insertion or deletion operation when data processing is performed on the nonvolatile memory, the second linked list node between the head linked list node and the tail linked list node may be used as an intermediate linked list node, and the second linked list node and the content recorded in the second linked list node are deleted.
Step 106: and according to the head logical block address information at the head node position corresponding to the head linked list node, performing data processing corresponding to the data processing instruction in the head linked list node, and changing the timestamp corresponding to the position of performing data processing in the head linked list node into the processing timestamp.
Step 107: and according to the tail node position of the tail logic block address information corresponding to the tail chain table node, performing data processing corresponding to the data processing instruction in the tail chain table node, and changing a timestamp corresponding to the position of performing data processing in the tail chain table node into the processing timestamp.
In the embodiment of the present invention, through step 103 and step 104, the head node position of the head logical block address information corresponding to the head linked list node and the tail node position of the tail logical block address information corresponding to the tail linked list node can be determined, so that data processing corresponding to the data processing instruction can be performed according to the head node position and the tail node position, and the timestamp corresponding to the position where the data processing is performed is modified to the processing timestamp.
In a specific application, the data processing instruction may include an insert data instruction or a delete data instruction, and the like.
In a preferred embodiment, the data processing instructions include insert data instructions;
the said according to the said head logical block address information is in the head node position that the said head linked list node corresponds, carry on the data processing corresponding to said data processing order in the said head linked list node, and change the said time stamp that the position that carries on the data processing in the said head linked list node corresponds to is the said processing time stamp, include:
and according to the head logical block address information, performing insertion data processing in the head linked list nodes according to the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions for performing insertion data processing in the head linked list nodes into the processing timestamps.
Specifically, the data processing instruction further corresponds to data to be inserted; the processing timestamp comprises an insertion timestamp;
according to the head logical block address information is in the head node position that the head linked list node corresponds, insert data processing in the head linked list node, and change the timestamp that the position that inserts data processing in the head linked list node corresponds is the processing timestamp, include:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
and inserting the previous data corresponding to the head node position and the position after the head node position in the data to be inserted into the head linked list node from the head node position, and modifying the time stamps corresponding to the head node position and the position after the head node position to be the insertion time stamps.
In the embodiment of the invention, because the data before the head node position in the head linked list nodes is not subjected to the insertion operation, the data needs to be reserved; the data corresponding to the head node position in the head chain table nodes and the data behind the head node position need to be replaced, so the deletion is carried out; and then inserting the head linked list nodes from the head node position of the previous data corresponding to the head node position and the position behind the head node position in the data to be inserted, and modifying the time stamps corresponding to the head node position and the position behind the head node position to be the insertion time stamps.
For example, continuing with the example in step 103, the head node position is LBA10, and therefore, data and timestamps corresponding to LBA0 to LBA 9 in the first link table node as the head link table node are retained, data corresponding to LBA10 and LBA 11 in the first link table node is deleted, previous data corresponding to LBA10 and LBA 11 in the data processing instruction is inserted into LBA10 and LBA 11, and the timestamp recorded in LBA10 and LBA 11 is modified to be insertion timestamp 66.
Similarly, the performing, in the tail-link table node, data processing corresponding to the data processing instruction according to the tail node position of the tail logical block address information corresponding to the tail-link table node includes:
and performing insertion data processing in the tail chain table node according to the tail node position of the tail logic block address information corresponding to the tail chain table node, and changing a timestamp corresponding to the position of performing insertion data processing in the tail chain table node into the processing timestamp.
Specifically, the data processing instruction further corresponds to data to be inserted; the processing timestamp comprises an insertion timestamp;
according to the tail logical block address information at the tail node position corresponding to the tail chain table node, performing insertion data processing in the tail chain table node, and changing the timestamp corresponding to the position where the insertion data processing is performed in the tail chain table node as the processing timestamp, the method comprises the following steps:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
correspondingly inserting the posterior data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node position, and modifying the corresponding timestamps of the tail node position and the tail node position to be the insertion timestamps.
In the embodiment of the invention, because the data behind the tail node position in the tail chain table node is not subjected to the insertion operation, the data needs to be reserved; the data corresponding to the tail node position in the tail link table node and the data before the tail node position need to be replaced, so that deletion is carried out; and then correspondingly inserting the post data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the positions before the tail node position and the tail node position, and modifying the insertion time stamps corresponding to the tail node position and the position before the tail node position.
In an example, continuing with the example in step 103, the tail node position is LBA15, so that data and timestamps corresponding to LBA 16 to LBA 18 in the third linked list node serving as the tail linked list node are retained, data corresponding to LBA14 and LBA15 in the third linked list node is deleted, the subsequent data corresponding to LBA14 and LBA15 in the data processing instruction is inserted into LBA14 and LBA15, and the timestamp recorded in LBA14 and LBA15 is modified to be insertion timestamp 66.
Suitably, the method further comprises:
and inserting intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
For example, continuing with the example in step 103, the LBA12 and LBA13 corresponding to the data processing instruction may be inserted as intermediate data between the head linked list node and the tail linked list node to complete data insertion.
In a preferred embodiment, the data processing instruction comprises a delete data instruction;
the basis the head logical block address information is in head link table node corresponding head node position carry out in the head link table node corresponding to the data processing of data processing instruction, and change carry out the timestamp that data processing's position corresponds in the head link table node and do the processing time stamp, include:
according to the head logical block address information, performing data deletion processing in the head linked list nodes at head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions of the data deletion processing in the head linked list nodes into processing timestamps;
the processing method includes the following steps that according to the tail node position corresponding to the tail logical block address information in the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position where the data processing is carried out in the tail chain table node is changed into the processing timestamp, and the processing method includes the following steps:
and according to the tail node position of the tail logic block address information corresponding to the tail chain table node, performing data deletion processing in the tail chain table node, and changing a timestamp corresponding to the position of the tail chain table node where the data deletion processing is performed into the processing timestamp.
Specifically, the processing time stamp includes: deleting the timestamp;
according to the head logical block address information at the head node position corresponding to the head linked list node, deleting data processing is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into the processing timestamp, including:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
and changing the time stamp corresponding to the position for deleting the data processing in the head linked list node into the deleting time stamp.
In the embodiment of the invention, because the data before the head node position in the head linked list node is not deleted, the data needs to be reserved; and modifying the timestamps corresponding to the head node position and the position after the head node position to be the deleting timestamps.
In an example, continuing with the example in step 103, the head node position is LBA10, so that data and timestamps corresponding to LBA0 to LBA 9 in the first linked list node serving as the head linked list node are retained, data corresponding to LBA10 and LBA 11 in the first linked list node is deleted, and the timestamps recorded in LBA10 and LBA 11 are modified to be insertion timestamps 66.
Similarly, the deleting data in the tail chain table node according to the tail node position corresponding to the tail logical block address information in the tail chain table node, and changing the timestamp corresponding to the position where the deleting data is processed in the tail chain table node to be the processing timestamp, includes:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
and changing the timestamp corresponding to the position for deleting the data in the tail link table node into the deletion timestamp.
In the embodiment of the invention, because the data behind the tail node position in the tail chain table node is not deleted, the data needs to be reserved; data corresponding to the tail node position in the tail link table node and data before the tail node position need to be deleted; and modifying the timestamps corresponding to the tail node position and the position before the tail node position to be the deleting timestamps.
In the example, the description is continued by taking the example in step 103, and the tail node is LBA15, so that the data and the time stamp corresponding to LBA 16 to LBA 18 in the third link table node serving as the tail link table node are reserved, the data corresponding to LBA14 and LBA15 in the third link table node is deleted, and the time stamp recorded in LBA14 and LBA15 is modified to delete the time stamp 66.
In the embodiment of the invention, the storage of the block data is realized in a linked list manner in the nonvolatile memory, specifically, the nonvolatile memory is provided with a storage linked list, the storage linked list comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, and N is a natural number. A plurality of block data and a timestamp corresponding to the plurality of block data can be recorded in one linked list node, and compared with the prior art in which one block data corresponds to one timestamp, the space can be obviously saved. The implementation of the data processing of the nonvolatile memory in the embodiment of the present invention is as follows: after receiving a data combing instruction corresponding to the head logical block address information, the block data number and the processing timestamp, determining tail logical block address information according to the head logical block address information and the block data number; then determining head linked list nodes corresponding to the head logical block address information in the storage linked list and head node positions corresponding to the head logical block address information in the head linked list nodes; determining tail link table nodes corresponding to the tail logical block address information in the storage link table and tail node positions corresponding to the tail logical block address information in the head link table nodes; when the nonvolatile memory is used for processing, the original data is invalid no matter the data is written or deleted, so that the intermediate linked list node between the head linked list node and the tail linked list node is deleted; according to the head node position of the head logic block address information corresponding to the head linked list node, data processing corresponding to the data processing instruction is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into a processing timestamp; according to the tail node position of the tail logical block address information corresponding to the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position of the tail chain table node where the data processing is carried out is changed into a processing timestamp; thereby realizing data processing for the nonvolatile memory.
It should be noted that the foregoing method embodiments are described as a series of acts or combinations for simplicity in explanation, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts or acts described, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Referring to fig. 2, a block diagram of a data processing apparatus is shown, which is applied to a nonvolatile memory, where a storage linked list is disposed in the nonvolatile memory, where the storage linked list includes at least one linked list node, where the linked list node is used to record N blocks of data starting from a preset logical block address and timestamps corresponding to the N blocks of data, where N is a natural number; the device comprises:
a receiving module 210, configured to receive a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing timestamp;
a tail logic block address information determining module 220, configured to determine tail logic block address information according to the head logic block address information and the block data number;
a head node position determining module 230, configured to determine a head linked list node corresponding to the head logical block address information in the storage linked list, and a head node position corresponding to the head logical block address information in the head linked list node;
a tail node position determining module 240, configured to determine a tail link table node corresponding to the tail logical block address information in the storage link table, and a tail node position corresponding to the tail logical block address information in the head link table node;
an intermediate linked list node deleting module 250, configured to delete an intermediate linked list node between the head linked list node and the tail linked list node;
a head linked list node processing module 260, configured to perform data processing corresponding to the data processing instruction in the head linked list node according to the head node position corresponding to the head linked list node of the head logical block address information, and change a timestamp corresponding to a position where data processing is performed in the head linked list node to the processing timestamp;
and a tail chain table node processing module 270, configured to perform data processing corresponding to the data processing instruction in the tail chain table node according to the tail node position corresponding to the tail chain table node to which the tail logical block address information is stored, and change a timestamp corresponding to a position where data processing is performed in the tail chain table node to the processing timestamp.
Preferably, the data processing instructions comprise insert data instructions;
the head list node processing module 260 includes:
the first head linked list node processing submodule is used for performing insertion data processing in the head linked list nodes according to the head logical block address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions of the head linked list nodes for performing insertion data processing into the processing timestamps;
the tail chain table node processing module comprises:
and the first tail chain table node processing submodule is used for performing insertion data processing in the tail chain table node according to the tail logical block address information at the tail node position corresponding to the tail chain table node, and changing a timestamp corresponding to the position where the insertion data processing is performed in the tail chain table node into the processing timestamp.
Preferably, the data processing instructions also correspond to data to be inserted; the processing timestamp comprises an insertion timestamp;
the first head chain table node processing submodule comprises:
the first retaining unit is used for retaining data before the position of a head node in the head linked list nodes;
the first deleting unit is used for deleting the data corresponding to the head node position in the head linked list nodes and the data behind the head node position;
a first processing unit, configured to insert previous data, corresponding to the head node position and a position after the head node position, in the data to be inserted from the head node position into the head linked list node, and modify that the timestamps corresponding to the head node position and the position after the head node position are the insertion timestamps;
the first tail link table node processing submodule comprises:
the second reservation unit is used for reserving data behind the tail node position in the tail chain table node;
the second deleting unit is used for deleting the data corresponding to the tail node position in the tail link table node and the data before the tail node position;
the second processing unit inserts the post data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node position correspondingly, and modifies the corresponding timestamps of the tail node position and the tail node position to be the insertion timestamps;
the device further comprises:
and the inserting module is used for inserting the intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
Preferably, the data processing instruction comprises a delete data instruction;
the head list node processing module 260 includes:
the second head linked list node processing submodule is used for carrying out data deleting processing in the head linked list nodes according to the head link address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions for carrying out data deleting processing in the head linked list nodes into the processing timestamps;
the processing module according to the tail chain table comprises:
and the second tail link table node processing submodule is used for deleting data in the tail link table node according to the tail node position corresponding to the tail link table node of the tail logical block address information, and changing the time stamp corresponding to the position where the data deletion processing is carried out in the tail link table node into the processing time stamp.
Preferably, the processing time stamp includes: deleting the timestamp;
the second head linked list node processing submodule comprises:
a third reserving unit, configured to reserve data before a head node position in the head linked list node;
a third deleting unit, configured to delete data corresponding to a head node position in the head linked list nodes and data after the head node position;
a first changing unit, configured to change a timestamp corresponding to a location in the head linked list node where data deletion processing is performed as the deletion timestamp;
the second tail link table node processing submodule includes:
a fourth reserving unit, configured to reserve data after a tail node position in the tail link table node;
a fourth deleting unit, configured to delete data corresponding to a tail node position in the tail link table node and data before the tail node position;
and the second changing unit is used for changing the timestamp corresponding to the position for deleting the data processing in the tail link table node into the deletion timestamp.
In summary, in the embodiments of the present invention, the block data is stored in the nonvolatile memory in a linked list manner, specifically, the nonvolatile memory is provided with a storage linked list, where the storage linked list includes at least one linked list node, and the linked list node is used to record N block data starting from a preset logical block address and timestamps corresponding to the N block data, where N is a natural number. A plurality of block data and a timestamp corresponding to the plurality of block data can be recorded in one linked list node, and compared with the prior art in which one block data corresponds to one timestamp, the space can be obviously saved. The implementation of the data processing of the nonvolatile memory in the embodiment of the present invention is as follows: after receiving a data combing instruction corresponding to the head logical block address information, the block data number and the processing timestamp, determining tail logical block address information according to the head logical block address information and the block data number; then determining head linked list nodes corresponding to the head logical block address information in the storage linked list and head node positions corresponding to the head logical block address information in the head linked list nodes; determining tail link table nodes corresponding to the tail logical block address information in the storage link table and tail node positions corresponding to the tail logical block address information in the head link table nodes; when the nonvolatile memory is used for processing, the original data is invalid no matter the data is written or deleted, so that the intermediate linked list nodes between the head linked list nodes and the tail linked list nodes are deleted; according to the head node position of the head logic block address information corresponding to the head linked list node, data processing corresponding to the data processing instruction is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into a processing timestamp; according to the tail node position of the tail logical block address information corresponding to the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position of the tail chain table node where the data processing is carried out is changed into a processing timestamp; thereby realizing data processing for the nonvolatile memory.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
The embodiments in the present specification are all described in a progressive manner, and each embodiment focuses on differences from other embodiments, and portions that are the same and similar between the embodiments may be referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
In a typical configuration, the computer device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory. The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium. Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include non-transitory computer readable media (fransitory media), such as modulated data signals and carrier waves.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "include", "including" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or terminal device including a series of elements includes not only those elements but also other elements not explicitly listed or inherent to such process, method, article, or terminal device. Without further limitation, an element defined by the phrases "comprising one of \ 8230; \8230;" does not exclude the presence of additional like elements in a process, method, article, or terminal device that comprises the element.
The data processing method and the data processing apparatus provided by the present invention are described in detail above, and the principle and the implementation of the present invention are explained in the present document by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (10)

1. A data processing method is characterized by being applied to a nonvolatile memory, wherein a storage linked list is arranged in the nonvolatile memory and comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logic block address and timestamps corresponding to the N blocks of data, and N is a natural number; the method comprises the following steps:
receiving a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing timestamp;
determining tail logic block address information according to the head logic block address information and the block data number;
determining head chain table nodes corresponding to the head logical block address information in the storage chain table and head node positions corresponding to the head logical block address information in the head chain table nodes;
determining a tail link table node corresponding to the tail logical block address information in the storage link table and a tail node position corresponding to the tail logical block address information in the head link table node;
deleting intermediate linked list nodes between the head linked list nodes and the tail linked list nodes;
according to the head logical block address information at the head node position corresponding to the head linked list node, performing data processing corresponding to the data processing instruction in the head linked list node, and changing a timestamp corresponding to the position of performing data processing in the head linked list node into the processing timestamp;
and according to the tail node position corresponding to the tail chain table node of the tail logic block address information, performing data processing corresponding to the data processing instruction in the tail chain table node, and changing a timestamp corresponding to the position of performing data processing in the tail chain table node into the processing timestamp.
2. The method of claim 1, wherein the data processing instruction comprises an insert data instruction;
the basis the head logical block address information is in head link table node corresponding head node position carry out in the head link table node corresponding to the data processing of data processing instruction, and change carry out the timestamp that data processing's position corresponds in the head link table node and do the processing time stamp, include:
performing insertion data processing in the head linked list nodes according to the head logical block address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions of the head linked list nodes for performing insertion data processing into the processing timestamps;
the data processing corresponding to the data processing instruction is performed in the tail chain table node according to the tail logical block address information at the tail node position corresponding to the tail chain table node, and the data processing method comprises the following steps:
and performing insertion data processing in the tail chain table node according to the tail node position of the tail logic block address information corresponding to the tail chain table node, and changing a timestamp corresponding to the position of performing insertion data processing in the tail chain table node into the processing timestamp.
3. The method of claim 2, wherein the data processing instructions further correspond to data to be inserted; the processing timestamp comprises an insertion timestamp;
according to the head logical block address information is in the head node position that the head linked list node corresponds, insert data processing in the head linked list node, and change the timestamp that the position that inserts data processing in the head linked list node corresponds is the processing timestamp, include:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
inserting the previous data corresponding to the head node position and the position after the head node position in the data to be inserted into the head linked list node from the head node position, and modifying the time stamps corresponding to the head node position and the position after the head node position to be the insertion time stamps;
according to the tail logical block address information at the tail node position corresponding to the tail chain table node, performing insertion data processing in the tail chain table node, and changing the timestamp corresponding to the position where the insertion data processing is performed in the tail chain table node as the processing timestamp, the method comprises the following steps:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
correspondingly inserting the posterior data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node position, and modifying the corresponding timestamps of the tail node position and the tail node position to be the insertion timestamps;
the method further comprises the following steps:
and inserting intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
4. The method of claim 1, wherein the data processing instruction comprises a delete data instruction;
the said according to the said head logical block address information is in the head node position that the said head linked list node corresponds, carry on the data processing corresponding to said data processing order in the said head linked list node, and change the said time stamp that the position that carries on the data processing in the said head linked list node corresponds to is the said processing time stamp, include:
according to the head logical block address information at the head node position corresponding to the head linked list node, performing data deletion processing in the head linked list node, and changing a timestamp corresponding to the position of the head linked list node where the data deletion processing is performed into the processing timestamp;
the processing method includes the following steps that according to the tail node position corresponding to the tail logical block address information in the tail chain table node, data processing corresponding to the data processing instruction is carried out in the tail chain table node, and a timestamp corresponding to the position where the data processing is carried out in the tail chain table node is changed into the processing timestamp, and the processing method includes the following steps:
and according to the tail node position of the tail logic block address information corresponding to the tail chain table node, performing data deletion processing in the tail chain table node, and changing a timestamp corresponding to the position of the tail chain table node where the data deletion processing is performed into the processing timestamp.
5. The method of claim 4, wherein processing the timestamp comprises: deleting the timestamp;
according to the head logical block address information at the head node position corresponding to the head linked list node, deleting data processing is carried out in the head linked list node, and a timestamp corresponding to the position where the data processing is carried out in the head linked list node is changed into the processing timestamp, including:
reserving data before the position of a head node in the head linked list nodes;
deleting data corresponding to the head node position in the head linked list nodes and data behind the head node position;
changing the time stamp corresponding to the position for deleting the data processing in the head linked list node into the deleting time stamp;
according to the tail logical block address information at the tail node position corresponding to the tail chain table node, deleting data processing is carried out in the tail chain table node, and a timestamp corresponding to the position where the deleting data processing is carried out in the tail chain table node is changed into the processing timestamp, including:
reserving data behind the tail node position in the tail chain table node;
deleting data corresponding to the tail node position in the tail link table node and data before the tail node position;
and changing the timestamp corresponding to the position for deleting the data processing in the tail link table node into the deletion timestamp.
6. The data processing device is characterized by being applied to a nonvolatile memory, wherein a storage linked list is arranged in the nonvolatile memory and comprises at least one linked list node, the linked list node is used for recording N blocks of data starting from a preset logic block address and timestamps corresponding to the N blocks of data, and N is a natural number; the device comprises:
the receiving module is used for receiving a data processing instruction; the data processing instruction corresponds to head logical block address information, block data number and a processing timestamp;
the tail logic block address information determining module is used for determining tail logic block address information according to the head logic block address information and the block data number;
a head node position determining module, configured to determine a head linked list node corresponding to the head logical block address information in the storage linked list, and a head node position corresponding to the head logical block address information in the head linked list node;
a tail node position determining module, configured to determine a tail link table node corresponding to the tail logical block address information in the storage link table, and a tail node position corresponding to the tail logical block address information in the head link table node;
the intermediate linked list node deleting module is used for deleting the intermediate linked list node between the head linked list node and the tail linked list node;
a head linked list node processing module, configured to perform data processing corresponding to the data processing instruction in the head linked list node according to a head node position corresponding to the head linked list node to which the head logical block address information is stored, and change a timestamp corresponding to a position where data processing is performed in the head linked list node to the processing timestamp;
and the tail chain table node processing module is used for carrying out data processing corresponding to the data processing instruction in the tail chain table node according to the tail node position corresponding to the tail chain table node according to the tail logic block address information, and changing the timestamp corresponding to the position for carrying out data processing in the tail chain table node into the processing timestamp.
7. The apparatus of claim 6, wherein the data processing instructions comprise insert data instructions;
the head chain table node processing module comprises:
the first head linked list node processing submodule is used for performing insertion data processing in the head linked list nodes according to the head logical block address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions of the head linked list nodes for performing insertion data processing into the processing timestamps;
the tail chain table node processing module comprises:
and the first tail link table node processing submodule is used for performing insertion data processing in the tail link table node according to the tail logical block address information at the tail node position corresponding to the tail link table node, and changing a timestamp corresponding to the position for performing insertion data processing in the tail link table node into the processing timestamp.
8. The apparatus of claim 7, wherein the data processing instructions further correspond to data to be inserted; the processing timestamp comprises an insertion timestamp;
the first head chain table node processing submodule includes:
the first retention unit is used for retaining data before the position of a head node in the head linked list nodes;
the first deleting unit is used for deleting the data corresponding to the head node position in the head linked list nodes and the data behind the head node position;
a first processing unit, configured to insert previous data, corresponding to the head node position and a position after the head node position, in the data to be inserted from the head node position into the head linked list node, and modify that the timestamps corresponding to the head node position and the position after the head node position are the insertion timestamps;
the first tail link table node processing submodule comprises:
the second reservation unit is used for reserving data behind the tail node position in the tail chain table node;
the second deleting unit is used for deleting the data corresponding to the tail node position in the tail link table node and the data before the tail node position;
the second processing unit correspondingly inserts the post data corresponding to the tail node position and the position before the tail node position in the data to be inserted into the tail node position and the position before the tail node position, and modifies the corresponding timestamps of the tail node position and the tail node position to be the insertion timestamps;
the device further comprises:
and the inserting module is used for inserting the intermediate data except the preceding data and the following data in the data to be inserted between the head linked list node and the tail linked list node.
9. The apparatus of claim 6, wherein the data processing instructions comprise a delete data instruction;
the head chain table node processing module comprises:
the second head linked list node processing submodule is used for carrying out data deleting processing in the head linked list nodes according to the head link address information at the head node positions corresponding to the head linked list nodes, and changing timestamps corresponding to the positions for carrying out data deleting processing in the head linked list nodes into the processing timestamps;
the processing module according to the tail chain table comprises:
and the second tail link table node processing submodule is used for deleting data in the tail link table node according to the tail node position corresponding to the tail link table node of the tail logical block address information, and changing the time stamp corresponding to the position where the data deletion processing is carried out in the tail link table node into the processing time stamp.
10. The apparatus of claim 9, wherein the processing the timestamp comprises: deleting the timestamp;
the second head linked list node processing submodule comprises:
a third reserving unit, configured to reserve data before a head node position in the head linked list node;
a third deleting unit, configured to delete data corresponding to a head node position in the head linked list nodes and data after the head node position;
a first changing unit, configured to change a timestamp corresponding to a position where data deletion processing is performed in the head linked list node to be the deletion timestamp;
the second tail link table node processing submodule includes:
a fourth reserving unit, configured to reserve data after a tail node position in the tail chain table node;
a fourth deleting unit, configured to delete data corresponding to a tail node position in the tail link table node and data before the tail node position;
and the second changing unit is used for changing the timestamp corresponding to the position for deleting the data processing in the tail link table node into the deletion timestamp.
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