CN111367259B - Low-cost digital signal processing module automatic testing device and method - Google Patents
Low-cost digital signal processing module automatic testing device and method Download PDFInfo
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Abstract
The invention discloses a low-cost digital signal processing module automatic testing device and a method, wherein the automatic testing device comprises: the interface adapter, the interface circuit and the CPLD processor are connected in sequence; the interface adapter is used for connecting the digital signal processing module and transferring all the interfaces of the digital signal processing module to the automatic testing device; the interface circuit is used for realizing drive isolation between interfaces; the CPLD processor is used for receiving the output data of the digital signal processing module, processing the output data according to an agreed protocol and generating the input data of the digital signal processing module. The automatic testing device is realized by adopting common components, can be combined with automatic testing software to realize the coverage test and the pressure test of the digital signal processing module under the condition of not needing any testing instrument and radio frequency module, shortens the testing time and exposes the problem in the digital signal processing module in time.
Description
Technical Field
The invention relates to the technical field of testing of digital signal processing modules, in particular to a low-cost automatic testing device and method of a digital signal processing module.
Background
At present, in the fields of friend or foe identification, radar detection, communication countermeasure and the like, most of products are composed of a digital signal processing module and a radio frequency module, the digital signal processing module is used for controlling the output frequency and the channel switch of the radio frequency module, reading the temperature data of the radio frequency module and the like, the quality of the digital signal processing module is critical to the whole product, and therefore tests on the sufficiency, the coverage and the pressure of the digital signal processing module are particularly important.
In the design and production processes, the test of the digital signal processing module is mainly combined with the radio frequency module, and the test of the output power, the frequency and the like of the radio frequency module is carried out in a manual mode so as to verify the correctness of the digital signal processing module. Meanwhile, the output time of the radio frequency module is later than that of the digital signal processing module, so that the digital signal processing module is always in a state to be tested, and the digital signal processing module cannot be tested in time.
Disclosure of Invention
The purpose of the invention is as follows: the automatic testing device is constructed by selecting common components under the condition of not using any testing instrument and radio frequency module, and solves the problems of insufficient testing, untimely testing and long testing time of the digital signal processing module.
The invention adopts a low-cost digital signal processing module automatic testing device, which comprises: the interface adapter, the interface circuit and the CPLD processor are connected in sequence;
the interface adapter is used for connecting the digital signal processing module and transferring all the interfaces of the digital signal processing module to the automatic testing device;
the interface circuit is used for realizing drive isolation between interfaces;
the CPLD processor is used for receiving the output data of the digital signal processing module, processing the output data according to an agreed protocol and generating the input data of the digital signal processing module.
The invention also provides a low-cost automatic test method for the digital signal processing module, which comprises the following steps: and the automatic testing device is connected to the digital signal processing module to automatically test the digital signal processing module.
Further, the automatic testing of the digital signal processing module comprises:
(1) performing LVDS serial port coverage test and pressure test;
(2) performing an SPI interface coverage test and a pressure test;
(3) and performing a discrete interface coverage test and a pressure test.
Further, the step of performing the LVDS serial port coverage test is as follows:
(1.1) setting LVDS coverage test in automatic test software in the terminal equipment;
(1.2) the automatic test software controls the digital signal processing module to send frequency control information from LVDS _ OUT _ P and LVDS _ OUT _ N sending ports;
(1.3) after passing through an interface adapter of the automatic test device, the frequency control information is sent to a digital signal processing module from LVDS _ IN _ P and LVDS _ IN _ N receiving ports;
(1.4) the digital signal processing module processes the received data and feeds back a processing result to the terminal equipment;
and (1.5) reading the processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the LVDS serial port data processing in the digital signal processing module is correct or not according to the comparison result.
Further, the step of performing the SPI interface coverage test is as follows:
(2.1) setting SPI coverage test in automatic test software in the terminal equipment;
(2.2) the automatic test software controls the digital signal processing module to generate low level and clock information, and the low level and the clock information are sent to the automatic test device through a # CS interface and an SCKL interface;
(2.3) sending the low level and clock information received by the automatic test device into the CPLD processor after passing through the interface adapter and the interface circuit;
(2.4) the CPLD processor generates 16-bit data of the analog temperature sensor, and the 16-bit data is sent to the digital signal processing module through the SIO port after passing through the interface circuit and the interface adapter;
(2.5) the digital signal processing module calculates a temperature value according to the 16-bit data of the interface and feeds the calculated temperature value back to the terminal equipment;
and (2.6) comparing the temperature value calculated by automatic test software in the terminal equipment with an expected value, and judging whether the SPI interface data processing in the digital signal processing module is correct or not according to a comparison result.
Further, in step (2.4), the CPLD processor sends a group of 16 bits of data to the digital signal processing module at a time through the SIO port.
Further, the step of performing the discrete interface coverage test is as follows:
(3.1) setting a discrete interface coverage test in automatic test software in the terminal equipment;
(3.2) the automatic test software controls the 12V _ EN, AU and AD output ports of the digital signal processing module to generate 000-111 signals and send the signals to the automatic test device;
(3.3) sending 000-111 signals of the automatic testing device interface into the CPLD processor after passing through the interface adapter and the interface circuit;
(3.4) the CPLD processor generates 111-000 signals according to the received 000-111 signals and an agreed protocol, and sends the 111-000 signals to the digital signal processing module through PLLF, AU _ FZJ and AD _ FZJ ports after passing through an interface circuit and an interface adapter;
(3.5) the digital signal processing module processes the received 111-000 signals and feeds back the processing result to the terminal equipment;
and (3.6) reading the processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the discrete interface data processing in the digital signal processing module is correct or not according to the comparison result.
Further, in the step (3.2), the automatic test software controls the 12V _ EN, AU and AD output ports of the digital signal processing module to generate 000-111 signals, and sends a group of 000-111 signals to the automatic test device each time.
Furthermore, corresponding pressure test is realized by performing LVDS serial port coverage test, SPI interface coverage test and discrete interface coverage test for multiple times.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
1. the automatic testing device is realized by adopting common components, the cost is only about 300 yuan under the current market environment, and under the condition of not needing any testing instrument and radio frequency module, the automatic testing device can be combined with automatic testing software to realize the coverage test and the pressure test of the digital signal processing module, thereby shortening the testing time and exposing the problems in the digital signal processing module in time.
2. The invention can realize LVDS serial port test, SPI interface test and discrete interface test of the digital signal processing module, and the test method is simple.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic diagram of the automatic testing of the low-cost DSP module according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
The features and properties of the present invention are described in further detail below with reference to examples.
Example 1
The automatic testing device for the low-cost digital signal processing module provided by the embodiment comprises: the interface adapter, the interface circuit and the CPLD processor are connected in sequence;
the interface adapter is used for connecting the digital signal processing module and transferring all the interfaces of the digital signal processing module to the automatic testing device;
the interface circuit is used for realizing drive isolation between interfaces;
the CPLD processor is used for receiving the output data of the digital signal processing module, processing the output data according to an agreed protocol and generating the input data of the digital signal processing module.
Based on the automatic testing device, an automatic testing method for a low-cost digital signal processing module is performed, as shown in fig. 1, and the automatic testing method comprises the following steps: and the automatic testing device is connected to the digital signal processing module to automatically test the digital signal processing module. Generally, the digital signal processing module provides an RS232 serial port for the terminal device to communicate with the digital signal processing module, and thus, the terminal device may adopt a PC, an industrial personal computer, or other terminal devices capable of installing an application program and supporting the RS232 serial port (or expandable to the RS232 serial port).
The automatic testing of the digital signal processing module comprises:
(1) performing LVDS serial port coverage test and pressure test;
(2) performing an SPI interface coverage test and a pressure test;
(3) and performing a discrete interface coverage test and a pressure test.
The coverage test is to test all data of the interface once, and then the corresponding pressure test can be realized by performing the LVDS serial port coverage test, the SPI interface coverage test and the discrete interface coverage test for multiple times.
Specifically, the method comprises the following steps:
(1) LVDS serial port coverage test
The steps for performing the LVDS serial port coverage test are as follows:
(1.1) setting LVDS coverage test in automatic test software in the terminal equipment;
(1.2) the automatic test software controls the digital signal processing module to send frequency control information of 0x 00000000000000-0 x01ffffffffffff from LVDS _ OUT _ P and LVDS _ OUT _ N sending ports; the transmission frequency control protocol is shown in table 1.
Table 1:
(1.3) after the frequency control information of 0x 00000000000000-0 x01ffffffffff passes through an interface adapter of the automatic test device, sending the frequency control information into a digital signal processing module from LVDS _ IN _ P and LVDS _ IN _ N receiving ports;
(1.4) the digital signal processing module processes the received data, namely, the received data is processed according to the frequency control response protocol in the table 2, the parameter effective identifier of BIT00 in BYTE [0], the setting/inquiring identifier of BIT01 in BYTE [0], the bandwidth of BYTE [1], the frequency hopping state of BYTE [2] and the frequencies of BYTE [3] -BYTE [6] are extracted, and the processing result is fed back to the terminal equipment.
Table 2:
and (1.5) reading the processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the LVDS serial port data processing in the digital signal processing module is correct or not according to the comparison result. For example: assuming that the transmitted data is 0x00000000000000, since the data directly enters the receiving port from the transmitting port, the digital signal processing module receives 0x0000000000, and according to the protocol in table 2, the digital signal processing module processes the data to have a frequency of 0Hz, a fixed frequency, a bandwidth of 8MHz, a setting state, and an effective parameter after receiving the data. Therefore, the expected value when the data of 0x00000000000000 is sent is that the frequency of 0Hz, the fixed frequency, the bandwidth of 8MHz, the setting state and the parameters are effective, and if the result that the received data is processed by the digital signal processing module and then fed back to the automatic test terminal is not that the frequency of 0Hz, the fixed frequency, the bandwidth of 8MHz, the setting state and the parameters are effective, the data processing error of the LVDS serial port in the digital signal processing module can be judged.
(2) Performing SPI interface coverage test
The steps for performing the SPI interface coverage test are as follows:
(2.1) setting SPI coverage test in automatic test software in the terminal equipment;
(2.2) the automatic test software controls the digital signal processing module to generate low level and clock information, and the low level and the clock information are sent to the automatic test device through a # CS interface and an SCKL interface;
(2.3) sending the low level and clock information received by the automatic test device into the CPLD processor after passing through the interface adapter and the interface circuit;
(2.4) the CPLD processor generates 16-bit data (0000000000000000-1111111111111111) of the analog temperature sensor, and sends the 16-bit data to the digital signal processing module through the SIO port after passing through the interface circuit and the interface adapter; to facilitate data processing, the CPLD processor sends a set of 16 bits of data at a time to the digital signal processing module via the SIO port. It should be noted that the simulation of the temperature sensor in step (2.4) is only an example, and actually, other devices, such as the voltage value of the ADC chip of the SPI interface, may also be simulated.
The 16-bit data content and binary code are shown in tables 3 and 4.
Table 3, temperature data content:
table 4, temperature output binary code:
| temperature (. degree.C.) | Binary code |
| +150.0000 | 0100 1011 0000 0xxx |
| +125.0000 | 0011 1110 1000 0xxx |
| +25.0000 | 0000 1100 1000 0xxx |
| +0.0625 | 0000 0000 0000 1xxx |
| 0.0000 | 0000 0000 0000 0xxx |
| -0.0625 | 1111 1111 1111 1xxx |
| -25.0000 | 1111 0011 0111 0xxx |
| -55.0000 | 1111 1100 0111 0xxx |
(2.5) the digital signal processing module calculates a temperature value according to the 16-bit data of the interface and feeds the calculated temperature value back to the terminal equipment;
and (2.6) comparing the temperature value calculated by automatic test software in the terminal equipment with an expected value, and judging whether the SPI interface data processing in the digital signal processing module is correct or not according to a comparison result. For example: assuming that the transmitted data is 0011111010000 xxx, since the data directly enters the receiving port from the transmitting port, 0011111010000 xxx is received by the dsp module, and the received data is processed to +125 ℃ according to the protocol of table 4. Therefore, the expected value when the data of 0x00000000000000 is transmitted is +125 ℃, and if the result of the received data fed back to the terminal after being processed by the digital signal processing module is not +125 ℃, the SPI interface data processing error in the digital signal processing module can be judged.
(3) Performing discrete interface coverage testing
The steps of performing the discrete interface test are as follows:
(3.1) setting a discrete interface coverage test in automatic test software in the terminal equipment;
(3.2) the automatic test software controls the 12V _ EN, AU and AD output ports of the digital signal processing module to generate 000-111 signals and send the signals to the automatic test device; in order to facilitate signal processing, a group of 000-111 signals are sent to the automatic test device each time.
(3.3) sending 000-111 signals of the automatic testing device interface into the CPLD processor after passing through the interface adapter and the interface circuit;
(3.4) the CPLD processor generates 111-000 signals according to the received 000-111 signals and the protocol agreed in the table 5, and sends the 111-000 signals to the digital signal processing module through PLLF, AU _ FZJ and AD _ FZJ ports after passing through the interface circuit and the interface adapter;
table 5:
(3.5) the digital signal processing module processes the received 111-000 signals and feeds back the processing result to the terminal equipment;
and (3.6) reading the processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the discrete interface data processing in the digital signal processing module is correct or not according to the comparison result. For example: when the data sent by the digital signal processing module is 100, it can be known from table 5 that the CPLD processor sends 011 to the digital signal processing module, and the digital signal processing module should feed back the excitation source working normally, the upper antenna fault, and the lower antenna fault to the terminal device, so that the expected value of the data sent by the digital signal processing module by 100 is that the excitation source working normally, the upper antenna fault, and the lower antenna fault. If the excitation source of the information part received by the terminal equipment works normally, the upper antenna has a fault and the lower antenna has a fault after the digital signal processing module sends the data 100, the discrete interface data in the digital signal processing module is judged to be wrong.
As can be seen from the above, the present invention has the following beneficial effects:
1. the automatic testing device is realized by adopting common components (components with high cost performance can be selected according to requirements), the cost is only about 300 yuan under the current market environment, and under the condition of not needing any testing instrument and radio frequency module, the automatic testing device can be combined with automatic testing software to realize the coverage test and the pressure test of the digital signal processing module, thereby shortening the testing time and exposing the problems in the digital signal processing module in time.
2. The invention can realize LVDS serial port test, SPI interface test and discrete interface test of the digital signal processing module, and the test method is simple.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (4)
1. An automatic test method for a low-cost digital signal processing module is characterized in that the automatic test method comprises the following steps: the terminal equipment provided with automatic test software and the low-cost automatic testing device of the digital signal processing module are connected to the digital signal processing module to automatically test the digital signal processing module; the automatic testing device of the low-cost digital signal processing module comprises: the interface adapter, the interface circuit and the CPLD processor are connected in sequence;
the interface adapter is used for connecting the digital signal processing module and transferring all the interfaces of the digital signal processing module to the automatic testing device;
the interface circuit is used for realizing drive isolation between interfaces;
the CPLD processor is used for receiving the output data of the digital signal processing module, processing the output data according to an agreed protocol and generating the input data of the digital signal processing module;
the automatic testing of the digital signal processing module comprises:
(1) performing LVDS serial port coverage test and pressure test;
(2) performing an SPI interface coverage test and a pressure test;
(3) carrying out a discrete interface coverage test and a pressure test;
the steps for performing the LVDS serial port coverage test are as follows:
(1.1) setting LVDS coverage test in automatic test software in the terminal equipment;
(1.2) the automatic test software controls the digital signal processing module to send frequency control information from LVDS _ OUT _ P and LVDS _ OUT _ N sending ports;
(1.3) after passing through an interface adapter of the automatic test device, the frequency control information is sent to a digital signal processing module from LVDS _ IN _ P and LVDS _ IN _ N receiving ports;
(1.4) the digital signal processing module processes the received data and feeds back a processing result to the terminal equipment;
(1.5) reading a processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the LVDS serial port data processing in the digital signal processing module is correct or not according to the comparison result;
the steps for performing the SPI interface coverage test are as follows:
(2.1) setting SPI coverage test in automatic test software in the terminal equipment;
(2.2) the automatic test software controls the digital signal processing module to generate low level and clock information, and the low level and the clock information are sent to the automatic test device through a # CS interface and an SCKL interface;
(2.3) sending the low level and clock information received by the automatic test device into the CPLD processor after passing through the interface adapter and the interface circuit;
(2.4) the CPLD processor generates 16-bit data of the analog temperature sensor, and the 16-bit data is sent to the digital signal processing module through the SIO port after passing through the interface circuit and the interface adapter;
(2.5) the digital signal processing module calculates a temperature value according to the 16-bit data of the interface and feeds the calculated temperature value back to the terminal equipment;
(2.6) comparing the temperature value calculated by automatic test software in the terminal equipment with an expected value, and judging whether the SPI interface data processing in the digital signal processing module is correct or not according to a comparison result;
the steps for performing the discrete interface coverage test are as follows:
(3.1) setting a discrete interface coverage test in automatic test software in the terminal equipment;
(3.2) the automatic test software controls the 12V _ EN, AU and AD output ports of the digital signal processing module to generate 000-111 signals and send the signals to the automatic test device;
(3.3) sending 000-111 signals of the automatic testing device interface into the CPLD processor after passing through the interface adapter and the interface circuit;
(3.4) the CPLD processor generates 111-000 signals according to the received 000-111 signals and an agreed protocol, and sends the 111-000 signals to the digital signal processing module through PLLF, AU _ FZJ and AD _ FZJ ports after passing through an interface circuit and an interface adapter;
(3.5) the digital signal processing module processes the received 111-000 signals and feeds back the processing result to the terminal equipment;
and (3.6) reading the processing result fed back by the digital signal processing module by automatic test software in the terminal equipment, comparing the processing result with an expected value, and judging whether the discrete interface data processing in the digital signal processing module is correct or not according to the comparison result.
2. The method according to claim 1, wherein in step (2.4), the CPLD processor sends a group of 16 bits of data to the DSP module at a time through the SIO port.
3. The method according to claim 1, wherein the automatic test software in step (3.2) controls the 12V _ EN, AU, AD output ports of the DSP module to generate 000-111 signals, and sends a set of 000-111 signals to the automatic test device each time.
4. The automatic test method for low-cost digital signal processing modules according to any of claims 1 to 3, characterized in that the corresponding pressure test is realized by performing LVDS serial port coverage test, SPI interface coverage test and discrete interface coverage test for a plurality of times.
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| CN107290646A (en) * | 2017-06-09 | 2017-10-24 | 苏州迅芯微电子有限公司 | The automatically testing platform and method of testing of high-speed ADC chip |
| CN108319549A (en) * | 2017-12-26 | 2018-07-24 | 上海科梁信息工程股份有限公司 | A kind of test system and test method |
| CN108490803A (en) * | 2018-02-07 | 2018-09-04 | 北京国电高科科技有限公司 | A kind of test emulation system |
| CN108563144A (en) * | 2018-03-30 | 2018-09-21 | 西安电子科技大学 | A kind of missile-borne radar signal processing semi-hardware type simulation test system |
| CN108459586A (en) * | 2018-05-25 | 2018-08-28 | 中车青岛四方车辆研究所有限公司 | Multiplexing automatic testing stand based on virtual instrument and test method |
| CN209299281U (en) * | 2018-11-15 | 2019-08-23 | 上海宇航***工程研究所 | A kind of multi-functional cable net automatic testing equipment |
| CN109581916A (en) * | 2018-11-26 | 2019-04-05 | 中电科仪器仪表有限公司 | A kind of PXI bus programmable number I/O system and implementation method based on FPGA |
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