CN111323654A - Synapse simulation method and system of resistive device - Google Patents

Synapse simulation method and system of resistive device Download PDF

Info

Publication number
CN111323654A
CN111323654A CN202010130078.0A CN202010130078A CN111323654A CN 111323654 A CN111323654 A CN 111323654A CN 202010130078 A CN202010130078 A CN 202010130078A CN 111323654 A CN111323654 A CN 111323654A
Authority
CN
China
Prior art keywords
sine wave
wave signal
frequency
time
synapse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010130078.0A
Other languages
Chinese (zh)
Other versions
CN111323654B (en
Inventor
刘力锋
马跃驰
于敖
王泽昊
丁向向
冯玉林
张兴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Peking University
Original Assignee
Peking University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Peking University filed Critical Peking University
Priority to CN202010130078.0A priority Critical patent/CN111323654B/en
Publication of CN111323654A publication Critical patent/CN111323654A/en
Application granted granted Critical
Publication of CN111323654B publication Critical patent/CN111323654B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/28Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/28Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response
    • G01R27/30Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response with provision for recording characteristics, e.g. by plotting Nyquist diagram

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)

Abstract

The embodiment of the invention provides a synapse simulation method and a synapse simulation system of a resistive device, wherein the method comprises the following steps: applying a first sine wave signal to a top electrode of a target resistance change device at a first moment; applying a second sine wave signal to a bottom electrode of the target resistance change device at a second moment; adjusting the time interval between the first time and the second time, adjusting the frequency of the first sine wave signal and the frequency of the second sine wave signal, and acquiring a synapse simulation curve of the target resistive switching device; and carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device. The synapse plasticity of the resistive device can be tested, and the change relation between the synapse of the resistive device and the time and frequency can be obtained, so that the resistive device can better simulate the synapse when the resistive device is used.

Description

Synapse simulation method and system of resistive device
Technical Field
The invention relates to the technical field of semiconductor integrated circuits and manufacturing thereof, in particular to a synapse simulation method and system of a resistive device.
Background
Synapses are basic building blocks for constructing a nervous system, have plasticity, and perform weight regulation according to sequential stimulation and frequency of electric signals, so as to achieve the functions of learning and memory. The Resistive Random Access Memory (RRAM) is a nonvolatile memory device for recording and storing data information based on resistance change, and the resistive random access memory is a natural electronic synapse, and can be used for simulating various biological behaviors such as learning rules of SRDP, STDP, LTP and the like due to low power consumption, non-volatility in power failure and continuous resistance change states.
The current synapse plasticity can be divided into two types according to the length of synapse weight retention time, which are respectively: short-term synaptic plasticity and long-term synaptic plasticity. Synaptic weights are generally considered to maintain long-term plasticity for 100s or more, and short-term plasticity below. Among them, Long-term synaptic plasticity can be divided into Long-term Potentiation (LTP) and Long-term suppression (LTD).
LTP long-term enhancement refers to the phenomenon that synapses are stimulated and then have increased connection strength and can be maintained for a longer period of time. Accordingly, LTD long-term inhibition refers to a phenomenon in which synaptic connection strength decreases and is maintained for a longer time.
Hebb, in 1949, proposed the Hebbian learning rule, which is also the rationale for synaptic plasticity. The continual and repeated excitation of pre-synaptic neurons can excite post-synaptic neurons, resulting in increased synaptic weight. Pulse-timing-dependent Plasticity (STDP) is the most basic Hebbian learning rule, and specifically refers to the sequence of presynaptic neuron activity (Pre-Spike) and postsynaptic neuron activity (Post-Spike), or the time interval of activity, which affects the synaptic weight regulation.
SRDP is that the postsynaptic neuron is under a certain extremely low signal frequency, does not cause weight regulation, and is in a resting state; at a certain medium frequency, long-term suppression is caused, and the weight is reduced; at some higher frequency, a long-term enhancement, a weight enhancement, is caused.
When the RRAM device is used for synaptic plasticity simulation, in the prior art, only pulse time sequence dependent plasticity or frequency dependent plasticity can be simulated independently, and the time sequence dependent plasticity and the frequency dependent plasticity cannot be simulated simultaneously, so that the synaptic simulation precision of the resistive switching device is low.
Therefore, it is highly desirable to perform a synaptic plasticity test on the RRAM device by simulating a pulse timing with a timing-dependent plasticity and a frequency-dependent plasticity at the same time to obtain a synaptic plasticity test result, so as to improve the synaptic simulation precision of the resistive device.
Disclosure of Invention
In order to solve the above problems, embodiments of the present invention provide a synapse simulation method and system for a resistive device.
In a first aspect, an embodiment of the present invention provides a synapse simulation method for a resistive switching device, including: applying a first sine wave signal to a top electrode of a target resistance change device at a first moment;
applying a second sine wave signal to a bottom electrode of the target resistive switching device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
adjusting the time interval between the first time and the second time, adjusting the frequency of the first sine wave signal and the frequency of the second sine wave signal, and repeating the above processes until the difference value between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, so as to obtain the synapse simulation curve of the target resistive switching device, wherein the synapse simulation curve represents synapses and the relationship between the time interval between the first time and the second time, the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
Preferably, a difference between a first synapse weight and a second synapse weight is greater than a preset threshold, the first synapse weight is a synapse weight of the target resistive switching device when being greater than the preset frequency threshold, and the second synapse weight is a synapse weight of the target resistive switching device when being less than the preset frequency threshold.
Preferably, the preset frequency threshold is 10 HZ.
Preferably, the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold, and specifically include:
the frequency of the first sine wave signal is greater than the preset frequency threshold;
the frequency of the second sine wave signal is smaller than the preset frequency threshold.
Preferably, the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold, and further comprising:
the frequency of the first sine wave signal is smaller than the preset frequency threshold;
the frequency of the second sine wave signal is greater than the preset frequency threshold.
Preferably, the first time and the second time are different, and specifically include:
the first time is earlier than the second time.
Preferably, the first time and the second time are different, further comprising:
the first time is later than the second time.
In a second aspect, an embodiment of the present invention provides a synapse simulation system for a resistive switching device, including: the first sine wave signal module is used for applying a first sine wave signal to a top electrode of the target resistance change device at a first moment;
the second sine wave signal module is used for applying a second sine wave signal to a bottom electrode of the target resistance changing device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
the adjusting module is configured to adjust a time interval between the first time and the second time, adjust a frequency of the first sine wave signal and a frequency of the second sine wave signal, and repeat the above processes until a difference between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, to obtain the synapse simulation curve of the target resistive switching device, where the synapse simulation curve represents a relationship between a synapse and the time interval between the first time and the second time, and the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and the simulation module is used for carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
In a third aspect, an embodiment of the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the synapse simulation method for a resistive switching device provided in the first aspect of the present invention when executing the program.
In a fourth aspect, the embodiments of the present invention provide a non-transitory computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the synapse simulation method for a resistive switching device provided in the first aspect of the present invention.
The method and the system for simulating the synapse of the resistive device provided by the embodiment of the invention can test the synapse plasticity of the resistive device, and obtain the change relation between the synapse of the resistive device and the time and frequency by testing the synapse performance of the resistive device in the time and frequency aspects, so that the resistive device can better simulate the synapse when the resistive device is used.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a flowchart of a synapse simulation method for a resistive switching device according to an embodiment of the present invention;
FIG. 2 is a graph illustrating the relationship between synaptic weight and frequency in an embodiment of the present invention;
fig. 3 is a schematic diagram of a relationship between a weight and a time interval of a resistive switching device in an embodiment of the present invention;
FIG. 4 is a schematic diagram of a first testing method provided in an embodiment of the present invention;
FIG. 5 is a schematic diagram of a second testing method provided in an embodiment of the present invention;
FIG. 6 is a schematic diagram of a third testing method provided in an embodiment of the present invention;
FIG. 7 is a schematic diagram of a fourth testing method provided in an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a synapse simulation system of a resistive switching device according to an embodiment of the present invention;
fig. 9 is a schematic physical structure diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart of a synapse simulation method for a resistive switching device according to an embodiment of the present invention, and as shown in fig. 1, the synapse simulation method for the resistive switching device according to the embodiment of the present invention includes:
s1, applying a first sine wave signal to a top electrode of the target resistive switching device at a first moment;
s2, applying a second sine wave signal to the bottom electrode of the target resistive switching device at a second time, where the first time is different from the second time, a frequency of the first sine wave signal is different from a frequency of the second sine wave signal, and the frequencies of the first sine wave signal and the second sine wave signal are located on two sides of a preset frequency threshold respectively;
s3, adjusting a time interval between the first time and the second time, adjusting a frequency of the first sine wave signal and a frequency of the second sine wave signal, and repeating the above processes until a difference between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, so as to obtain a synapse simulation curve of the target resistive switching device, where the synapse simulation curve represents a relationship between a synapse and a time interval between the first time and the second time, and a frequency of the first sine wave signal and a frequency of the second sine wave signal;
and S4, performing synapse simulation on the target resistance change device according to the synapse simulation curve of the target resistance change device.
The test principle of the embodiment of the invention is as follows: when the synaptic performance of the resistive device is tested by using the pulse signal, the pulse signal is simulated as an electric signal transmitted by a synapse, a top electrode of the resistive device is simulated as a presynaptic film, and a bottom electrode of the resistive device is simulated as a postsynaptic film.
In the preparation process of the resistance change device, in order to protect the film form of the active layer from being damaged, most resistance change devices adopt an inverted structure, a source electrode and a drain electrode can be in bottom contact or top contact, and the bottom contact is called a bottom electrode and the top contact is called a top electrode.
In the embodiment of the invention, the pulse signal adopts a sine wave signal which can ensure the continuity of weight adjustment, the sine wave signal is adopted for signal modulation, and the voltage of the superposed part of the upper electrode waveform and the lower electrode waveform has continuous controllability. If the square wave signal is adopted for modulation, and the amplitude of the square wave is 1V and-1V, the voltage of the overlapping part of the waveforms of the upper electrode and the lower electrode can only be 2V and-2V, and the value of the middle part of the waveform cannot be covered, so that the sine wave signal is adopted for modulation in the embodiment of the invention.
The method comprises the steps that a first sine wave signal is applied to a top electrode of a resistive device at a first moment, when the top electrode receives the first sine wave signal, a bottom electrode receives a second sine wave signal at a second moment after a time t elapses, information transmission is represented, and if the voltage of a superposition portion of waveforms of an upper electrode and a lower electrode is larger than the voltage threshold of the resistive device, the resistance value of the resistive device changes, and the synaptic weight of the resistive device changes.
In the embodiment of the present invention, the first time and the second time are different, that is, the time for the top electrode to receive the signal is different from the time for the bottom electrode to receive the signal, specifically, the first time may be earlier than the second time, that is, the time for the top electrode to receive the signal is earlier than the time for the bottom electrode to receive the signal; the first time may be later than the second time, i.e., the top electrode receives the signal later than the bottom electrode receives the signal.
Here, the upper and lower electrode waveforms are the pulse signal waveform received by the top electrode and the pulse signal waveform received by the bottom electrode, respectively, and the voltage at the overlapping portion of the upper and lower electrode waveforms is the pulse signal waveform received by the top electrode minus the pulse signal waveform received by the bottom electrode. The synaptic weight may represent the sensitivity of the resistive switching device.
In addition, when the frequency of the pulse signal changes, the resistance value of the resistive switching device also changes, and accordingly, the synaptic weight also changes. Therefore, the frequencies of the first sine wave signal and the second sine wave signal applied in the embodiment of the present invention are different, and the specific requirement is that the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively on two sides of the preset frequency threshold, the preset frequency threshold is a frequency boundary value, and the variation between the synaptic weights when the frequency of the pulse signal is greater than the preset threshold and the frequency of the pulse signal is less than the preset frequency threshold is large.
Therefore, in the embodiment of the present invention, one of the frequency of the first sine wave signal and the frequency of the second sine wave signal is greater than the predetermined frequency threshold, and the other frequency is less than the predetermined frequency threshold.
And then obtaining a synapse simulation curve of the resistive device, wherein the synapse simulation curve of the resistive device represents a relationship between a synapse and a time interval of the resistive device, a frequency of the first sine wave signal and a frequency of the second sine wave signal, and the time interval represents a time difference between the first time and the second time.
And then repeating the process until the difference value between the synapse simulation curve rule of the target device and the biological synapse learning curve is within a preset range, wherein the biological synapse learning curve refers to the ideal change condition of the resistance state device.
And then carrying out synapse simulation on the target device according to the synapse simulation curve of the target device.
The method for simulating the synapse of the resistive device provided by the embodiment of the invention can test the synapse plasticity of the resistive device, and obtains the change relation between the synapse of the resistive device and the time and frequency by testing the synapse performance of the resistive device in the time and frequency aspects, so that the resistive device can better simulate the synapse when the resistive device is used.
On the basis of the foregoing embodiment, a difference between a first synaptic weight and a second synaptic weight is greater than a preset threshold, where the first synaptic weight is a synaptic weight of the target resistive switching device when the synaptic weight is greater than the preset frequency threshold, and the second synaptic weight is a synaptic weight of the target resistive switching device when the synaptic weight is less than the preset frequency threshold.
Specifically, when the resistive switching device is used for simulating biological synapse plasticity, synapse frequency-dependent plasticity is to be simulated, in the embodiment of the invention, a synapse weight of a target resistive switching device when the weight is greater than a preset frequency threshold is obtained, and the weight is called a first synapse weight, and then a synapse weight of the target resistive switching device when the weight is less than the preset frequency threshold is obtained, and the weight is called a second synapse weight, wherein a difference value between the first synapse weight and the second synapse weight is greater than a preset threshold.
In the embodiment of the present invention, through multiple experiments, fig. 2 is a graph illustrating the relationship between synaptic weight and frequency in the embodiment of the present invention, as shown in fig. 2, when the frequency of the pulse signal is higher than 10Hz, the synaptic weight increases; when the frequency of the pulse signal is lower than 10Hz, the synaptic weight is reduced. Meanwhile, the resistance value is also influenced by the signal frequency, and when the top electrode receives a signal with the frequency higher than 10Hz and the bottom electrode receives a signal with the frequency lower than 10Hz, the resistance value can be changed. Therefore, in the embodiment of the present invention, the predetermined frequency threshold is 10 HZ.
Fig. 3 is a schematic diagram illustrating a relationship between a weight and a time interval of a resistive switching device in an embodiment of the present invention, and as shown in fig. 3, to simulate time-dependent plasticity, a pre-synaptic neuron activity time is t1, t1 is a first time, a post-synaptic neuron activity time is t2, and t2 is a second time, which represents a time difference between pre-and post-synaptic neuron activities.
When the neurons before and after synapse are in an excited state and delta t is larger than 0, LTP is generated, synapse weight is increased, and the smaller delta t is, the more remarkable the influence on synapse weight regulation is; otherwise, when Δ t < 0, LTD is generated and the synaptic weight decreases. As can be seen from the figure, a time difference between the first time and the second time affects a synaptic weight of the target resistive switching device.
The following provides 4 test conditions of the target resistance change device, a preset frequency threshold is 10Hz, a first sine wave signal is applied to a top electrode of the target resistance change device at a first moment, a second sine wave signal is applied to a bottom electrode of the target resistance change device at a second moment, the amplitude values of the first sine wave signal and the second sine wave signal are 0.9V, the period of the first sine wave signal and the second sine wave signal is 20ms, and the first sine wave signal and the second sine wave signal have different frequencies.
The first test method is as follows: on the basis of the foregoing embodiment, preferably, the frequencies of the first sine wave signal and the second sine wave signal are respectively located on two sides of a preset frequency threshold, and specifically include:
the frequency of the first sine wave signal is greater than the preset frequency threshold;
the frequency of the second sine wave signal is smaller than the preset frequency threshold.
In the test method, the frequency of the first sine wave signal is greater than 10HZ, the frequency of the second sine wave signal is less than 10HZ, and the first moment is earlier than the second moment. Fig. 4 is a schematic diagram of a first testing method provided in an embodiment of the invention, as shown in fig. 4, in the diagram, a pre-synaptic signal represents a first sine wave signal, a post-synaptic signal represents a second sine wave signal, a first time is a start time of the first sine wave signal, a second time is a start time of the second sine wave signal, Δ T represents a difference between the first time and the second time, a middle dotted line represents a time when a synaptic weight of a resistive device changes, and a lowest effective superimposed signal represents a voltage of a superposition portion of waveforms of upper and lower electrodes. The change of the resistance state is made to conform to the biological synapse learning curve by adjusting the frequency and the time interval delta T.
The second test method is as follows: on the basis of the foregoing embodiment, preferably, the frequencies of the first sine wave signal and the second sine wave signal are respectively located on two sides of a preset frequency threshold, and further include:
the frequency of the first sine wave signal is smaller than the preset frequency threshold;
the frequency of the second sine wave signal is greater than the preset frequency threshold.
In the test method, the frequency of the first sine wave signal is less than 10HZ, the frequency of the second sine wave signal is greater than 10HZ, and the first moment is earlier than the second moment. Fig. 5 is a schematic diagram of a second testing method provided in an embodiment of the invention, as shown in fig. 5, in the diagram, a pre-synaptic signal represents a first sine wave signal, a post-synaptic signal represents a second sine wave signal, a first time is a start time of the first sine wave signal, a second time is a start time of the second sine wave signal, Δ T represents a difference between the first time and the second time, a middle dotted line represents a time when a synaptic weight of a resistive device changes, and a lowest effective superimposed signal represents a voltage of a superposition portion of waveforms of upper and lower electrodes. The change of the resistance state is made to conform to the biological synapse learning curve by adjusting the frequency and the time interval delta T.
The third test method is as follows: in the test method, the frequency of the first sine wave signal is greater than 10HZ, the frequency of the second sine wave signal is less than 10HZ, and the first time is later than the second time. Fig. 6 is a schematic diagram of a third testing method provided in an embodiment of the invention, as shown in fig. 6, in the diagram, a pre-synaptic signal represents a first sine wave signal, a post-synaptic signal represents a second sine wave signal, a first time is a start time of the first sine wave signal, a second time is a start time of the second sine wave signal, Δ T represents a first time minus a second time, a middle dotted line represents a time when a synaptic weight of a resistive device changes, and a lowest effective superimposed signal represents a voltage of a superposition portion of waveforms of upper and lower electrodes. The change of the resistance state is made to conform to the biological synapse learning curve by adjusting the frequency and the time interval delta T.
The fourth test method is as follows: in the test method, the frequency of the first sine wave signal is less than 10HZ, the frequency of the second sine wave signal is greater than 10HZ, and the first time is later than the second time. Fig. 7 is a schematic diagram of a fourth testing method provided in the embodiment of the invention, as shown in fig. 7, in the diagram, a pre-synaptic signal represents a first sine wave signal, a post-synaptic signal represents a second sine wave signal, a first time is a start time of the first sine wave signal, a second time is a start time of the second sine wave signal, Δ T represents a first time minus a second time, a middle dotted line represents a time when a synaptic weight of a resistive device changes, and a lowest effective superimposed signal represents a voltage of a superposition portion of waveforms of upper and lower electrodes. The change of the resistance state is made to conform to the biological synapse learning curve by adjusting the frequency and the time interval delta T.
In summary, a testing method is provided for simulating biological synapse learning characteristics of a resistive device, and the testing method can consider the influence of frequency on weight under the condition of STDP time-dependent plasticity learning, wherein the influence is no longer the simulation of a single variable on synapses, and is closer to the multivariable plasticity characteristics of biological synapses. Because two factors can influence the synaptic weight in biological synaptic transmission, the testing method can simultaneously consider the frequency and time variables to better simulate the synaptic learning characteristic rule, so that the precision of the synaptic simulation curve of the resistive device is higher, and the resistive device can be better simulated.
Fig. 8 is a schematic structural diagram of a synapse simulation system of a resistive switching device according to an embodiment of the present invention, as shown in fig. 8, the system includes: a first sinusoidal signal module 801, a second sinusoidal signal module 802, an adjustment module 803, and an analog module 804. Wherein:
the first sine wave signal module 801 is used for applying a first sine wave signal to a top electrode of a target resistance change device at a first moment;
the second sine wave signal module 802 is configured to apply a second sine wave signal to the bottom electrode of the target resistive switching device at a second time, where the first time is different from the second time, a frequency of the first sine wave signal is different from a frequency of the second sine wave signal, and the frequencies of the first sine wave signal and the second sine wave signal are located on two sides of a preset frequency threshold respectively;
the adjusting module 803 is configured to adjust a time interval between the first time and the second time, adjust a frequency of the first sine wave signal and a frequency of the second sine wave signal, and repeat the above processes until a difference between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, to obtain a synapse simulation curve of the target resistive switching device, where the synapse simulation curve represents a relationship between a synapse and a time interval between the first time and the second time, and a frequency of the first sine wave signal and a frequency of the second sine wave signal;
the simulation module 804 is configured to perform synapse simulation on the target resistive switching device according to a synapse simulation curve of the target resistive switching device.
The system embodiment provided in the embodiments of the present invention is for implementing the above method embodiments, and for details of the process and the details, reference is made to the above method embodiments, which are not described herein again.
Fig. 9 is a schematic entity structure diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 9, the electronic device may include: a processor (processor)901, a communication Interface (Communications Interface)902, a memory (memory)903 and a bus 904, wherein the processor 901, the communication Interface 902 and the memory 903 are communicated with each other via the bus 904. The communication interface 902 may be used for information transfer of an electronic device. The processor 901 may call logic instructions in the memory 903 to perform a method comprising:
applying a first sine wave signal to a top electrode of a target resistance change device at a first moment;
applying a second sine wave signal to a bottom electrode of the target resistive switching device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
adjusting the time interval between the first time and the second time, adjusting the frequency of the first sine wave signal and the frequency of the second sine wave signal, and repeating the above processes until the difference value between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, so as to obtain the synapse simulation curve of the target resistive switching device, wherein the synapse simulation curve represents synapses and the relationship between the time interval between the first time and the second time, the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
In addition, the logic instructions in the memory 903 may be implemented in a software functional unit and stored in a computer readable storage medium when the logic instructions are sold or used as a separate product. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-described method embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, an embodiment of the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is implemented to perform the transmission method provided in the foregoing embodiments when executed by a processor, and for example, the method includes:
applying a first sine wave signal to a top electrode of a target resistance change device at a first moment;
applying a second sine wave signal to a bottom electrode of the target resistive switching device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
adjusting the time interval between the first time and the second time, adjusting the frequency of the first sine wave signal and the frequency of the second sine wave signal, and repeating the above processes until the difference value between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, so as to obtain the synapse simulation curve of the target resistive switching device, wherein the synapse simulation curve represents synapses and the relationship between the time interval between the first time and the second time, the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A synapse simulation method of a resistive device is characterized by comprising the following steps:
applying a first sine wave signal to a top electrode of a target resistance change device at a first moment;
applying a second sine wave signal to a bottom electrode of the target resistive switching device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
adjusting the time interval between the first time and the second time, adjusting the frequency of the first sine wave signal and the frequency of the second sine wave signal, and repeating the above processes until the difference value between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, so as to obtain the synapse simulation curve of the target resistive switching device, wherein the synapse simulation curve represents synapses and the relationship between the time interval between the first time and the second time, the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
2. The method according to claim 1, wherein a difference between a first synaptic weight and a second synaptic weight is greater than a preset threshold, the first synaptic weight being a synaptic weight of the target resistive switching device when being greater than the preset frequency threshold, the second synaptic weight being a synaptic weight of the target resistive switching device when being less than the preset frequency threshold.
3. The synapse simulation method of a resistive switching device according to claim 2, wherein the preset frequency threshold is 10 HZ.
4. The synapse simulation method of a resistive switching device according to claim 1, wherein the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located at two sides of a preset frequency threshold, specifically comprising:
the frequency of the first sine wave signal is greater than the preset frequency threshold;
the frequency of the second sine wave signal is smaller than the preset frequency threshold.
5. The method for synapse simulation of a resistive switching device according to claim 1, wherein a frequency of the first sine wave signal and a frequency of the second sine wave signal are respectively located on both sides of a preset frequency threshold, further comprising:
the frequency of the first sine wave signal is smaller than the preset frequency threshold;
the frequency of the second sine wave signal is greater than the preset frequency threshold.
6. The synapse simulation method of a resistive switching device according to claim 1, wherein the first time and the second time are different, specifically comprising:
the first time is earlier than the second time.
7. The method according to claim 1, wherein the first time and the second time are different, and further comprising:
the first time is later than the second time.
8. A synapse simulation system of a resistive switching device, comprising:
the first sine wave signal module is used for applying a first sine wave signal to a top electrode of the target resistance change device at a first moment;
the second sine wave signal module is used for applying a second sine wave signal to a bottom electrode of the target resistance changing device at a second moment, wherein the first moment is different from the second moment, the frequency of the first sine wave signal is different from that of the second sine wave signal, and the frequency of the first sine wave signal and the frequency of the second sine wave signal are respectively located on two sides of a preset frequency threshold;
the adjusting module is configured to adjust a time interval between the first time and the second time, adjust a frequency of the first sine wave signal and a frequency of the second sine wave signal, and repeat the above processes until a difference between a synapse simulation curve of the target resistive switching device and a biological synapse learning curve is within a preset range, to obtain the synapse simulation curve of the target resistive switching device, where the synapse simulation curve represents a relationship between a synapse and the time interval between the first time and the second time, and the frequency of the first sine wave signal and the frequency of the second sine wave signal;
and the simulation module is used for carrying out synapse simulation on the target resistance change device according to a synapse simulation curve of the target resistance change device.
9. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the synapse simulation method for the resistive switching device of any of claims 1-7 when executing the program.
10. A non-transitory computer readable storage medium, having stored thereon a computer program, which, when being executed by a processor, implements the steps of a synapse simulation method for a resistive switching device according to any one of claims 1 to 7.
CN202010130078.0A 2020-02-28 2020-02-28 Synapse simulation method and system of resistive device Active CN111323654B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010130078.0A CN111323654B (en) 2020-02-28 2020-02-28 Synapse simulation method and system of resistive device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010130078.0A CN111323654B (en) 2020-02-28 2020-02-28 Synapse simulation method and system of resistive device

Publications (2)

Publication Number Publication Date
CN111323654A true CN111323654A (en) 2020-06-23
CN111323654B CN111323654B (en) 2021-08-06

Family

ID=71171335

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010130078.0A Active CN111323654B (en) 2020-02-28 2020-02-28 Synapse simulation method and system of resistive device

Country Status (1)

Country Link
CN (1) CN111323654B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112329209A (en) * 2020-10-16 2021-02-05 哈尔滨工业大学(深圳) Design method of on-chip photonic device based on appearance profile control

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07141313A (en) * 1993-11-18 1995-06-02 Fujitsu Ltd Neural circuit element
CN101055717A (en) * 2007-05-14 2007-10-17 南方医科大学 Artificial cochlea implementation method using the ATF coding technology and ATF artificial cochlea
CN102959565A (en) * 2010-07-07 2013-03-06 高通股份有限公司 Communication and synapse training method and hardware for biologically inspired networks
CN103078055A (en) * 2013-01-04 2013-05-01 华中科技大学 Unit, device and method for simulating biological neuronal synapsis
CN104966778A (en) * 2015-05-07 2015-10-07 清华大学 Frequency response learning device of long-term memory and preparation method thereof
CN106098935A (en) * 2016-07-06 2016-11-09 福州大学 A kind of low-power consumption oxide wire memristor and the method realizing its synaptic function
CN106981567A (en) * 2017-03-20 2017-07-25 华中科技大学 A kind of artificial synapse device and its modulator approach based on photoelectric coupling memristor
CN108664735A (en) * 2018-05-11 2018-10-16 华中科技大学 The implementation method of STDP pulse design methods and diversification STDP based on multivalue memristor
CN109074842A (en) * 2016-04-07 2018-12-21 赫姆霍兹-森德拉姆德雷斯顿-罗森多夫研究中心 For running the method and device and its as the purposes of artificial synapse of the resistance switch for the memristor that can reconstruct to complementary simulation

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07141313A (en) * 1993-11-18 1995-06-02 Fujitsu Ltd Neural circuit element
CN101055717A (en) * 2007-05-14 2007-10-17 南方医科大学 Artificial cochlea implementation method using the ATF coding technology and ATF artificial cochlea
CN102959565A (en) * 2010-07-07 2013-03-06 高通股份有限公司 Communication and synapse training method and hardware for biologically inspired networks
CN103078055A (en) * 2013-01-04 2013-05-01 华中科技大学 Unit, device and method for simulating biological neuronal synapsis
CN104966778A (en) * 2015-05-07 2015-10-07 清华大学 Frequency response learning device of long-term memory and preparation method thereof
CN109074842A (en) * 2016-04-07 2018-12-21 赫姆霍兹-森德拉姆德雷斯顿-罗森多夫研究中心 For running the method and device and its as the purposes of artificial synapse of the resistance switch for the memristor that can reconstruct to complementary simulation
CN106098935A (en) * 2016-07-06 2016-11-09 福州大学 A kind of low-power consumption oxide wire memristor and the method realizing its synaptic function
CN106981567A (en) * 2017-03-20 2017-07-25 华中科技大学 A kind of artificial synapse device and its modulator approach based on photoelectric coupling memristor
CN108664735A (en) * 2018-05-11 2018-10-16 华中科技大学 The implementation method of STDP pulse design methods and diversification STDP based on multivalue memristor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
蔡宣敬: "基于忆阻器模拟神经突触的研究", 《中国优秀硕士学位论文全文数据库信息科技辑》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112329209A (en) * 2020-10-16 2021-02-05 哈尔滨工业大学(深圳) Design method of on-chip photonic device based on appearance profile control
CN112329209B (en) * 2020-10-16 2023-12-01 哈尔滨工业大学(深圳) Design method of on-chip photonic device based on appearance contour regulation and control

Also Published As

Publication number Publication date
CN111323654B (en) 2021-08-06

Similar Documents

Publication Publication Date Title
US9330355B2 (en) Computed synapses for neuromorphic systems
US20150206049A1 (en) Monitoring neural networks with shadow networks
US9886663B2 (en) Compiling network descriptions to multiple platforms
US20140351190A1 (en) Efficient hardware implementation of spiking networks
US20150178617A1 (en) Neural watchdog
KR20170031695A (en) Decomposing convolution operation in neural networks
WO2015065686A2 (en) Methods and apparatus for tagging classes using supervised learning
US9959499B2 (en) Methods and apparatus for implementation of group tags for neural models
WO2015053889A2 (en) Shared memory architecture for a neural simulator
US20150212861A1 (en) Value synchronization across neural processors
KR20160084401A (en) Implementing synaptic learning using replay in spiking neural networks
CN112101535B (en) Signal processing method of impulse neuron and related device
US9672464B2 (en) Method and apparatus for efficient implementation of common neuron models
TW201503001A (en) Defining dynamics of multiple neurons
US20150262054A1 (en) Analog signal reconstruction and recognition via sub-threshold modulation
CN111323654B (en) Synapse simulation method and system of resistive device
KR101825933B1 (en) Phase-coding for coordinate transformation
KR101782760B1 (en) Dynamically assigning and examining synaptic delay
US20150161506A1 (en) Effecting modulation by global scalar values in a spiking neural network
US20140365413A1 (en) Efficient implementation of neural population diversity in neural system
US20150213356A1 (en) Method for converting values into spikes
Rowan et al. Synaptic scaling balances learning in a spiking model of neocortex
CN111129297B (en) Method and system for realizing diversity STDP of memristive synapse device
Masumori et al. Autonomous regulation of self and non-self by stimulation avoidance in embodied neural networks
Ghahari et al. A physiological neural controller of a muscle fiber oculomotor plant in horizontal monkey saccades

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant