CN111315115B - Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment - Google Patents
Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment Download PDFInfo
- Publication number
- CN111315115B CN111315115B CN202010094749.2A CN202010094749A CN111315115B CN 111315115 B CN111315115 B CN 111315115B CN 202010094749 A CN202010094749 A CN 202010094749A CN 111315115 B CN111315115 B CN 111315115B
- Authority
- CN
- China
- Prior art keywords
- circuit board
- grounding ring
- chip
- implementation method
- electrostatic discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000003068 static effect Effects 0.000 claims abstract description 24
- 230000005611 electricity Effects 0.000 claims abstract description 22
- 239000003990 capacitor Substances 0.000 claims abstract description 8
- 238000013461 design Methods 0.000 abstract description 11
- 230000006378 damage Effects 0.000 abstract description 9
- 230000002093 peripheral effect Effects 0.000 abstract description 3
- 208000028659 discharge Diseases 0.000 description 29
- 238000010586 diagram Methods 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 230000001052 transient effect Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 150000003071 polychlorinated biphenyls Chemical group 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000191 radiation effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
- H05K1/0257—Overvoltage protection
- H05K1/0259—Electrostatic discharge [ESD] protection
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Elimination Of Static Electricity (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The invention provides a method for preventing secondary electrostatic discharge, a circuit board and equipment, which are used for measuring a secondary electrostatic waveform; calculating the bandwidth of secondary static electricity according to the measured secondary static electricity waveform; and according to the condition that the bandwidth of secondary static electricity is less than the cut-off frequency, a method of forming a pi-shaped filter circuit by using the filter capacitor of the via hole and the filter circuit inductor is utilized to prevent the secondary static discharge from damaging circuit elements. And a grounding ring is configured on a preset layer of the circuit board below the chip; a preset number of through holes are formed in the grounding ring; the signal line of chip passes through the below signal layer on ground ring place layer wears out modes such as ground ring, and further secondary electrostatic discharge that prevents is to the harm of circuit element, can reduce the design risk of product by a wide margin, improves the comprehensive quality of product, has avoided when clearance impulse voltage is higher than the threshold voltage that the air punctures, and these small submillimeter clearances will produce secondary electrostatic discharge, produce harm to peripheral circuit.
Description
Technical Field
The invention relates to the field of circuit boards, in particular to a method for preventing secondary electrostatic discharge, a circuit board and electronic equipment.
Background
Secondary Electrostatic Discharge (Secondary Electrostatic Discharge) is a special form of Electrostatic Discharge, and when a charged human body contacts an electronic product, in addition to primary Discharge of the human body to the electronic product, the primary Discharge can rapidly charge gaps between metal parts of the electronic product, and when the gap voltage far exceeds a static breakdown voltage, a strong Secondary Discharge phenomenon can be formed.
The secondary discharge generally occurs inside the electronic product, which interferes and damages the electronic product from the inside, and is more severely affected by the environment, the generated electromagnetic hazard is stronger, and the physical mechanism is more complicated. Because of the particularity and complexity, the direct application of the traditional electrostatic discharge theory and empirical model has great limitation, and the protection of secondary static electricity is a difficult point in the field of electrostatic protection.
At present, electronic products only have a primary electrostatic discharge (ESD) protection design, and the most common method for protecting ESD is as follows: the ESD protection device is used, and a common anti-static component is a TVS (transient Voltage suppressor) transient Voltage suppressor, which is different from a common Schottky diode used for rectification and is characterized in that when two poles are impacted by reverse transient high energy, the ESD protection device can change high impedance between the two poles into low impedance at the speed of nanosecond order and clamp the Voltage at a preset value. The static electricity is divided into positive and negative.
Thus, all bidirectional TVS is used, from single channel to multi-channel, TVS has a multi-clock form, such as USB signal, which is six-channel, see fig. 1.
The inevitable presence of "floating" metal parts in electronic products, such as: the metal key is floating, which means that some part is not communicated with the grounding part of the electronic product.
These floating metal parts form a sub-millimeter-sized gap with other metal parts inside the electronic product. When the electronic product is in use, an electrostatic discharge may occur when the electronic product touches the floating metal parts, and the normal operation of the product may not be affected by the electrostatic discharge.
However, as shown in fig. 2, the primary electrostatic discharge charges the gap between the metal members, and when the gap charging voltage is higher than the threshold voltage for air breakdown, the secondary electrostatic discharge occurs in these minute sub-millimeter gaps, which may cause damage to the peripheral circuits.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a realization method for defending against secondary electrostatic discharge, which comprises the following steps:
s1, measuring the secondary electrostatic waveform;
s2, calculating the bandwidth of the secondary static electricity according to the measured secondary static electricity waveform;
s3, configuring a pi-type filter circuit according to the fact that the bandwidth of the secondary static electricity is smaller than the cut-off frequency, and selecting the via hole parameters of the circuit board;
s4, arranging a grounding ring on a preset layer of the circuit board below the chip;
s5, arranging a preset number of through holes on the grounding ring;
s6, arranging the chip in the grounding ring, and connecting the grounding pin of the chip with the grounding ring;
and S7, the signal wire of the chip passes through the grounding ring through the signal layer below the layer where the grounding ring is located.
Preferably, step S3 further includes:
the cutoff frequency is calculated as follows:
r is a terminal matching resistor of the filter circuit;
l is the filter circuit inductance, and C is the filter capacitance.
Preferably, the filter capacitance is calculated by:
epsilon is the dielectric constant of the PCB board, and the diameter of the via hole pad is d1The diameter of the via hole is d2；
The inductance of the filter circuit inductance is
h is the length of the via hole,
d2the via diameter.
Preferably, a ground ring is disposed on the TOP layer of the circuit board under the chip in step S4.
Preferably, the signal line of the chip is laminated to the signal layer below the layer of the grounding ring by using the micro-hole and penetrates out of the grounding ring.
Preferably, the pore diameter of the micropores is less than 0.3mm, and the length is less than 1.5 mm;
the micropores are arranged close to the via holes on the grounding ring.
Preferably, the via hole on the ground ring is a blind hole.
Preferably, the dimension between the vias is less than one twentieth of the wavelength of the secondary electrostatic bandwidth.
Based on the method, the invention also provides a circuit board which comprises the circuit board configured by the implementation method for defending against secondary electrostatic discharge.
Based on the method, the invention also provides electronic equipment comprising a circuit board.
According to the technical scheme, the invention has the following advantages:
according to the invention, the damage of secondary electrostatic discharge to circuit elements is prevented by using the method of forming the pi-shaped filter circuit by the filter capacitor of the via hole and the filter circuit inductor according to the condition that the bandwidth of the secondary electrostatic discharge is less than the cut-off frequency. And a grounding ring is configured on a preset layer of the circuit board below the chip; a preset number of through holes are formed in the grounding ring; the signal line of chip passes through the below signal layer on ground ring place layer wears out modes such as ground ring, and further secondary electrostatic discharge that prevents is to the harm of circuit element, can reduce the design risk of product by a wide margin, improves the comprehensive quality of product, has avoided when clearance impulse voltage is higher than the threshold voltage that the air punctures, and these small submillimeter clearances will produce secondary electrostatic discharge, produce harm to peripheral circuit.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the description will be briefly introduced, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a TVS six-channel protection circuit of a USB device in the prior art;
FIG. 2 is a schematic diagram of secondary electrostatic interference;
FIG. 3 is a flow chart of an implementation method for preventing secondary electrostatic discharge;
FIG. 4 is a waveform diagram of secondary static electricity;
FIG. 5 is a schematic view of a via;
FIG. 6 is an equivalent circuit diagram of a via;
FIG. 7 is a via type diagram;
FIG. 8 is a schematic diagram of PCB design for secondary electrostatic discharge protection.
Detailed Description
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
For the invention, the related circuit board is a PCB board commonly used in the field, a pi-type filter circuit is formed by using the parasitic capacitance of the via hole and the inductance of the filter circuit, and the damage of secondary electrostatic discharge to circuit elements is prevented by the wiring design of some PCBs. Specifically, the present invention provides a method for implementing protection against secondary electrostatic discharge, as shown in fig. 3, the method includes:
s1, measuring the secondary electrostatic waveform;
the oscilloscope and the high-voltage probe can be used for measuring the secondary electrostatic waveform, as shown in fig. 4, it can be understood that a plurality of chips are arranged on the PCB, and the pin of the chip closest to the secondary discharge point can be selected as the measurement point, and when the high-voltage probe is used, the attenuator and the magnetic ring should be connected in series to prevent the secondary electrostatic from damaging the oscilloscope.
S2, calculating the bandwidth of the secondary static electricity according to the measured secondary static electricity waveform;
from the oscilloscope waveform diagram 4 of the secondary static electricity, the rise time Tr of the secondary peak is read, for example, 1ns as in fig. 4. The maximum radiation bandwidth of the secondary static electricity is BW 1/Tr 1 GHz.
S3, configuring a pi-type filter circuit according to the fact that the bandwidth of the secondary static electricity is smaller than the cut-off frequency, and selecting the via hole parameters of the circuit board;
the pad and aperture size of the via hole and the length of the blind hole are continuously adjusted by selecting a suitable via hole parameter design, so that the bandwidth of secondary static electricity is smaller than a cut-off frequency f0
The invention uses the parasitic capacitance of the via hole and the filter circuit inductance to form a pi-type filter circuit, and prevents the damage of secondary electrostatic discharge to the circuit elements through the wiring design of the PCB.
When the maximum size of the PCB via is smaller than the wavelength of the waveform of the secondary electrostatic discharge, that is, the electrical short characteristic is exhibited, the via may be equivalent to the pi-type filter circuit shown in fig. 5 and 6. The capacitor is generated by the bonding pad between two layers, and C is the equivalent capacitance value of the filter capacitor, namely the filter capacitor. Epsilon is the dielectric constant of the PCB board, and the diameter of the via hole pad is d1The diameter of the via hole is d2。
Filter capacitor
Let L be the inductance of the filter circuit inductance, h be the length of the via hole, d2The via diameter.
The pi-type filter circuit belongs to a low-pass filter circuit, and the cutoff frequency of the filter circuit is calculated in the following mode:
r is a terminal matching resistor of the filter circuit;
l is the inductance of the filter circuit, and C is the filter capacitor.
In the invention, the bandwidth of secondary static electricity is smaller than the cut-off frequency f by selecting the design of proper via hole parameters0. In the design of the PCB via hole, the via hole is divided into a through hole, a buried hole, a blind hole, a micro hole, and the like, as shown in fig. 7, wherein the length of the through hole is longest, the equivalent inductance thereof is largest, and the length of the micro hole is shortest, and the equivalent inductance is small. The invention selects the blind hole, namely the via hole on the grounding ring is the blind hole. The number of layers of the mainboard of the server is generally more than 10, so that the number of the reaching layers of the blind holes is different, and the length parameter h of the via hole is selected in a rich way.
S4, arranging a grounding ring on a preset layer of the circuit board below the chip;
the grounding ring is arranged on the TOP layer of the circuit board below the chip, namely the grounding ring is arranged on the TOP layer of the PCB.
Furthermore, a circle of grounding loop line is configured in the TOP layer of the PCB below the chip subjected to the secondary electrostatic interference, the width of the grounding loop line is slightly larger than the diameter of the via hole selected in the front, and the via hole selected in the front is fully distributed on the grounding loop line. The size between the through holes is less than one twentieth of the wavelength corresponding to the bandwidth of the secondary static electricity so as to inhibit the radiation effect of the secondary static electricity.
S5, arranging a preset number of through holes on the grounding ring;
s6, arranging the chip into the grounding ring, and connecting the grounding pin of the chip with the grounding ring;
the ground pin of the chip with secondary electrostatic interference is connected to the ground loop, and when the chip has a plurality of ground pins, the plurality of ground pins are connected to the ground loop in the form of a GND plane.
And S7, the signal wire of the chip passes through the grounding ring through the signal layer below the layer where the grounding ring is located.
In the present invention, as shown in fig. 8, in order to reduce the influence of the via hole on the signal integrity index of the chip signal line, the signal line of the chip with secondary electrostatic interference passes through the ground loop line through the micro hole.
The penetrated layer is also not in the TOP layer of the PCB. The signal wire of the chip of the invention passes through the grounding ring through the signal layer below the layer where the grounding ring is arranged. I.e., through the nearest signal layer below the TOP layer.
The micro-holes on the signal lines also have the function of filtering and protecting against static electricity. According to multiple verification and simulation, the suggested micropores have the aperture smaller than 0.3mm and the length smaller than 1.5mm, are close to the via holes of the grounding loop as much as possible, and are used for utilizing the via holes of the grounding loop to return a path for common-mode current generated when the signal line jumps, so that the EMI risk is reduced.
The circuit board and the corresponding elements thereof are configured based on the mode, so that the design risk of the product can be greatly reduced, the comprehensive quality of the product is improved, the product is guaranteed to be smoothly sold on the market, the satisfaction degree of customers is improved, and a large amount of economic benefits can be obtained.
The invention also provides a circuit board comprising the circuit board configured by the implementation method for defending against secondary electrostatic discharge.
The invention further provides electronic equipment comprising the circuit board.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A realization method for defending against secondary electrostatic discharge is characterized by comprising the following steps:
s1, measuring the secondary electrostatic waveform;
s2, calculating the bandwidth of the secondary static electricity according to the measured secondary static electricity waveform;
s3, configuring a pi-type filter circuit according to the fact that the bandwidth of the secondary static electricity is smaller than the cut-off frequency, and selecting the via hole parameters of the circuit board;
s4, arranging a grounding ring on a preset layer of the circuit board below the chip;
s5, arranging a preset number of through holes on the grounding ring;
s6, arranging the chip into the grounding ring, and connecting the grounding pin of the chip with the grounding ring;
and S7, the signal wire of the chip passes through the grounding ring through the signal layer below the layer where the grounding ring is located.
2. The implementation method of claim 1,
step S3 further includes:
the cutoff frequency is calculated as follows:
r is a terminal matching resistor of the filter circuit;
l is the inductance of the filter circuit, and C is the filter capacitor.
3. The implementation method of claim 2,
the filter capacitance is calculated in the following way:
epsilon is the dielectric constant of the PCB board, and the diameter of the via hole pad is d1The diameter of the via hole is d2；
The inductance of the filter circuit inductance is
h is the length of the via hole,
d2the via diameter.
4. The implementation method according to claim 1 or 2,
in step S4, a ground ring is disposed on the TOP layer of the circuit board under the chip.
5. The implementation method according to claim 1 or 2,
a signal line of the chip is connected with a signal layer below a layer where the grounding ring is located through the grounding ring by using a micropore layer changing.
6. The implementation method of claim 5,
the aperture of the micropore is less than 0.3mm, and the length of the micropore is less than 1.5 mm;
the micropores are arranged close to the via holes on the grounding ring.
7. The implementation method according to claim 1 or 2,
the through hole on the grounding ring is a blind hole.
8. The implementation method according to claim 1 or 2,
the size between the through holes is less than one twentieth of the wavelength of the secondary electrostatic bandwidth.
9. A circuit board, comprising the circuit board configured according to the implementation method for defending against secondary electrostatic discharge of any one of claims 1 to 8.
10. An electronic device comprising the circuit board of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010094749.2A CN111315115B (en) | 2020-02-16 | 2020-02-16 | Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010094749.2A CN111315115B (en) | 2020-02-16 | 2020-02-16 | Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111315115A CN111315115A (en) | 2020-06-19 |
| CN111315115B true CN111315115B (en) | 2022-07-08 |
Family
ID=71159366
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010094749.2A Active CN111315115B (en) | 2020-02-16 | 2020-02-16 | Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111315115B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101728365A (en) * | 2008-10-22 | 2010-06-09 | 金宝电子工业股份有限公司 | Static discharge protective structure |
| CN202841677U (en) * | 2012-06-15 | 2013-03-27 | 深圳市鑫银通科技有限公司 | Anti-static circuit board |
| CN103152975A (en) * | 2013-02-28 | 2013-06-12 | 江苏惠通集团有限责任公司 | Printed circuit board of wall switch |
| CN105392273A (en) * | 2015-10-19 | 2016-03-09 | 重庆航凌电路板有限公司 | Electrostatic protection circuit board |
-
2020
- 2020-02-16 CN CN202010094749.2A patent/CN111315115B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101728365A (en) * | 2008-10-22 | 2010-06-09 | 金宝电子工业股份有限公司 | Static discharge protective structure |
| CN202841677U (en) * | 2012-06-15 | 2013-03-27 | 深圳市鑫银通科技有限公司 | Anti-static circuit board |
| CN103152975A (en) * | 2013-02-28 | 2013-06-12 | 江苏惠通集团有限责任公司 | Printed circuit board of wall switch |
| CN105392273A (en) * | 2015-10-19 | 2016-03-09 | 重庆航凌电路板有限公司 | Electrostatic protection circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111315115A (en) | 2020-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7944670B2 (en) | Surge protection circuit for passing DC and RF signals | |
| KR100870874B1 (en) | Connection apparatus and high voltage impulse protection methods thereof | |
| US20050036262A1 (en) | DC Voltage surge suppressor with distributed capacitance EMI filtering and impedance matching | |
| JP2004311877A (en) | Static electricity countermeasure component | |
| KR101999509B1 (en) | Circuit board | |
| US20080192401A1 (en) | Surge absorption circuit | |
| TWI327803B (en) | Circuit for preventing surge, connector and electronic apparatus thereof | |
| CN111315115B (en) | Implementation method for preventing secondary electrostatic discharge, circuit board and electronic equipment | |
| WO2020199148A1 (en) | Network port filter and network device | |
| JP6843312B1 (en) | Circuit boards and electronic devices | |
| CN210157155U (en) | Network port filter and network equipment | |
| CN217935443U (en) | Filtering device and microwave oven | |
| US10912187B2 (en) | Printed board | |
| JP2005294511A (en) | Electronic circuit unit having connector terminal and circuit board | |
| JP5209119B2 (en) | Electrostatic discharge (ESD) protection circuit and method | |
| TWI287960B (en) | One/multi layer printed circuit board capable of preventing electrostatic discharge and routing method thereof | |
| CN210957784U (en) | Lightning indirect effect protection module of communication signal | |
| US20080072204A1 (en) | Layout design of multilayer printed circuit board | |
| Kosteletskii et al. | Development of a high current protection device against ultrashort pulse | |
| US6709977B2 (en) | Integrated circuit having oversized components and method of manafacture thereof | |
| JP2008172280A (en) | Electronic circuit unit having connector terminal and circuit board | |
| US9655270B2 (en) | Electronic device and electromagnetic noise control method | |
| JP2006174601A (en) | Surge absorbing circuit | |
| Lin et al. | Electrostatic discharge protection device and common mode suppression circuit on printed circuit board codesign | |
| US20120262829A1 (en) | Protection device against electromagnetic interference |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |