CN111289952A - Radar target echo simulation method and device - Google Patents
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Abstract
The invention discloses a radar target echo simulation method, which comprises the following steps: converting the received radar signal into a digital signal after frequency conversion; down-mixing the digital real signal to zero intermediate frequency and carrying out quadrature processing to obtain a complex signal; carrying out convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal; target distance information is delayed and superposed on the convolution modulation signal in a time domain, and target speed information is further superposed through a complex multiplication signal; and up-converting the signal on which the target speed information is superimposed to baseband frequency, and converting the signal into a corresponding analog signal for generating an analog target echo. The technology of the invention compensates the inherent delay caused by the system delay by using a frequency domain compensation mode, and realizes the close range simulation of the radar target echo.
Description
Technical Field
The invention relates to the technical field of advanced assistant driving, in particular to a radar target echo simulation method and device.
Background
An advanced Driving Assistance system adas (advanced Driving Assistance system) is an Assistance system that monitors and perceives the surrounding environment at any time, identifies and tracks dynamic and static objects during the Driving process of a vehicle, and realizes safer Driving through various sensors (millimeter wave radar, laser radar, camera, satellite navigation, etc.) mounted on the vehicle.
The millimeter wave radar is not influenced by weather conditions, can detect targets even in environments such as fog, smoke, haze and the like, and is an indispensable detection sensor in an ADAS (advanced surveillance system). Accordingly, the radar target echo simulator for testing the working performance of the millimeter wave radar is also an important test device in the radar production process.
With the development of automobile radar technology, the range of target detection distance is wider and wider, the detection precision is higher and higher, the target identification capability is enhanced, and radar target echo simulators are also developed continuously, the distance information of targets is simulated by using a time delay method of a general automobile radar target echo simulator at present, but due to the limitation of hardware delay time, the prior art can only achieve the minimum simulation distance of 4m, and the targets in a shorter distance cannot be simulated, but for automobile radars, the requirement for testing the targets in the shorter distance is obvious. Therefore, a method for simulating a target echo with a shorter distance is necessary.
Disclosure of Invention
An embodiment of the present invention provides a radar target echo simulation method and apparatus, which are used to solve at least one of the above technical problems.
In a first aspect, an embodiment of the present invention provides a radar target echo simulation method, including:
converting the received radar signal into a digital signal after frequency conversion;
down-mixing the digital real signal to zero intermediate frequency and carrying out quadrature processing to obtain a complex signal;
carrying out convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal;
target distance information is delayed and superposed on the convolution modulation signal in a time domain, and target speed information is further superposed through a complex multiplication signal;
and up-converting the signal on which the target speed information is superimposed to baseband frequency, and converting the signal into a corresponding analog signal for generating an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
In some embodiments, the inherent delay is obtained by:
generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave;
inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detecting element comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit;
determining the intrinsic delay from the first and second pulse wave envelopes.
In some embodiments, the up-converting the signal on which the target velocity information is superimposed to a baseband frequency and converting the signal into a corresponding analog signal for generating an analog target echo includes:
converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and up-converting the analog signal to the frequency of a radar transmission signal to obtain the target echo.
In a second aspect, an embodiment of the present invention provides a radar target echo simulation apparatus, including:
the first frequency conversion unit is used for carrying out frequency conversion processing on the received radar signal;
the analog-to-digital conversion unit is used for converting the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit for down-mixing the digital signal to a zero intermediate frequency digital signal for quadrature processing into a complex signal;
the frequency domain convolution unit is used for carrying out convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal;
the information superposition unit is used for delaying and superposing target distance information on the convolution modulation signal in a time domain and further superposing target speed information through a complex multiplication signal;
and the echo generating unit is used for up-converting the signal on which the target speed information is superposed to baseband frequency and converting the signal into a corresponding analog signal so as to generate an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
In some embodiments, the inherent delay is obtained by:
generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave;
inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detecting element comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit;
determining the intrinsic delay from the first and second pulse wave envelopes.
In some embodiments, the echo generating unit comprises:
the digital up-conversion unit is used for up-converting the signal on which the target speed information is superposed to baseband frequency;
the digital-to-analog conversion unit is used for converting the signals up-converted to the baseband frequency into corresponding analog signals;
and the second frequency conversion unit is used for up-converting the analog signal to the frequency of a radar transmission signal to obtain the target echo.
The embodiment of the invention has the beneficial effects that: the technology of the invention compensates the inherent delay caused by the system delay by using a frequency domain compensation mode, and realizes the close range simulation of the radar target echo. According to the inherent distance which cannot be simulated and is brought by system delay, convolution modulation is carried out on a radar transmitting signal and a system delay characteristic function, and then the obtained echo is superposed with target distance and speed information, so that zero-distance simulation of a target can be achieved.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a flow chart of an embodiment of a radar target echo simulation method of the present invention;
FIG. 2 is a flow chart of one embodiment of determining an inherent delay in the present invention;
FIG. 3 is a schematic block diagram of an embodiment of a radar target echo simulation apparatus of the present invention;
fig. 4 is a schematic block diagram of an embodiment of an echo generating unit in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
As shown in fig. 1, a flowchart of an embodiment of a radar target echo simulation method according to the present invention is shown, in which the radar target echo simulation method includes:
and S10, converting the received radar signal into a digital signal after frequency conversion processing.
And S20, mixing the digital real signals to zero intermediate frequency and carrying out quadrature processing to obtain complex signals.
And S30, carrying out convolution modulation processing on the complex signal and the system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal.
Illustratively, in some embodiments, the system delay characteristic coefficient is: d (t) ═ e-j2πf*tWhere f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
S40, delaying and overlapping target distance information in a time domain for the convolution modulation signal, and further overlapping target speed information through a complex multiplication signal;
and S50, up-converting the signal on which the target speed information is superimposed to baseband frequency, and converting the signal into a corresponding analog signal for generating an analog target echo.
Illustratively, the signal up-converted to the baseband frequency is converted to a corresponding analog signal; and up-converting the analog signal to the frequency of a radar transmission signal to obtain the target echo.
The invention discloses a radar target echo simulation method which can be applied to millimeter wave radar simulation test of an Advanced Driving Assistance System (ADAS). The invention can realize the close range simulation of the target and meet the close range target simulation requirement of the automobile radar test system. The technology of the invention compensates the inherent delay caused by the system delay by using a frequency domain compensation mode, and realizes the close range simulation of the radar target echo. According to the inherent distance which cannot be simulated and is brought by system delay, convolution modulation is carried out on a radar transmitting signal and a system delay characteristic function, and then the obtained echo is superposed with target distance and speed information, so that zero-distance simulation of a target can be achieved.
The zero-distance simulation technology applied to ADAS can solve the problem that a short-distance target cannot be simulated due to system delay of a traditional radar simulator, the simulation of the zero-distance automobile radar target is realized through algorithm compensation, and no hardware extra cost exists in the algorithm compensation. The simulation technology has the advantages of convenience, low cost and the like.
Fig. 2 is a flow chart of an embodiment of the present invention for determining the intrinsic delay, in which the intrinsic delay is obtained by: generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave; inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected; the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop; the inherent delay is determined based on the detection unit.
Illustratively, the determining the inherent delay based on the detecting element comprises: detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit; detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit; determining the intrinsic delay from the first and second pulse wave envelopes.
In some embodiments, another embodiment of the radar target echo simulation method of the present invention specifically includes the following steps:
(1) receiving the signal through a frequency conversion front end, and then carrying out AD sampling to convert the signal into a digital signal;
(2) the digital real signal is mixed to zero intermediate frequency and processed into IQ complex signal in quadrature;
(3) carrying out convolution modulation on the complex signal and the system delay characteristic coefficient obtained by calculation; the system delay characteristic coefficient is obtained by the following formula:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware.
Specifically, the self-inherent delay t of the simulator system can be tested by the following method:
a Digital DDS (Direct Digital Synthesizer) is used in the signal processing logic to generate a dot frequency signal, which is modulated with fixed pulses to obtain a known pulse wave. The pulse wave passes through a system signal processing link, is output through a DAC, is subjected to up-conversion and is received by the input down-conversion of an simulator, so that the signal passes through the whole closed-loop link, a digital detector is used in logic to detect the envelope of the signal, the generated pulse and the envelope of the pulse received by the ADC are timed, and the intrinsic delay parameter in the system can be obtained by comparing the generated pulse and the envelope of the pulse received by the ADC.
Obtaining intrinsic delay parameters inside the system: knowing the system delay time t, for a system delay characteristic function: and D (t) ═ exp (-j2 pi f x t) is subjected to inverse Fourier transform to obtain a time domain signal, the time domain signal is stored in a RAM of an FPGA chip and is called by logic control, and the signal and the coefficient are subjected to sliding convolution, so that the system delay can be compensated, and the aim of zero-distance simulation of the target echo is fulfilled. Since the inherent delay is the time to be compensated, the value of t should be the inverse number, and the system delay characteristic function should be:
D(t)=exp(j*2*π*abs(t))
where abs (t) represents the absolute value of the delay time.
(4) The compensated signals are delayed in a time domain to superpose target distance information, and target speed information is superposed through a DDS complex multiplication signal;
(5) and the signal is up-converted to baseband frequency, then up-converted to radar transmitting signal frequency through the front-end frequency conversion component, and the radio frequency signal is output through the antenna to obtain a simulated target echo.
Illustratively, the baseband signal processing is implemented by FPGA, and for the stepping of the time domain delay, the period size of the clock should be processed for the FPGA chip. The invention divides the time domain delay into two parts: coarse delay, fine delay. The coarse delay part is realized by processing a clock cycle through an FPGA chip, the fine delay is realized by adjusting the pin output sequence of the FPGA chip, and the precision can reach N/Ts times of the sampling clock cycle of the FPGA chip, wherein N is the number of parallel processing circuits of AD sampling signals, and Ts is the processing clock cycle of the FPGA chip.
Illustratively, the system delay characteristic coefficient is generated by the upper computer according to the formula in step (3), wherein the parameter t represents the system delay of the system hardware and the logic whole, and after the upper computer obtains the delay parameter, the upper computer calculates the corresponding system delay characteristic coefficient through the formula, and sends the system delay characteristic coefficient to the baseband logic signal processing board to perform convolution modulation with the actual signal.
The integral delay parameter of the system is obtained by closed-loop measurement of the system: the signal inlet and the signal outlet of the simulator are connected by a radio frequency cable, and software issues a corresponding control instruction, so that the delay parameter of the system can be obtained.
The system delay closed-loop measurement method is realized by adopting the following mode:
inside the system, a digital DDS is used in a signal processing board to generate a dot frequency signal, and fixed pulses are used for modulation to obtain a known pulse wave. The pulse wave passes through a signal processing link, is output through a DAC (digital-to-analog converter) 30, is subjected to up-conversion and is received by the input down-conversion of an simulator, so that the signal passes through the whole closed-loop link, a digital detector is used in logic to detect the envelope of the signal, and the envelope is timed, so that the inherent delay parameter in the system can be obtained.
The beneficial effects of the invention different from the prior art are as follows: the device can realize the function of simulating the close-range target by compensating the inherent delay of the system through the algorithm, and the speed precision of the simulated target distance is high.
Meanwhile, the system comprises a time-frequency analysis function and a frequency spectrum measurement function. And after data are collected through the ADC, storing a data file, and analyzing frequency components and time-frequency information of radar waveforms.
Illustratively, a large-capacity storage daughter board mounted outside the FPGA can be used for signal storage and playback. The FPGA is also used for analyzing the digital radar intermediate frequency signal, and analyzing the waveform information of the digital signal through FFT processing to obtain the signal bandwidth, PRT and center frequency information.
Illustratively, the FPGA also serves the function of measuring the system delay of the simulator itself, by generating 30 the active signal in the FPGA chip and connecting the simulators RFin and RFout together to form a loop to measure the total elapsed time of the signal through the loop.
The digital Down-conversion DDC (digital Down converter) mainly aims to recover an original signal by performing digital mixing on an Intermediate Frequency (IF) digital signal acquired by AD (analog-to-digital converter) and then performing decimation filtering, and adopts a digital signal technology to realize Down-conversion during digital Down-conversion, wherein the Down-conversion comprises algorithms of digital filtering, orthogonal transformation, sampling, decimation and the like. The main circuit module is composed of four parts: numerical control oscillation, digital mixing, sampling extraction and digital filtering.
In a digital Up converter (duc), in a radio transmission link, a digital signal is converted into an analog signal, the analog signal is mixed to obtain an expected radio frequency center frequency higher than an original signal, then the signal is amplified to a proper power level, and finally the signal is transmitted through an antenna after the bandwidth is limited. This way of upward variation of the mixing frequency is called up-conversion.
As shown in fig. 3, a schematic block diagram of an embodiment of the radar target echo simulation apparatus of the present invention is shown, in which the radar target echo simulation apparatus 300 includes:
a first frequency conversion unit 310, configured to perform frequency conversion processing on the received radar signal;
an analog-to-digital conversion unit 320, configured to convert the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit 330 for down-mixing the digital signal to a zero intermediate frequency digital signal for quadrature processing into a complex signal;
the frequency domain convolution unit 340 is configured to perform convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation apparatus obtained through pre-calculation to obtain a convolution modulation signal;
an information superimposing unit 350, configured to delay and superimpose target distance information on the convolution modulation signal in a time domain, and further superimpose target velocity information by a complex multiplication signal;
the echo generating unit 360 is configured to up-convert the signal on which the target speed information is superimposed to a baseband frequency, and convert the signal into a corresponding analog signal, so as to generate an analog target echo.
In some embodiments, the system delay characteristic coefficient is:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
In some embodiments, the inherent delay is obtained by:
generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave;
inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
In some embodiments, said determining said inherent delay based on said detecting element comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit;
determining the intrinsic delay from the first and second pulse wave envelopes.
As shown in fig. 4, in some embodiments, the echo generating unit 360 includes:
a digital up-conversion unit 361, configured to up-convert the signal on which the target speed information is superimposed to a baseband frequency;
a digital-to-analog conversion unit 362, configured to convert the signal up-converted to the baseband frequency into a corresponding analog signal;
and the second frequency conversion unit 363 is configured to up-convert the analog signal to a radar transmission signal frequency to obtain the target echo.
The radar target echo simulation device can execute the method provided by the embodiment of the application, and has corresponding functional modules and beneficial effects of the execution method. For technical details that are not described in detail in this embodiment, reference may be made to the methods provided in the embodiments of the present application.
It should be noted that for simplicity of explanation, the foregoing method embodiments are described as a series of acts or combination of acts, but those skilled in the art will appreciate that the present invention is not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention. In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (10)
1. A radar target echo simulation method, comprising:
converting the received radar signal into a digital signal after frequency conversion;
down-mixing the digital real signal to zero intermediate frequency and carrying out quadrature processing to obtain a complex signal;
carrying out convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal;
target distance information is delayed and superposed on the convolution modulation signal in a time domain, and target speed information is further superposed through a complex multiplication signal;
and up-converting the signal on which the target speed information is superimposed to baseband frequency, and converting the signal into a corresponding analog signal for generating an analog target echo.
2. The method of claim 1, wherein the system delay characteristic coefficient is:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
3. The method of claim 2, wherein the inherent delay is obtained by:
generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave;
inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
4. The method of claim 3, wherein the determining the intrinsic delay based on the detection unit comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit;
determining the intrinsic delay from the first and second pulse wave envelopes.
5. The method of claim 1, wherein the upconverting the signal after superimposing the target velocity information to a baseband frequency and into a corresponding analog signal for generating an analog target echo comprises:
converting the signal up-converted to the baseband frequency into a corresponding analog signal;
and up-converting the analog signal to the frequency of a radar transmission signal to obtain the target echo.
6. A radar target echo simulation device, comprising:
the first frequency conversion unit is used for carrying out frequency conversion processing on the received radar signal;
the analog-to-digital conversion unit is used for converting the radar signal processed by the first frequency conversion unit into a corresponding digital signal;
a digital down-conversion unit for down-mixing the digital signal to a zero intermediate frequency digital signal for quadrature processing into a complex signal;
the frequency domain convolution unit is used for carrying out convolution modulation processing on the complex signal and a system delay characteristic coefficient of the radar target simulation device obtained through pre-calculation to obtain a convolution modulation signal;
the information superposition unit is used for delaying and superposing target distance information on the convolution modulation signal in a time domain and further superposing target speed information through a complex multiplication signal;
and the echo generating unit is used for up-converting the signal on which the target speed information is superposed to baseband frequency and converting the signal into a corresponding analog signal so as to generate an analog target echo.
7. The apparatus of claim 6, wherein the system delay characteristic coefficient is:
D(t)=e-j2πf*t
where f is the signal frequency and t is the inherent delay caused by the system hardware of the radar target simulation apparatus.
8. The apparatus of claim 7, wherein the inherent delay is obtained by:
generating a dot frequency signal by using a digital DDS (direct digital synthesizer), and modulating by using a fixed pulse to obtain a known pulse wave;
inputting the pulse wave to a system signal processing link through a detection unit, wherein the system signal processing link comprises a distance delay/Doppler modulation unit, a digital up-conversion unit and a digital-to-analog conversion unit which are sequentially connected;
the output of the digital-to-analog conversion unit is used as the input of an analog-to-digital conversion unit of the radar target simulation device, and the analog-to-digital conversion unit is connected to the detection unit through a digital down-conversion unit, so that a system of the radar target simulation device forms a closed loop;
the inherent delay is determined based on the detection unit.
9. The apparatus of claim 8, wherein the determining the intrinsic delay based on the detection unit comprises:
detecting a first pulse wave envelope of a pulse wave obtained by fixed pulse modulation by using the detection unit;
detecting a second pulse wave envelope of the pulse wave processed by the closed-loop system of the radar target simulation device by using the detection unit;
determining the intrinsic delay from the first and second pulse wave envelopes.
10. The apparatus of claim 6, wherein the echo generation unit comprises:
the digital up-conversion unit is used for up-converting the signal on which the target speed information is superposed to baseband frequency;
the digital-to-analog conversion unit is used for converting the signals up-converted to the baseband frequency into corresponding analog signals;
and the second frequency conversion unit is used for up-converting the analog signal to the frequency of a radar transmission signal to obtain the target echo.
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