CN111277152A

CN111277152A - Alternating arm current source converter, power conversion system and method for controlling such a converter

Info

Publication number: CN111277152A
Application number: CN201911221009.4A
Authority: CN
Inventors: 雷米·丹尼斯
Original assignee: Electricite de France SA
Current assignee: Electricite de France SA
Priority date: 2018-12-03
Filing date: 2019-12-03
Publication date: 2020-06-12
Also published as: FR3089361B1; FR3089361A1

Abstract

The present invention relates to an Alternating Arm Current Source Converter (AACSC) in series on a High Voltage Direct Current (HVDC) transmission link for the flow of Direct Current (DC) from and/or to the link (HVDC) and connected to an Alternating Current (AC) network for the flow of alternating current from and/or to the Alternating Current (AC) network. The converter (AACSC) comprises at least one steering switch (DS) and units of submodules connected in parallel, the steering switch (DS) being controlled in dependence on the current flowing through the units of submodules. The invention also relates to a power conversion system comprising such a converter (AACSC), and to a method of converting power (HVDC) on a link using such a converter (AACSC).

Description

Alternating arm current source converter, power conversion system and method for controlling such a converter

Technical Field

The present invention relates to the field of power transmission over power transmission and distribution networks, in particular over high voltage direct current links. More particularly, the invention relates to the field of power conversion of medium and high power of several to tens of megawatts.

The invention relates in particular to an arrangement for converting electrical power between a high voltage Direct Current (DC) link and an Alternating Current (AC) network.

Background

Power conversion utilizes a power converter, inductive and reactive components, control devices, and a transformer to reversibly convert high amperage (several thousand amps) direct current to alternating current (single phase or three phase) to provide a medium voltage network of several kilovolts.

The installation of High Voltage Direct Current (HVDC) links is widely used for applications where direct current has technical and economic significance, especially for long distance power transmission. Wherein HVDC links can especially transmit high powers while reducing the number of cables required, interconnection of asynchronous networks and long distance power transmission.

In fact, during transmission of electricity in the form of alternating current, the capacitance of the distribution network cables generates reactive power and reduces the active power delivered. Since no reactive power is generated in the cable, the loss caused by the power transmission in the form of direct current is small.

High voltage direct current links are also advantageous for power transmission at distances greater than about 100km buried or in submarine cables. High voltage direct current links can also be used for shorter distance transmission because of the ease of regulation of the power carried and its energy stability.

The proliferation of these HVDC links raises issues with their ability to interconnect with the area being traversed. This may be due to the need to provide isolated communities or to connect dispersed low power production means together. Drawing or injecting a small fraction of power from the link (typically less than 10% of the total power) is commonly referred to as tapping.

Several converter station technologies currently exist, including for example "line converter" (LCC) technology, two-stage "voltage source converter" technology (VSC) and modular multilevel converter technology (VSC-MMC).

However, today's conversion architectures are not suitable for use. The requirement to connect to very high voltages requires hundreds of power semiconductors in series, adding to the cost and complexity of these structures. These semiconductors are not designed for operation at high voltages and low intensities, resulting in very low utilization. With today's conversion technology, the cost of connecting to the HVDC link is hardly compressed depending on the converted power.

The possibility of injecting a small portion of the electric power into the hvdc transmission line, particularly in the case of renewable energy sources, or extracting electric power therefrom to supply the rural areas, at controlled costs and floor space, constitutes a real technical challenge. HVDC link tapping stations, known as "HVDC tapping stations", have not been implemented in the field due to the cost of converters that can convert high voltage DC to step-down AC or vice versa.

The series configuration has a number of advantages. It is acknowledged that an HVDC tap station connected in parallel on an HVDC link and referred to as "parallel tapped" has only an economic significance if the power level of the HVDC tap station is the same as the power level of the main station. While the alternative of connecting HVDC tap stations in series to the HVDC link and referred to as "series tapping" is more cost effective in order to obtain a low power output from the HVDC tap stations. In fact, the series configuration allows a more optimal operation of the semiconductors and therefore reduces the number of components required and the additional inherent functions, such as their cooling.

Technical problem

Several architectures have been proposed in the literature for tandem tapping stations, such as mechanical power stations, 12-pulse or forced-switching LCC stations, forced-switching CCC stations, three-level LCC stations, soft-switching DC/DC converters and Modular Multilevel Current Source Converters (MMCSC). However, none of these architectures exceed the technical readiness level TRL5 (which verifies the nomenclature of components or breadboards in the relevant environment).

Most topologies proposed for series tapping of DC links have insufficient performance and/or excessive investment costs and therefore are not competitive with the deployment of alternative solutions, such as local production of diesel generators or diesel engines, or link construction connected to a more distant but more readily usable AC network.

The Alternating Arm Converter (AAC) topology has been developed as a voltage source architecture, consisting of six half-arm voltage sources in a three-phase mode. Each half-arm includes a series connected capacitor sub-module, a steering switch and a half-arm inductor also in series for current control and smoothing. The AAC designation is understood as voltage source, called "alternating arm voltage source converter-AAVSC".

Therefore, the goal is to increase the flexibility of the HVDC link while ensuring the implementation of a series tap-off station with a higher efficiency, lower cost and floor space converter topology.

Disclosure of Invention

To this end, the invention relates to an alternating arm current source converter (alternating arm current-source converter) adapted to control the conversion of electrical energy between a high voltage direct current transmission link and an alternating current network, the converter comprising:

-at least a first and a second DC connection point adapted to connect the converter in series to the high voltage direct current transmission link for allowing direct current to flow from and/or to the high voltage direct current transmission link;

-at least one AC connection point adapted to connect the converter to the AC network for flowing AC current from and/or to the AC network;

the converter further comprises at least one arm comprising:

-at least a first and a second half-arm connected to each other at a midpoint, each half-arm comprising a pilot switch and a sub-module unit, the pilot switch and the sub-module unit of each half-arm being connected in parallel between one of an AC connection point and a DC connection point;

-a submodule unit of each half-arm comprising a plurality of submodules connected in parallel to each other, each of said submodules comprising an inductor and a microswitch;

the pilot switch of at least one half-arm is adapted to be controlled in dependence of the current flowing through the sub-module unit of said at least one half-arm. The described alternating arm current source converter is adapted to convert electrical energy by drawing a portion of the power carried on the high voltage direct current transmission link (also referred to as the main link). Since the ac arm current source converter is controllable, it can control its converted power flow.

The converter is power reversible: power flow may be from the DC part to the AC part and vice versa. Furthermore, it can be connected without affecting the direction of the direct current.

Although the principle of parallel association of switched inductors is similar to that of parallel association of known prior art three-phase current source converters, these structures are quite different from the concept presented in this specification due to the structure of the basic sub-modules used, their arrangement, their connection to the output transformer and their control.

The principle of using dual current/voltage control is a well-known electrical principle, applicable to series tapping, in which the limitations often encountered due to high voltage levels in HVDC transmission extend to the current.

The proposed architecture is the current pair of an alternating arm voltage source converter. Although it is known to construct a process that securely performs the voltage source structural duality, such an implementation is not obvious to those skilled in the art, since the operational constraints of the assembly and the operation of the surrounding electrical system, which itself remains unchanged, are very different. Among these major differences, it can be noted that the reliability and durability of current varying inductors are very different compared to capacitors affected by voltage variations, and the nature of the grid designed for operation at fixed and variable voltages.

One application for which the described alternating arm current source converter architecture is directed is to actively manage power flow in an HVDC mesh network using these current source converters as adjustable virtual impedances. Although the connection is similar to that of known prior art current source converters (in series on a HVDC link), the basic functionality differs from that of known current source converters due to the introduction of new components, the new topology design requiring specific control over their implementation.

In order to obtain a functional converter that can be integrated into a conventional power grid, several modifications to the control device are required, adding other electrical components (e.g. on-load tap-changer transformers) and methods of designing very different passive components.

According to one embodiment, the pilot switch of at least one half-arm is adapted to be closed when the current through the sub-module unit reaches a target value.

The current generated by the submodule unit is controlled by adding a pilot switch in the half-arm, so that the current allowed by the submodule can be limited. The number of sub-modules may be reduced.

According to one embodiment, the open or closed state of the pilot switch of one of said half-arms is adapted to be controlled in dependence of the open or closed state of the pilot switch of the other half-arm.

Indeed, when the guide switch of one of the half-arms is closed, in other words conductive, the corresponding sub-module unit is called a bypass, the energy of which then remains constant. The pilot switch on the other arm half must be open, in other words non-conductive, otherwise the arm comprising the first and second arm halves will be short-circuited. Controlling the open or closed state of the director switches of one arm half in dependence on the open or closed state of the director switches of the other arm half may generate complementary waveforms to produce a sinusoidal current at the mid-point of the arm half. The generated complementary waveforms flow through the closed pilot switch. Another advantage of this control is that energy is exchanged between the sub-modules of the first half-arm and the second half-arm when their respective pilot switches are open. This exchange makes it possible to rebalance the differences related to the variation of the physical parameters of the submodules and the asymmetries related to the current control.

According to one embodiment, at least one of the plurality of sub-modules has a half-bridge architecture comprising two micro-switches selectively switched to cause two current levels to flow through the sub-module, in one architecture one of the two current levels is zero current and the other of the two current levels is equal to the current flowing through the inductor of the sub-module.

According to one embodiment, at least one of the plurality of sub-modules has a full-bridge architecture comprising four microswitches selectively switched to flow three current levels through the sub-module, in one architecture one of the three current levels corresponding to: zero current, or current flowing through the inductor of the sub-module, or opposite to the current flowing through the inductor of the sub-module.

The full-bridge architecture makes it possible to generate three current levels through the sub-modules, in particular by inserting the inductors of the sub-modules in two directions. The converter may advantageously comprise sub-modules in a half-bridge architecture and sub-modules in a full-bridge architecture in order to optimize the number of semiconductors in the sub-modules. The topology of such converters is said to be hybrid.

According to one embodiment, the AC connection point of the arm is located at the midpoint.

The connection of the AC network to the midpoint of the converter arm allows the current generated at the midpoint to form the phase of the AC network. The converter may comprise as many arms as the AC network comprises phases, each arm being connected to one phase of the AC network.

According to one embodiment, each half-arm comprises a capacitor connected in parallel with the sub-module unit and the pilot switch.

The parallel capacitors absorb high-frequency components of the current flowing through the half-limb, in particular of the current flowing through the submodule unit.

According to one embodiment, said pilot switch comprises a valve of a transistor, preferably of the IGBT type.

According to one embodiment, the sub-module micro-switches are voltage reversible and current unidirectional.

According to one embodiment, said microswitch comprises a diode and a transistor connected in series, preferably of the IGBT type.

According to one embodiment, the converter comprises three arms, said alternating current network being a three-phase network, each of the three arms comprising an AC connection point connecting the converter to a phase of said three-phase network.

Another object of the invention is a high voltage direct current power conversion system comprising a high voltage direct current mesh transmission network extending between at least three power conversion stations, the power conversion system according to the preceding description comprising an alternating arm current source converter connected in series to the mesh transmission network and to an alternating current network, the converter being adapted to control the conversion of electrical power between the high voltage direct current mesh transmission network and the alternating current network.

In the case of a high voltage direct current mesh transmission network involving at least three power conversion stations (also called "main conversion stations"), the alternating arm current source converter, in addition to having the function of drawing/injecting a portion of the power to connect to the local network, allows to control the main current spread on the mesh network by controlling the DC voltage drop imposed on one or more poles of the network.

An advantage of such a system is that the control of the power flow in the high voltage direct current mesh transmission network is more complex than in the high voltage direct current transmission link. The series addition of the described converters makes it possible to introduce an additional degree of regulation. The power conversion stations between which the mesh network extends include at least one AC-DC converter and/or at least one DC-AC converter.

Another object of the invention is a method for converting power between a high voltage direct current transmission link and an alternating current network, said method utilizing a power conversion system comprising an alternating limb current source converter connected in series to said transmission link at a first and a second DC connection point and connected to the alternating current network at an AC connection point, said converter comprising a first and a second half-limb connected at the AC connection point,

the micro-switches of the sub-module units of the converter arm are switched to produce a sinusoidal waveform at the AC connection point of the arm,

the guide switches of the first and second arms are controlled to insert and remove each sub-module unit between the DC connection point and one of the AC connection points,

the method comprises the following steps:

(a) an upper conduction stage in which the pilot switch of the first half-arm is closed and the pilot switch of the second half-arm is open,

(b) an overlap phase, in which the pilot switches of the first half-arm and the second half-arm are opened and a flow path for current between the sub-module units of the first half-arm and the second half-arm is formed to transfer energy between the sub-module units,

(c) a lower conduction phase in which the pilot switch of the first half-arm is open and the pilot switch of the second half-arm is closed,

the switching of the pilot switches of the half-arms is performed according to the current flowing in the respective submodule units.

This method for controlling the converter makes it possible to control the current flowing through the half-arms of the converter and, consequently, to control the internal balance of the energy accumulated in the submodules.

According to one embodiment, the micro-switch is controlled by a zero voltage switch.

The zero voltage switch can limit the switching loss of the semiconductors in the sub-module unit.

According to one embodiment, the overlap phase comprises a first and a second overlap sub-phase, the sign of the energy transfer between the sub-module units during the first overlap sub-phase being opposite to the sign during the second overlap sub-phase.

The change in sign of the energy transfer between the sub-module cells corresponds to the reversal of the sign of the half-arm current. The two overlapping sub-phases may ensure that the energy exchange between the AC side and the DC side of the sub-module unit is zero within one cycle to avoid any energy drifts, which may need to be compensated by the converter internal control.

Drawings

Further features and advantages will become apparent from the following description of an embodiment, given as a non-limiting example, with reference to the accompanying drawings.

In the drawings:

fig. 1 shows a tapping arrangement of a HVDC link;

FIG. 2 shows two tap configurations;

fig. 3 shows a topology of a current source modular multilevel converter;

FIG. 4 shows a submodule of the converter of FIG. 3;

FIG. 5a shows a mode of operation of a variant of the sub-module of FIG. 4;

FIG. 5b shows another mode of operation of a variation of the sub-module of FIG. 5 a;

FIG. 6a represents a potential energy imbalance in an alternating arm converter;

FIG. 6b represents a potential energy imbalance in an alternating arm converter;

figure 7 shows another alternative arm current source converter topology;

FIG. 8a shows a modified submodule of the converter of FIG. 7;

FIG. 8b schematically illustrates the operation of the variant sub-module of FIG. 8 a;

FIG. 9a shows another variant submodule of the converter of FIG. 7;

FIG. 9b schematically illustrates the operation of the variant sub-module of FIG. 9 a;

FIG. 10 shows the structure of the half-arm of the transducer of FIG. 7;

FIG. 11 shows the current distribution in the half-arm of FIG. 10;

FIG. 12a shows a stage of operation of the converter of FIG. 7;

FIG. 12b shows another stage of operation of the converter of FIG. 7;

FIG. 12c shows another stage of operation of the converter of FIG. 7;

FIG. 12d shows another stage of operation of the converter of FIG. 7;

FIG. 13 shows control logic for the converter of FIG. 7;

figure 14a shows DC voltage and output current waveforms at the terminals of the converter of figure 7 for one load angle;

FIG. 14b shows a Fourier transform of the waveform of FIG. 14 a;

figure 14c shows DC voltage and output current waveforms at the terminals of the converter of figure 7 for another load angle;

FIG. 14d shows a Fourier transform of the waveform of FIG. 14 c;

figure 14e shows DC voltage and output current waveforms at the terminals of the converter of figure 7 for another load angle;

FIG. 14f shows a Fourier transform of the waveform of FIG. 14 e;

FIG. 15 shows the half-leg voltage, output voltage and voltage drop at the terminals of the converter of FIG. 7;

FIG. 16 shows half-arm current reversal angle;

FIG. 17 shows half-arm energy variation, voltage and current of the converter of FIG. 7 during an operating cycle;

FIG. 18 shows half-arm power and energy variations at different load angles;

FIG. 19 shows a loss model for the sub-module of FIG. 8 a;

fig. 20 shows the shape of the input and output waveforms of the series converter;

FIG. 21 shows the periodic variation of the current and total energy of the sub-modules;

FIG. 22 shows a loss model for the sub-module of FIG. 9 a;

FIG. 23 shows the semiconductor waveforms and losses of the sub-module of FIG. 9 a;

FIG. 24 shows the semiconductor waveforms and losses for the director switch;

FIG. 25 shows input and output waveforms of the converter of FIG. 7;

fig. 26 shows the connection of a variant of the converter according to fig. 7;

fig. 27 shows a connection according to another variant of the converter of fig. 7;

fig. 28 shows a schematic diagram of the phases of the converter of fig. 7.

Detailed Description

The same reference numbers in different drawings identify the same or similar elements.

The concept of tapping an HVDC link is shown in fig. 1. The indicated tapping configuration is established between the first electrical network Res1 and the second electrical network Res 2. A first AC-DC converter AC/DC is installed between the first grid Res1 and the HVDC link. A second DC-AC converter DC/AC is installed between the HVDC link and a second network Res 2. The current flowing in an HVDC link is several thousand amperes and the voltage on the terminals is several hundred kilovolts. Thus, the HVDC link carries several hundred megawatts of power. Tapping of the HVDC link in question comprises connecting at a location in the HVDC link an HVDC tapping station comprising a third DC-AC converter DC/AC adapted to draw direct current from the HVDC link and inject alternating current into the third isolated grid Res3, or draw alternating current from the third isolated grid Res3 and inject direct current into the HVDC link.

Tapping of HVDC links can be done according to two configurations of connections for HVDC tapping stations, as shown in fig. 2. The series tap configuration is shown on the left side of fig. 2. This is a Series connection with the HVDC link, called Series Tap in fig. 2 and labeled "Series Tap" (where the design is imposed by the current and results in a voltage drop in the link.

The parallel tap configuration is shown on the right side of fig. 2. It is a branch connection to the HVDC link, called Parallel Tap in fig. 2, and labeled "Parallel Tap". The converter station must be designed to accommodate all DC bus voltages, thereby reducing current.

A modular multilevel current source converter, called MMCSC, is known from the prior art. Fig. 3 shows the topology. This is a converter suitable for series tapping on a HVDC link. The MMCSC converter shown in FIG. 3 is adapted to inject or draw three-phase AC power into or from the isolation network, (ia, va), (ib, vb), and (ic, vc) are the three phases of the three-phase AC power.

When a sufficient number of sub-modules are used, the MMCSC converter outputs a more or less sinusoidal voltage, requiring little filtering. The MMCSC converter has the following functions:

operating at low switching frequency (150 Hz on average for HVDC tap applications) compared to conventional 2-stage current source converters, thereby reducing switching losses,

-the reduction of harmonics,

by acting on the number of sub-modules, variable power and voltage levels are easily achieved.

The MMCSC converter can essentially withstand short circuit faults and can control active and reactive power independently, as well as low harmonic distortion. It can also be used for so-called "weak" networks or passive loads with a low short-circuit rate.

The schematic diagram of the MMCSC converter in fig. 3 is a three phase with N +1 levels. Each phase of the converter consists of an upper arm half, a lower arm half and the midpoint of the two arm halves for the flow of the AC signal.

The illustrated MMCSC converter includes three phases (a-phase, b-phase, c-phase), each phase including two half-arms. Each halfThe arms comprising half-arm capacitors C_armAnd N sub-modules SMi connected in parallel to each other. Thus, the illustrated MMCSC converter has N +1 levels. A stack of N identical submodules connected in parallel to each other is called a submodule stack.

Half-arm capacitor C_armIs the dual of the half-arm inductors of a modular multilevel voltage source converter, denoted as MMVSC, which functions to absorb the harmonics generated by the sub-module stack.

The sub-modules constituting the MMCSC converter are pairs of sub-modules of known MMVSC converters of the prior art. A schematic diagram of the sub-module is shown in figure 4 a. It consists of a half-bridge structure comprising half-arm switches (S1, S2), in particular half-arms of the insulated gate bipolar transistor type known as "IGBT", controlled in a complementary manner, reversible in voltage and unidirectional in current, allowing insertion of the sub-module inductors only in the positive direction.

When the upper switch S1 is activated, the sub-module is said to be inserted into the half-arm and the output current is the same as the output current of the inductor as shown in fig. 4 b. Conversely, when the lower switch S2 is activated, the sub-module is said to be bypassed or not inserted, the output current is zero and the inductor discharges through S2, as shown in fig. 4 (c). As a result, by inserting or bypassing the N sub-modules of a half-arm, a current of level N +1 can be generated as an output in each half-arm, including a zero current that bypasses all sub-modules.

For the current source sub-modules it is necessary to prevent an open circuit condition, for example in case of an IGBT failure. Where appropriate, the addition of a thyristor in parallel with the inductor will ensure current continuity therein and avoid damage to the sub-modules, as shown in figures 5a, 5 b. Fig. 5a shows the submodule with thyristors and in normal operation. Fig. 5b shows the submodule with thyristors and in open circuit operation, in other words at zero submodule current i_SM. Current i through the inductor_LFlow continues through the added thyristor.

In phase a of the converter shown in fig. 3, the output current is equal to the current of the inductor or zero, depending on the switches of the activated submodule. Each half-arm of the mmscc converter may be considered as a "discrete" controllable current source, the resolution of which is defined by the number of sub-modules used. The output AC current ia is the result of a variation of the number of inserted sub-modules. The output voltage and current of each phase are defined as follows:

[ function 1a ]

i_a＝I_asin(ω₀t)

[ function 1b ]

The apparent inductances of the upper and lower half-arms of phase a are:

[ function 2a ]

[ function 2b ]

N_auAnd N_alThe number of submodules inserted into the upper half arm and the lower half arm, respectively. The total current of the upper and lower arm sub-modules is then expressed as:

[ function 3a ]

[ function 3b ]

i_LaujAnd i_LaljThe currents of the submodules inserted in the upper and lower half-arms, respectively. By reference to the equation [ function 3a ]]And [ function 4b ]]Defining the currents of the upper and lower half-arms:

[ function 4a ]

[ function 4b ]

Wherein v is_auAnd v_alRespectively, the upper and lower half-arm voltages.

As shown in equations [ function 4a ] and [ function 4b ], the half-arm current consists of three components:

-a DC component I_dc-3 for keeping the current of the sub-module inductor near its nominal value;

-an AC component i_a/2；

The current flowing between the three phases of the converter, which contains different harmonic components (depending on the selected modulation method), and represents the sum of the ripple currents in the sub-module inductors due to the switching.

Since the phase difference of the circulating currents of the three phases is 2 pi/3, their sum is zero as shown in the following formula:

[ function 5]

i_cira+i_cirb+i_circ＝0

Thus, these currents have no effect on the DC bus or the alternating current external to the converter. They do, however, affect the energy transfer and balance between the half-arms and also the loss rate of the converter.

In practice, on the left side of fig. 6a, the energy levels in the boxes schematically show the energy balance in the converter sub-modules. On the right side of fig. 6a, the average energy level Emoy in the box schematically shows the energy stability of the converter as a whole due to the energy balance in the sub-modules. On the left side of fig. 6b, the energy levels in the box schematically illustrate the situation where the converter sub-modules are in energy imbalance, although on the converter, as shown on the right side of fig. 6b, the external energy is stable. Therefore, internal energy balance within the converter is an important factor constituting converter control.

Thus, the output current for the a-phase is written:

[ function 6]

i_a＝i_au-i_al

And the output voltage is written as:

[ function 7]

According to the formulas [ function 2a ], [ function 2b ], [ function 4a ] and [ function 4b ]:

[ function 8]

Therefore, the current i of the inserted submodule must be controlled_LauAnd i_LalTo obtain the desired phase current.

Since the reference current does not take into account the circulating current, the following relationship is obtained:

[ function 9a ]

[ function 9b ]

m_iIs the current modulation index, defined as:

[ function 9c ]

The voltage on each half-arm terminal is obtained in the same way:

[ function 10a ]

[ function 10b ]

m_vIs the voltage modulation index, defined as:

[ function 10c ]

Thus, the power of phase a is the sum of the power of each half-arm:

[ function 11]

p_a＝p_au+p_al＝i_Lau×v_au+i_Lal×v_al

In steady state, and irrespective of the losses of the converter, the DC component of the energy must be zero to ensure the stability of the converter.

Thus, by integrating the relation [ function 11]]Removing DC component and substituting m_iAnd m_vThe internal energy of phase a is obtained.

[ function 12]

The equation [ function 12] shows that the energy fluctuation in the half-arm of the converter is twice the fundamental frequency. This means that the 2 nd order harmonic of the circulating current is most important, again in line with the current flowing from the MMVSC converter.

Assuming a perfectly balanced algorithm for the sub-module voltages within each half-arm, the energy contained in each half-arm can be expressed as:

[ function 13]

[ function 14]

Where N is the number of each half-arm submodule, L_SMIs the inductance of each submodule, and i_LIs the average current of the phase a half-arm submodule.

The current of each submodule varies according to the charging and discharging of the inductor, and the energy of the half-arm varies as shown by the equation [ function 13 ]. The energy in each half-arm can be expressed as:

[ function 15a ]

[ function 15b ]

Where Δ E represents the peak-to-peak energy change in the lower arm half at a given operating point, Δ i_LRepresenting the inductance L_SMThe ripple current in the capacitor. Therefore, submodule L_SMCan be derived from the relation [ function 15a ]]And [ function 15b ]]Deducing:

[ function 16]

The expression [ function 16] indicates that the choice of inductance is crucial, since the value of the sub-module inductance affects the ripple current and thus the circulating current.

The topology control of the MMCSC converter in HVDC tap applications is similar to that of the MMVSC converter. Typically, the outer loop for controlling the active and reactive power P/Q will generate a reference output current for the selected modulation to produce a half-arm reference current. These reference currents are then adjusted so as to distribute the energy evenly between all the half-arms using an inductor current balancing algorithm that sends control signals to the IGBT transistors of the sub-module, thereby controlling their insertion.

The object of the present invention is an alternating arm current source converter, AACSC, as shown in fig. 7, the operation of which can be summarized by applying the dual principle to an alternating arm current converter voltage source, AAVSC. Table 1 below summarizes the main equivalence relationship between an AAVSC converter and its dual AACSC converters.

[ Table 1]

One motivation for applying the dual principle for conversion from an AAVSC converter to an AAVSC converter is the desire to maximize the utilization of the rated current of the semiconductors in case of series insertion in an HVDC link.

However, the topology replacing the alternating arm converter AAC is more complex than the topology of the modular multilevel converter MMC, because it involves more working phases and non-linearities, making the development of its control rather complex.

The topology of the AACSC converter differs from the topology of the above-described MMCSC converter in that it comprises an associated steering switch DS in parallel with the stack of sub-modules, which appears in the block of fig. 7. When the current reaches a certain level, the steering switch DS allows bypassing the stack of sub-modules, the energy of which then remains constant. The director switches DS of the complementary half-arms must be opened to avoid phase shorts and then generate the necessary complementary current waveforms to produce a sinusoidal current at the mid-point of the half-arm. The addition of the steering switch DS may reduce the current that the sub-module stack has to generate.

The reduction in current supported by the sub-modules is one of the key features of the AACSC converter, which makes it potentially cheaper, simpler and more efficient than the MMCSC converter.

In the case of current dependent designs, the gain depends on several factors, including the type of sub-module, the ratio of input and output currents, and the power drawn. However, this gain is even more advantageous when the amplitude of the output current is high, and the cost and additional complexity incurred by adding the steering switches can be compensated for by reducing the number of sub-modules required.

The sub-modules in the AAVSC converter are identical to the sub-modules of the MMCSC converter described above, paired with the sub-modules of the MMVSC or the AAVSC converter. Two types of preferential use are represented in figures 8a and 9a and include:

half-bridge configuration in fig. 8a, which uses half-arm switches that are voltage-reversible/current-unidirectional, allowing the sub-module inductors to be inserted only in the positive direction. FIG. 8b is a graph showing submodule current I as a function of the Opening (ON) or closing (OFF) of switches S1 and S2_SMA table of values;

the full-bridge configuration in fig. 9a, using two parallel switching half-arms, which are voltage-reversible/current-unidirectional, allowing insertion of the sub-module inductors in both directions. FIG. 9b is a graph showing submodule current I as a function of the Opening (ON) or closing (OFF) of switches S1 to S4_SMTable of values.

Each director switch takes the form of a micro-switch, represented in the box of fig. 7, and is composed of a diode and a transistor connected in series. Their complementary voltage characteristics make it possible to achieve voltage reversibility of the components. Since the switching current is the current of the sub-module inductor, its purpose is not to counteract the effect itself. To limit the switching losses of each cell, a zero voltage switch ZVS may be provided.

A simplified structure of a half-arm DM equipped with half-bridge sub-modules is shown in fig. 10, with stepped waveforms as shown in fig. 11. The half-arm current is distributed between the sub-module stack SSM, the director switch and the half-arm capacitor. When stacking current I_stackWhen its target value is reached, the pilot switch is closed and the flow of the residual current peak generated by the complementary half-arm is ensured. The capacitor absorbs the high frequency component HF of the current.

In the same way as for the MMCSC converter, the reference current for the a-phase half-arm is written as:

[ function 17a ]

[ function 17b ]

Using the current modulation index:

[ function 17b ]

The operation of the AACSC converter is divided into several phases, as described below.

For simplicity, the response time of the algorithm for balancing the sub-module inductor currents is negligible with respect to the variation of the output current. Similarly, the energy imbalance between the different half-arms of the converter is temporarily neglected. Thus, at each instant of time, it is assumed that the current of all the submodules of the converter is equal to I_SM。

The first phase is referred to as the "turn-on-up phase" and the operation of the AACSC converter during this phase is shown in fig. 12 a. In this stage, the upper DS_uThe guide switch DS is turned on and the lower DS_lThe pilot switch DS is non-conductive.

Thus, we have:

[ function 18a ]

I_ua＝N_uI_SM+I_DSu+I_Cu

[ function 18b ]

I_la＝N_lI_SM+I_Cl

As a result of which,

[ function 19]

I_a＝I_ua-I_la＝[N_u-N_l]I_SM+I_DSu+I_Cu-I_Cl

Wherein N is_uAnd N_lNumber of submodules inserted in the upper and lower arm halves, I_SMIs the current of the submodule, I_DSuIs the current of the upper director switch DS, I_CuAnd I_ClAre respectively the upper halfThe current of the capacitors of the arms and the lower half-arm.

Number N in case of full-bridge half-arm_uAnd N_lMay have a negative value corresponding to a bridge inserted in the reverse direction and thus corresponding to the negative value at-I_SMTo inject a current.

After each submodule is inserted, a steady state is reached, in which the current of the submodule no longer varies, in other words the voltage of the half-arm is zero. The equation [ function 19] can then be simplified to:

[ function 20]

I_a＝[N_u-N_l]I_SM+I_DSu

The second phase is referred to as the "overlap period" and the operation of the AACSC converter during this phase is shown in fig. 12b, 12 c. At this stage, the two pilot switches DS are non-conductive. The operation of the converter is similar to that of the MMCSC converter. This phase is the dual of the overlapping phases of the AAC voltage source converter. We can distinguish between two symmetric sub-phases in the overlapping phase, denoted 2a and 2b, respectively, as shown in fig. 12b and 12c, respectively. These sub-stages (2a, 2b) will be described in more detail in the following description.

At steady state, direct current I_aExpressed as:

[ function 21]

I_a＝[N_u-N_l]I_SM

During this overlapping phase, an exchange of energy between the submodules of the upper half-arm and the lower half-arm is made possible. This exchange enables to rebalance the differences related to the variations of the physical parameters of the sub-modules and to the differences of the current control.

Fig. 13 shows the control logic of the pilot switch in "logic" in the lower graph. The upper graph shows the reference current (in amperes A) in the upper arm and the upper arm half_{Iu_ref}And I_{l_ref}And a stack current I of a submodule of the converter_{SM_max}And a switching threshold of the pilot switch. By analyzing the waveforms of fig. 13, an expression of the overlap angle θ r can be established:

[ function 22]

In practice, the overlap angle required to rebalance the energy between the half-arms of the converter must be at its minimum to limit the degradation of the output current waveform.

The operation of the AAVSC converter in extended overlap (denoted as EO) makes it possible to reduce the so-called "six-pulse" oscillations that occur in the DC waveform, in particular the oscillations due to the AC operating phase of the converter half-arm. As in the case of a conventional modular multilevel converter MMC, this extended overlap operation is defined by an overlap angle θ r, which is substantially equal to π/3, thus ensuring a continuous path for the current through one of the phases. For an AACSC converter, the extended overlap operation may provide the following maximized stack current:

[ function 23]

The third phase is referred to as the "turn-down phase" and the operation of the AACSC converter during this phase is shown in fig. 12 d. At this stage, the upper pilot switch DS is not turned on and the lower pilot switch DS is turned on.

In steady state, direct current I_aExpressed as:

[ function 24]

i_a＝[N_u-N_l]I_SM-I_DSl

The choice of the overlap angle has a decisive influence on the performance of the AACSC converter. The most obvious effect is the effect on the quality of the generated current. In the extended overlap operation, the waveform quality is best when the odd harmonic loaded is not a multiple of 3 as the overlap weight angle is reduced.

The DC voltage drop applied by the tap is also affected due to the occurrence of disturbances related to repeated transients between the conducting and overlapping sequences of the different phases of the converter.

Thus, the extended overlap operation may reduce harmonic pollution generated by the converter on the DC side, and thus may reduce the size of the required filtering. In the extended overlap operation, the "6-pulse" ripple form, represented by the bold line in fig. 15, is considered to be the observable waveform coming out of the diode bridge.

The voltage at the terminals of the HVDC tap station oscillates between the following theoretical values:

[ function 25a ]

[ function 25b ]

In the present case, as shown in fig. 14a to 14f, the extended overlap operation is also beneficial for the quality of the AC waveform. FIG. 14a shows the output currents I at 14c and 14e, respectively_ACAnd DC voltage U_HVDC14d, 14F, respectively, represent the fourier transform F (I) at the terminals of their respective AACSC converters_AC) And F (U)_HVDC) For the overlap angle: θ r is 10 °, θ r is 30 °, θ r is 60 °, in other words, in the extended overlap mode EO.

In addition to waveform quality, another advantage of the extended overlap mode of operation is the enhanced ability to rebalance energy between the half-arms, with the overlap period being the only period in which such rebalancing can occur. Thus, extended operation can be performed away from the optimal operating point (referred to as the "optimal position") of the converter, thereby providing greater flexibility in operating point. The operation in the optimal position is an operation in which the alternating current and the direct current flowing through the converter are substantially equal. This criterion is more decisive in the case of HVDC tapping stations, where the DC current is made to vary according to the power through the main link, and it is suggested to use a variable current modulation index.

The results presented in this specification are valid for extended overlap operations.

Stored in submodule SM_iThe instantaneous energy in the inductor of (a) is written as:

[ function 26]

Thus, the total energy stored in the half-arm submodule is:

[ function 27]

In order to ensure the stability of the converter, it must be ensured that the various energies stored do not change over time.

For this purpose, the following numbers can be considered:

-total energy Σ E stored in all submodules of the AACSC converter_tot；

-energy difference between the upper and lower half-arms of the same phase: delta E_iWherein i is selected from the phases [ a, b, c ]]；

Energy stored in all submodules of the same phase i, Σ E_i,i∈[a,b,c].

Regardless of the state of the converter, the above quantities are linked by the following equation:

[ function 28]

[ function 29a ]

[ function 29b ]

Wherein E is_iuAnd E_ilThe upper half arm and the lower half arm of the ith phaseEnergy of half arm.

If Σ E_totThe average value at a given operating point is constant, the energy stability of the converter can be ensured.

In the case of load balancing, it must also be satisfied:

[ function 30]

Finally, the energy difference within the same phase should be minimized.

The parameters for achieving optimal position operation are determined by evaluating the conditions for internal energy stabilization of the AACSC converter. For this reason, in one cycle, the energy exchanged between the DC side and the AC side must be zero in one stack to avoid any energy drift that needs to be compensated by the converter internal control.

Fig. 17 shows an example of a result obtained when the modulation index is erroneously equal to 3/2. Fig. 17 shows, from top to bottom, the submodule (V) during an operating cycle of the AACSC converter_{stack_u}，I_{stack_u}) And a guide switch (V)_DSu，i_DSu) Stacked voltage and current, half-arm submodule E_auEnergy change and Direction Switch (DS)_u，DS_l) The control logic of (1). The current peaks appearing in the steering switch DS are analog artifacts, the branch inductance of the steering switch DS being deliberately neglected. The AACSC converter operates in an extended overlap mode.

Simulations performed show that it is preferable to control the AACSC converter by discharging the stack capacitor at each cycle. The selected value of the capacitor must be low enough to limit its stored energy, which ignores its reactivity and avoids any energy oscillation in the LC circuit formed by the sub-module inductors. The preferred operation here will be referred to as "discontinuous loading", the capacitors of each half-arm being periodically charged and discharged in rhythm with the network frequency.

In the upper conducting phase, the upper director switch DS is conducting and the half-arm voltage common to the sub-module stack and the director switch DS is zero. Thus, during this time, the stack does not receive any energy, which is obviously a constant current in the sub-module inductor.

Therefore, the study of the energy stability of the converter must be focused on the energy variations that occur during the overlap and down conduction phases. Since the two sub-phases of the overlapping phase are symmetrical, it is sufficient to study only one sub-phase.

The regions marked J and R in fig. 17 may appear the same in the overlap and down conduction phases. In effect, they represent the sign changes in the sub-module energy transfer. Region J corresponds to the energy gain of the stack of sub-modules, the stack voltage being positive and the current being positive. Region R is defined by the sign inversion of the stack current, the voltage remaining positive. When the energy gain (region J) is equal to its energy loss (region R), the energy stability of the half-arm can be ensured.

Corresponding to the angle of current reversal, denoted by θ_iBased on fig. 16, the following can be expressed:

[ function 31]

As can be graphically verified in FIG. 17, θ_iCan be linked to the overlap angle thetar, which is itself also based on the current I_ACAnd I_DCAnd the maximum current I of the stack_SM ^maxAnd (4) determining.

The formula [ function 26] can be rewritten as follows:

[ function 32]

Therefore, the following relationship exists between θ r and θ i:

[ function 33]

In practice, since θ r is limited to between 0 and π/3And theta_iLimited between pi and 3 pi/2, there is no moment of current sign inversion, in other words, the transition from region J to region R corresponds to the transition from the overlapping sub-phase 2a to the lower conduction phase. The transition to the down-conducting phase always occurs before the sign of the current is reversed.

Graphically, the duration of the stack charge and discharge phases can be estimated:

charging phase, divided into two phases (two J-regions):

[ function 34]

θ_charge＝2θ_i+θ_r-2π

-discharge phase (region R):

[ function 35]

θ_discharge＝3π-2θ_i

At the beginning of the overlap phase, the capacitor of the upper half-arm is discharged and the capacitor of the lower half-arm is charged to approximately V_DC. All inserted into submodules of the upper half arm so that N_uEqual to N, and the number of submodules inserted in the lower arm half is N_l. At this stage, the number of submodules per half-arm is constantly changed to apply more or less sinusoidal currents.

The two capacitors share the voltage DeltaU of the HVDC tapping station_HVDCBut with some fluctuation. Detailed observations of the waveforms show that at each increment the capacitor will gradually absorb a current change, depending on the gradual insertion of the sub-modules.

The overlap phase 2a starts when the upper pilot switch DS becomes non-conductive and ends when the lower pilot switch DS is conductive. During this overlap period the relevant phase behaves like an MMCSC converter arm, with the two steering switches DS being non-conductive.

The down-conducting phase 3 starts when the down-directing switch DS is turned on and ends when it returns to a non-conducting state.

During

phases

2a, 3 and 2b, the voltage of the capacitor may be equal to a composite voltage ± pi/6 or ± 5 pi/6 out of phase with respect to the charging voltage of amplitude (√ 3) VAC.

More precisely, for a period of time from π - θ r/2 to 3 π/2, the voltage of the upper half-arm of the converter phase a is represented as follows:

[ function 36]

In

phases

2a, 3 and 2b, the up-director switch DS is non-conductive. Thus, the stack current is equal to the total half-arm current:

[ function 37]

After simplification, the instantaneous power received by the stack in the period [ π - θ r/2,3 π/2] is written:

[ function 38]

During this time, the energy received by the stack is given by:

[ function 39]

The symmetry of the current and voltage waveforms with respect to the axis 3 π/2 makes it possible to study simply the expression of the energy accumulated during the period π - θ r/2,3 π/2. After simplification, we get:

[ function 40]

Since the study was conducted in extended overlap mode, θ r is π/3. The literal representation of energy can be reduced to:

[ function 41]

Target specification for stack internal energy stabilization:

[ function 42]

Followed by I_DCAnd I_ACThe relationship describes the optimal position of the AACSC converter in extended overlap operation. The optimal positions are:

[ function 43]

Or modulation index m_iComprises the following steps:

[ function 44]

By studying a typical use case for tap applications, a comparison of MMCSC and AACSC converter architectures enabled to demonstrate the gain achieved by the described AACSC converter architecture. The study focused on the characteristics of the semiconductor design and its associated losses for each topology. Thermoelectric studies were performed on each converter using the PLECS circuit simulation tool. The specifications of the HVDC tap station are summarized in table 2 below, reference being provided in the rest of the description.

[ Table 2]

The amount of power applied to each half-arm is symmetric between the upper and lower half-arms and out-of-phase between identically positioned half-arms of different phases, so the element design of the mmscc converter can only be determined by studying the upper half-arm of the a-phase.

The effective AC current output from an HVDC tap site is represented by the following type of relationship:

[ function 45]

The maximum current flowing through the sub-module and the half-arm inductor is represented by the following type of relationship:

[ function 46]

The number of submodules is determined by the size of the available semiconductors and the desired quality of the output alternating current. For example, N equals the number of 20 submodules per half-arm, so that the AC filter can be omitted, while reducing the number of submodules, regardless of the operating point of the converter.

The maximum current of the submodule is represented by the following type of relation:

[ function 47]

Modulation index m_i＝3I_a/2I_dcIs equal to 0.25<1, it turns out reasonable to choose to use only half-bridge sub-modules.

The total power received by the half-arm inductor is represented by a relationship of the type:

[ function 48]

P_ua(t)＝i_Lau(t)×v_au(t)

From the relation [ function 9a ]]And [ function 10a ]]Get v_au(t) and i_Lau(t) and neglecting the high frequency ripple HF related to the circulating current and internal unbalance of the converter, the following relation is obtained:

[ function 49]

The power received by the half-arm is then decomposed into a constant term and an oscillating term. The internal energy regulation of the MMC converter keeps the DC term of the power received by each half-arm at zero.

[ function 50]

The oscillating power term comprising two phase differences at the network frequency

And one is at 2 ω₀The item (1).

[ function 51]

By integrating the equation [ function 51], the oscillation energy of the half-arm can be derived:

[ function 52]

In a purely resistive load

In the case of (2), the maximum energy variation derived from fig. 18, which represents the power variation in the top curve, and in the bottom curve the energy variation θ of the half-arm representing different load angles_charge：

[ function 53]

ΔE^max＝85844.5J

The average current of each submodule is fixed (I) in consideration of the maximum half-arm current and the maximum ripple current_Lau ^max) N ═ 50A and Δ I ═ 0.1. Thus, according to the relation [ function 16]]The sub-module inductance is: l is_SM＝8.59H.

The average energy stored in each branch of the MMCSC is then E_arm214.6kJ, energy/power ratio 85.9kJ/MVA.

The maximum voltage of the half-arm is represented by a relation of the type:

[ function 54]

When an HVDC tap station draws the same percentage of power from an HVDC link until it is charged to a medium power, the voltage of the HVDC tap station is:

[ function 55]

Thus, the maximum voltage of the half-arm is V_au ^max＝33.28kV.

According to one embodiment, the half-arm capacitor is designed based only on stability criteria in the control of the HVDC tap station in normal mode. A minimum value can be determined by simulation studies to ensure stable operation at 15 muf.

The design makes it possible to determine the electrical constraints imposed on each submodule switch. Since there is no IGBT or IGCT silicon module that can withstand voltages of about 33.28kV, it is necessary to connect a plurality of switches in series. Another option is to establish the concatenation relationship at sub-module level and to display it as a variant below (this option is shown as a seventh variant in the description below).

In the load down mode (also referred to as the "derating factor"), at a voltage of 50%, a series combination of 29 pairs of components of the insulated gate field effect transistor type (referred to as "MOSFETs") rated at 1700V and 72A and the diode type rated at 600V and 75A is provided, while keeping the silicon ratio at a minimum.

A current derating factor of 31% to 33% is provided which is higher than the current derating factor normally used (typically 20%).

Tables 3 and 4 below summarize the main characteristics of the selected components, with data for a temperature of 25 ℃.

[ Table 3]

[ Table 4]

Reverse voltage	600V
		Rated DC current	75A
Maximum repeat current (period 1ms)	225A
		DC voltage (typical value)	1.65V

The total number of MOSFETs/diodes required is:

[ function 56]

N_MOSFET＝N_Diode＝6×29×2×20＝6960

Thus, the silicon ratio is as follows:

[ function 57]

The silicon efficiency of the converter is evaluated in an approximate manner using the technical characteristics of the transistors and the selected diodes. Thermoelectric models of the losses of the half-bridge sub-module (shown in fig. 19) and the full-bridge sub-module (shown in fig. 22) were developed using the PLECS tool to simulate a circuit to evaluate the conduction and switching losses of the components.

The average switching frequency of the 20 half-bridge sub-modules is 150 Hz. Half arm losses were as follows: p_cond＝150.28kW，P_sw329.15W. These values are relatively low due to the average switching power.

Therefore, the silicon efficiency was estimated to be 94%.

Fig. 20 shows the shape of the series input and output waveforms of the MMCSC at the operating point (P ═ 1, Q ═ 0). Voltage drop Δ U due to power consumption_HVDCSmall high frequency oscillations are shown due to the switching of the sub-modules. These oscillations are less than 10% of the nominal value. The harmonic distortion rate THD of the generated AC voltage is close to 0 without adding an auxiliary AC filter.

The currents and the number of sub-modules in the AACSC converter are defined in the following description according to similar specifications as the MMCSC converter listed in table 1. Since the electrical quantities are symmetrical, the study will also be limited to the upper half of phase a.

The effective AC current to be output from the HVDC tap site is expressed as:

[ function 58]

Operation of the AACSC converter requires the ability to vary the amplitude of the output current to maintain operation at an optimal position. Since the grid is designed to operate at a fixed voltage and variable current, this type of operation requires an additional voltage regulator, such as a load balancing transformer, to approach operation and maintain the draw of rated power at the optimum location, regardless of the load level of the main link. Using such a device, for a link load level (I) of 100%_DC1500A) the maximum current flowing through the AACSC converter will be reached.

Thus, we obtain from equation [ function 51 ]:

[ function 59]

I_AC＝1.1026I_DC＝1654A

The maximum current flowing through the sub-module and half-arm inductors is written as:

[ function 60]

According to [ function 31], in the extended overlap operation, the sub-module stack must provide the following maximum currents:

[ function 61]

The maximum current flowing through the pilot switch can therefore be derived from fig. 17:

[ function 62]

For the design of mmcscc it is proposed to use N-20 sub-modules per half-arm, thus eliminating the need to use AC filters at the converter output and allowing to compare both topologies on the same basis.

In view of the maximum half-arm current, the average current of each submodule is fixed to:

[ function 63]

The type of submodule is defined by a modulation index m_iAnd (4) determining. As shown by the equation [ function 44]]It is shown that here a full bridge must be used, where the modulation index m_iGreater than 1.

The optimal ratio of full-bridge sub-modules to total number of sub-modules can be defined by the extreme values of the stack currents:

[ function 64]

Using equations [ function 25a ] and [ function 25b ], we obtain, by simplification:

[ function 65]

The theoretical ratio full bridge/half bridge is therefore γ_FB/HB0.25, i.e. 4 full bridges and 16 half bridges per half arm.

In the following description, the design of the submodule inductors in an AACSC converter is defined by estimating the maximum energy change within one cycle. For the extended overlap operation, an expression of the energy variation of the operation point (P ═ 1, Q ═ 0) is provided.

During the first energy exchange between the stack and the network, the power received by the upper stack of phase "a" is formulated [ function 66]]And (4) showing. Positive energy difference Δ E_Stack ⁺Is the integral of this power between the non-conduction of pilot switch DS and the sign inversion of the half-arm current:

[ function 66]

The textual expression gives the formula [ function 67 ]:

[ function 67]

By using the extended overlap mode (or pi/3) at the optimal position (or 5.634rad), we get: delta E_Stack ⁺＝6329.5J。

Since the steady-state behavior of the AACSC converter is symmetrical, the total energy change is twice the positive difference, Δ E_Stack＝2ΔE_Stack ⁺。

The theoretical energy difference for each submodule is given by:

[ function 68]

In practice, the stepwise insertion of the sub-modules will create differences in the energy variation between the sub-modules, as shown in fig. 21, representing the periodic variation of the sub-module current at the top of the diagram and the periodic variation of the total energy of the stack at the bottom of the diagram. The difference in energy variation between sub-modules is larger when the number of sub-modules and/or the switching frequency is low. The values calculated here only allow the calculation of the average difference for each sub-module.

Thus, in the formula [ function 16]]In the case of the MMCSC converter, the average current I is shown to be guaranteed_moyThe amplitude Δ I of 45.675a is 10% of the theoretical inductance necessary for oscillation:

[ function 69]

The average energy stored in each arm of the AACSC converter is then E_armThe energy/power ratio was 12.6kJ/MVA at 31.5 kJ. The efficiency of the AACSC converter is much lower than the series MMCSC converter and even lower than the energy/power ratio typically encountered by the master MMVSC parallel converter.

The nominal voltage on the terminals of the AACSC converter is defined in the following description.

Each half-arm is subjected to the entire DC voltage of the HVDC tapping station during the conduction of the director switch DS of the complementary half-arm. In the extended overlap operation at the optimum position, the formula [ function 36] shows that the maximum DC ripple voltage is about (√ 3) VAC.

Thus, by mixing I_ACSubstitution is by the formula [ function 43]]To calculate the output voltage V_AC。

[ function 70]

Therefore, the sub-modules and capacitors must be designed to withstand this voltage (√ 3) V_AC ^max≈10471V。

The rating of the half-arm capacitor of the AACSC converter is defined in the following description.

The half-arm capacitor of the AACSC converter provides a non-inductive path for residual current (the difference between the current applied by the HVDC link and the current applied by the inductive sub-module). The half-arm capacitors of the AACSC converter also allow balancing the natural voltage between the two half-arms of each phase. The half-arm capacitor of the AACSC converter filters the phase current by absorbing high frequency components of the half-arm current. The half-arm voltage then becomes a state variable, providing a degree of control in which the dynamics are affected by the capacitance value of the half-arm capacitor of the AACSC converter.

The minimum capacitance value ensures stable control of the AACSC converter and requires a sufficiently filtered output current. In order to operate under discontinuous load, the energy stored in the capacitor must be negligible compared to the energy stored in the submodule:

[ function 71]

E_C<<E_sM

We use the classical values: EC ═ ESM/10 ═ 157.5J

The energy stored in the capacitor will be at a maximum when the arm voltage itself is at a maximum. As shown above, in the extended overlap operation, the maximum arm voltage is (√ 3) V_AC ^maxThus:

[ function 72]

For voltage V_AC ^max6046V, the maximum capacitance of the capacitor is: c ═ 2.87 μ F.

A method for selecting the semiconductors of the AACSC converter is described below.

A series relationship of 10 pairs of components of the insulated gate field effect transistor type (referred to as MOSFET) and the diode type is provided, taking into account a voltage de-rating factor of 50%, the main characteristics of which are shown in table 1 and table 2 above.

For the pilot switches they must also withstand a voltage of 10.47kV and a maximum current of 413.5A according to the formula [ function 62 ].

The total number of MOSFETs/diodes required for the sub-module is:

[ function 73]

N_MOSFET＝N_Diode1＝6×10×(2×16+4×4)＝2880

The total number of IGBTs/diodes required to steer the switch (IGBTs representing insulated gate bipolar transistors) is:

[ function 74]

N_IGBT＝N_Diode2＝6×2×2＝24

Thus, the silicon ratio is as follows:

[ function 75]

The evaluation of silicon loss follows the same principles as the MMCSC converter. A thermoelectric model configured with the above-described component characteristics is implemented in one of the full-bridge sub-modules of the AACSC converter, as shown in fig. 22, which represents a loss model of the full-bridge sub-module in a PLECS-type simulation tool.

Fig. 23 shows the losses caused by the switching "Comm" and the conduction "Cond" of the full-bridge sub-modules. FIG. 24 shows the waveform (V) of the semiconductor of the director switch of the first arm_IGBT，I_IGBT，V_Diode，I_Diode) And losses. Some components are never affected by switching losses because of the direction of current flow. However, they are a field of conduction losses, particularly components of the director switch switching at zero voltage ZVS, when they are periodically crossed by the arm or sub-module current.

With 20 full-bridge submodules of 80 semiconductors switching at 1450Hz on average, the following half-arm losses can be obtained: p_cond＝94.91kW，P_sw＝44.94kW。

Therefore, the silicon efficiency is estimated to be 94%, which is a relatively low value because in this calculation, all sub-modules use the full-bridge.

Assuming that the loss of the half-bridge sub-modules is only less than 25% of the full-bridge sub-modules, the efficiency will be improved by at least 2%, so the estimated silicon efficiency is 96%, 2 points higher than the equivalent MMCSC converter solution.

The steady state design and ratings have been verified by a detailed model of AACSC HVDC tap stations and developed using a PLECS type circuit simulation tool. Fig. 25 shows the shape of the input and output waveforms of the series-connected AACSC converter at the operating point (P ═ 1, Q ═ 0).

Table 5 below summarizes the main advantages of the AACSC converter compared to the MMCSC converter.

[ Table 5]

The proposed converter structure can be subdivided into the following variants.

In a first variant, it is theoretically possible to create a single-phase, two-phase or n-phase AACSC converter by adapting the associated control accordingly.

In a second variation, the galvanic isolation provided by the transformer may be replaced by a generator/alternator system. Fig. 26 shows the connection of a drive shaft/generator system with different tap changer topologies to an AC network.

In a third variant, the galvanic isolation provided by the transformer may be replaced by a fixed battery system which is switched to switch between the voltage of the station and the voltage of the local AC network. The presence of the battery, in addition to providing "indirect" isolation, may also reduce the operating limitations of the HVDC tap station associated with the HVDC link and increase its availability to the local power supply network. The concept of switching cells has been introduced in the literature and can be considered independent of the converter topology used for the taps. Fig. 27 shows the connection of switched batteries with different tap changer topologies.

In a fourth variant, a superconducting inductive storage system, denoted by the abbreviation SMES as "superconducting magnetic energy storage", may be added to all or some of the sub-modules in order to exploit the inductive energy stored in the current control and AACSC converter. In the same way as in the third variant, the addition of storage means improves the performance of the tap stations in relation to the HVDC link and the local supply network.

In a fifth variant, instead of an on-load tap changer transformer, an AC/AC converter isolated by a high frequency transformer may be used to regulate the output voltage and increase the control flexibility of the AACSC converter. The optimal position can be maintained regardless of the operating point of the HVDC link and the local load.

In a sixth variant, in the case of a bipolar HVDC link, two AACSC converters may be connected in series to each pole of the link and to the two secondary sides of a common transformer. One example is a transformer similar to that used for LCC-HVDC links: the primary side and the secondary side are connected in a star shape, and the secondary side is connected in a star triangle shape. This configuration will ensure an equivalent voltage drop at each pole to facilitate operation of the main link.

In a seventh variation, each half-arm of the AACSC converter may consist of a stack of serially associated stacks. The half-arm voltage is then shared between each stack, reducing the constraints on the basic sub-modules. Fig. 28 shows a block diagram of a stage according to this seventh variant, with a serial relationship of the sub-module stacks.

In an eighth variant, it is possible to consider the use of the AACSC converter structure in environments other than high voltage direct current HVDC transmission, in particular for applications requiring high current densities, such as embedded applications in the aerospace and avionics fields and in the naval or railway sector, for test stations, short circuit current generators for lasers, and specific industrial applications (e.g. electroplating). The semiconductors used may be tailored to specific applications, for example, IGBT transistors for kilovoltage applications, MOSFET transistors for low voltage applications, SiC or GaN wide bandgap semiconductors for higher performance and resistance to solar radiation.

In a ninth variation, inductive coupling may be established between the sub-module inductors of some or all of the sub-modules. This coupling will allow, among other things, to reduce the current oscillation of each submodule, as with converter control by interleaving, and provide an additional degree of freedom in balancing the internal energy of the AACSC converter. The use of inductive sub-modules provides unprecedented leverage compared to capacitive sub-module topologies where coupling is not possible. This will enable relaxation of the energy control constraints on the AACSC converter and reduce the amplitude of the internal voltage and current variations.

The implementation of the AACSC converter topology results from the above-described operations. Some operating points have been covered, especially when operating modes involving non-unity power factor are involved.

In the case of tapping stations, the method of constructing such topologies with well established industrial techniques, i.e. the association of semiconductors in the valves, closed circuit monitoring, installation of passive components, isolation platforms, and other products requiring adaptation or development, such as the development of specific inductive sub-modules or pilot switches for high currents.

The main application for which the AACSC converter topology is aimed is the series tapping of HVDC links. This type of application may not only be of interest to manufacturers of HVDC links, but may also be of interest to local network operators whose operating areas are spanned by these links, or to medium-sized power producers, such as offshore wind farm operators or isolated photovoltaic plants that need to enter the grid to export the energy produced by their facilities.

Without including HVDC links, manufacturers may be interested in AACSC converters for designing high current density materials, such as embedded hardware, medical equipment, military equipment, inductive storage, industry specific, test benches. The modular structure of the AACSC converter and its interchangeability of power semiconductors makes it possible to cover a wide range of power and performance according to specifications. The control originally proposed for tandem tapping stations can be fully adapted to different power curves, for example in embedded applications, where the power demand varies greatly and the performance varies in the AC network, power supply or load.

Claims

1. An alternating arm current source converter adapted to control power conversion between a high voltage direct current transmission link and an alternating current network, the converter comprising:

the converter further comprises at least one arm comprising:

-at least a first and a second half-arm connected to each other at a midpoint, each half-arm comprising a pilot switch and a sub-module unit, the pilot switch and the sub-module unit of each half-arm being connected in parallel between one of an AC connection point and a DC connection point,

-a submodule unit of each half-arm comprising a plurality of submodules connected in parallel to each other, each of said submodules comprising an inductor and a microswitch,

the pilot switch of at least one half-arm is adapted to be controlled in dependence of the current flowing through the sub-module unit of said at least one half-arm.

2. A converter according to claim 1, characterized in that the pilot switch of at least one half-arm is adapted to be closed when the current through the sub-module unit reaches a target value.

3. A converter according to claim 1, characterized in that the open or closed state of the pilot switch of one of the half-arms is adapted to be controlled in dependence of the open or closed state of the pilot switch of the other half-arm.

4. A converter according to claim 1, characterized in that at least one of the sub-modules has a half-bridge architecture comprising two micro-switches selectively switched to cause two current levels to flow through the sub-module, in one architecture one of the two current levels is zero current and the other of the two current levels is equal to the current flowing through the inductor of the sub-module.

5. The converter according to claim 1, wherein at least one of the plurality of sub-modules has a full-bridge architecture comprising four microswitches selectively switched to flow three current levels through the sub-module, in one architecture one of the three current levels corresponding to:

zero current, or

-a current flowing through an inductor of the sub-module,

or opposite to the current flowing through the inductor of the submodule.

6. A converter according to claim 1, wherein the AC connection point of the arm is at a midpoint.

7. A converter according to claim 1, wherein each half-arm comprises a capacitor connected in parallel with the sub-module unit and a director switch.

8. A converter according to claim 1, characterized in that said director switch comprises a valve of a transistor, preferably of the IGBT type.

9. The converter according to claim 1, wherein the sub-module micro-switches are voltage reversible and current unidirectional.

10. A converter according to claim 9, characterized in that said micro-switches comprise diodes and transistors connected in series, preferably of the IGBT type.

11. A converter according to claim 1 comprising three arms, the AC network being a three-phase network, each of the three arms comprising an AC connection point connecting the converter to a phase of the three-phase network.

12. High voltage direct current electric power conversion system comprising a high voltage direct current mesh transmission network extending between at least three power conversion stations, the electric power conversion system according to any of the preceding claims comprising an alternating arm current source converter connected in series to the mesh transmission network and to an alternating current network, the converter being adapted to control the conversion of electric power between the high voltage direct current mesh transmission network and the alternating current network.

13. Method for converting power between a high voltage direct current transmission link and an alternating current network, the method utilizing a power conversion system comprising an alternating limb current source converter connected in series to the transmission link at a first and a second DC connection point and connected to the alternating current network at an AC connection point, the converter comprising a first and a second half-limb connected at the AC connection point,

the method comprises the following steps:

14. The method of claim 13, wherein the micro-switches are controlled by zero voltage switches.

15. The method according to claim 13, wherein the overlap phase comprises a first and a second overlap sub-phase, the sign of the energy transfer between the sub-module units during the first overlap sub-phase being opposite to the sign during the second overlap sub-phase.