CN111276084A - Shift register unit, driving method, shift register and display device - Google Patents
Shift register unit, driving method, shift register and display device Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
- G09G3/344—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on particles moving in a fluid or in a gas, e.g. electrophoretic devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a shift register unit, a driving method, a shift register and a display device, wherein the shift register unit comprises: a first output control module for providing a first output control signal to a first output node; a second output control module for providing a second output control signal to a second output node; when the first output control signal is an effective control signal, the second output control signal is an ineffective control signal, and the first output module is used for controlling the light-emitting control signal output end to be communicated with the first level signal input end; when the first output control signal is an invalid control signal, the second output control signal is an effective control signal, and the second output module is used for controlling the light-emitting control signal output end to be communicated with the second level signal input end. The invention can effectively avoid the condition that the first output control signal and the second output control signal are both invalid control signals, so that the light-emitting control signal is more stably output.
Description
Technical Field
The invention relates to the technical field of display, in particular to a shift register unit, a driving method, a shift register and a display device.
Background
The conventional display device includes a shift register for generating a multi-stage light emission control signal, which includes a plurality of stages of cascaded shift register cells. A conventional shift register unit for generating a light emission control signal may include a first output transistor and a second output transistor, a gate of the first output transistor is connected to the first output control terminal, a gate of the second output transistor is connected to the second output control terminal, and both the first output transistor and the second output transistor are connected to the light emission control signal output terminal. When an existing shift register unit for generating a light emitting control signal works, a first output control signal output by a first output control terminal and a second output control signal output by a second output control terminal are both invalid control signals, so that a first output transistor and a second output transistor are both turned off, and the light emitting control signal is output unstably.
Disclosure of Invention
In view of the above-mentioned drawbacks and deficiencies in the prior art, it is desirable to provide a shift register unit, a driving method, a shift register, and a display device.
In a first aspect, the present invention provides a shift register unit, comprising:
the light-emitting control device comprises a first output control module, a second output control module, a first output module, a second output module and a light-emitting control signal output end;
the first output control module is used for providing a first output control signal to a first output node;
the second output control module is used for providing a second output control signal to a second output node;
the first output module is used for controlling the light-emitting control signal output end to be communicated with a first level signal input end when the first output control signal is an effective control signal;
when the first output control signal is an invalid control signal, the second output control signal is an effective control signal, and the second output module is used for controlling the light-emitting control signal output end to be communicated with the second level signal input end when the second output control signal is an effective control signal.
Further, the second output control module includes:
the first control module is used for controlling the potential of the second output node according to the first control signal input end under the control of the first clock signal input end;
and the second control module is used for controlling the potential of the second output node according to the first level signal input end under the control of the input node.
Further, the first control module comprises a first transistor, a second transistor and a first storage capacitor, and the second control module comprises a second transistor;
a control electrode of the first transistor is connected with the first clock signal input end, a first electrode of the first transistor is connected with the first control signal input end, and a second electrode of the first transistor is connected with a first electrode of the second transistor;
a control electrode of the second transistor is connected with a second end of the first storage capacitor, and a second electrode of the second transistor is connected with the second output node;
a control electrode of the third transistor is connected with the input node, a first electrode of the third transistor is connected with the second output node, and a second electrode of the third transistor is connected with a first level signal input end;
the first end of the first storage capacitor is connected with the first clock signal input end.
Further, the shift register unit further includes an input node control module, configured to control a potential of the input node according to a second control signal input end and the first level signal input end under control of the first clock signal input end and the second clock signal input end.
Further, the input node control module includes a fourth transistor, a fifth transistor, and a sixth transistor;
a control electrode of the fourth transistor is connected with the first clock signal input end, a first electrode of the fourth transistor is connected with the second control signal input end, and a second electrode of the fourth transistor is connected with the input node;
a control electrode of the fifth transistor is connected with the second clock signal input end, a first electrode of the fifth transistor is connected with the input node, and a second electrode of the fifth transistor is connected with a first electrode of the sixth transistor;
and a control electrode of the sixth transistor is connected with the second output node, and a second electrode of the sixth transistor is connected with the first level signal input end.
Further, the first output control module includes:
the third control module is used for controlling the potential of the first output node according to the first level signal input end under the control of the second output node;
and the fourth control module is used for controlling the potential of the first output node according to the second level signal input end under the control of the input node.
Further, the third control module comprises a seventh transistor, and the fourth control module comprises an eighth transistor and a second storage capacitor;
a control electrode of the seventh transistor is connected with the second output node, a first electrode of the seventh transistor is connected with the first output node, and a second electrode of the seventh transistor is connected with the first level signal input end;
a control electrode of the eighth transistor is connected with the input node, a first electrode of the eighth transistor is connected with a second level signal input end, and a second electrode of the eighth transistor is connected with the first output node;
the first end of the second storage capacitor is connected with the input node, and the second end of the second storage capacitor is connected with the first output node.
Further, the first output module comprises a first output transistor, and the second output module comprises a tenth transistor and a third storage capacitor;
a control electrode of the first output transistor is connected with the first output node, a first electrode of the first output transistor is connected with the light-emitting control signal output end, and a second electrode of the first output transistor is connected with the first level signal input end;
a control electrode of the tenth transistor is connected with the second level signal input end, a first electrode of the tenth transistor is connected with the second level signal input end, and a second electrode of the tenth transistor is connected with the light-emitting control signal output end;
and the first end of the third storage capacitor is connected with the second output node, and the second end of the third storage capacitor is connected with the light-emitting control signal output end.
Further, the shift register unit further includes a selection signal output terminal connected to the first output node.
In a second aspect, the present invention provides a driving method of a shift register, which is applied to the shift register unit, and the driving method of the shift register unit includes:
the first output control module provides a first output control signal to a first output node;
the second output control module provides a second output control signal to a second output node;
when the first output control module controls the first output control signal to be an effective control signal, the second output control module controls the second output control signal to be an ineffective control signal;
and when the first output control module controls the first output control signal to be an invalid control signal, the second output control module controls the second output control signal to be an effective control signal.
In a third aspect, the present invention provides a shift register comprising a plurality of cascaded shift register units as described above;
except the last stage of shift register unit, the light-emitting control signal output end of each stage of shift register unit is connected to the first control signal input end of the next stage of shift register unit;
except the last stage of shift register unit, the selection signal output end of each stage of shift register unit is connected to the second control signal input end of the next stage of shift register unit.
In a fourth aspect, the present invention also provides a display device, including the shift register as described above.
Compared with the prior art, the shift register unit, the driving method, the shift register and the display device provided by the invention can control the second output control signal to be the effective control signal when the first output control signal is the ineffective control signal, and can control the first output control signal to be the effective control signal when the second output control signal is the ineffective control signal, so that the condition that the first output control signal and the second output control signal are both ineffective control signals is avoided, and the light-emitting control signal is more stably output.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments made with reference to the following drawings:
fig. 1 is a schematic structural diagram of a shift register according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another shift register structure according to an embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a shift register unit according to an embodiment of the present invention;
FIG. 4 is a timing diagram illustrating the operation of the shift register unit shown in FIG. 3;
fig. 5 is a schematic structural diagram of a shift register according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict. The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. In the embodiment of the present invention, in order to distinguish two poles of the transistor except the control pole, one pole is called a first pole, and the other pole is called a second pole. In actual operation, the control electrode is a gate, the first electrode may be a drain, and the second electrode may be a source; alternatively, the control electrode may be a gate electrode, the first electrode may be a source electrode, and the second electrode may be a drain electrode. The transistors adopted by the embodiment of the invention comprise a P-type transistor and an N-type transistor, wherein the P-type transistor is switched on when the grid electrode is at a low level and is switched off when the grid electrode is at a high level; the N-type transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.
As shown in fig. 1, an embodiment of the present invention provides a shift register unit, including: the light-emitting control circuit comprises a first output control module 11, a second output control module 12, a first output module 13, a second output module 14 and a light-emitting control signal output end OUT;
the first output control module 11 is configured to provide a first output control signal to a first output node N3;
the second output control module 12 is configured to provide a second output control signal to a second output node N2;
when the first output control signal is an active control signal, the second output control signal is an inactive control signal, and the first output module 13 is configured to control the light-emitting control signal output end OUT to be communicated with the first level signal input end VG1 when the first output control signal is an active control signal;
the second output module 14 is configured to control the light-emitting control signal output end OUT to communicate with the second level signal input end VG2 when the first output control signal is an inactive control signal and the second output control signal is an active control signal.
The OUT signal is used not only as a light-emitting scanning signal to provide a light-emitting control signal for the pixel units in the corresponding row, but also as an input signal for the next stage of shift register unit.
The shift register unit provided by the embodiment of the invention can control the second output control signal to be the effective control signal when the first output control signal is the ineffective control signal; when the second output control signal is an invalid control signal, the first output control signal is controlled to be an effective control signal, so that the condition that the first output control signal and the second output control signal are both invalid control signals is avoided, and the light-emitting control signal is more stably output.
Wherein, the valid control signal refers to a control signal capable of controlling the transistor in the corresponding output module to be turned on, and the invalid control signal refers to a control signal capable of controlling the output transistor in the corresponding output module to be turned off. For example, when the output transistor is a P-type transistor, the active control signal is a low level signal and the inactive control signal is a high level signal; when the output transistor is an N-type transistor, the active control signal is a high level signal, and the inactive control signal is a low level signal. That is, the first output module 13 may be configured to control the light-emitting control signal output terminal OUT to output the first level signal under the control of the first output node N3; the second output block 14 may be configured to control the light-emitting control signal output terminal OUT to output the second level signal under the control of the second output node N2.
As shown in fig. 2, on the basis of the embodiment of the shift register unit illustrated in fig. 1, the second output control block 12 includes:
a first control module 121 for controlling the potential of the second output node N2 according to the first control signal input terminal IN1 under the control of the first clock signal input terminal CK 1;
the second control module 122 is configured to control the potential of the second output node N2 according to the first level signal input terminal VG1 under the control of the input node N1.
This embodiment controls the potential of the second output node N2 by the first control module 121 and the second control module 122 cooperating.
As an alternative embodiment, referring to fig. 2, the shift register unit further includes an input node control module 15 for controlling the potential of the input node N1 according to the second control signal input terminal IN2 and the first level signal input terminal VG1 under the control of the first clock signal input terminal CK1 and the second clock signal input terminal CK 2.
This embodiment controls the potential of the input node by the input node control module.
As an alternative embodiment, referring to fig. 2, the first output control module 11 includes:
a third control module 111 for controlling a potential of the first output node N3 according to the first level signal input terminal VG1 under the control of the second output node N2;
the fourth control module 112 is used for controlling the potential of the first output node N3 according to the second level signal input terminal VG2 under the control of the input node N1.
This embodiment controls the potential of the first output node N3 through the third control module 111 and the fourth control module 112.
As an alternative embodiment, the shift register unit further comprises a selection signal output terminal NEXT, which is connected to the first output node N3. The selection signal output terminal NEXT can be used as another input signal of the NEXT stage shift register unit.
On the basis of the embodiments of the shift register unit illustrated in fig. 1 and 2, and with reference to fig. 3, the shift register unit according to the present invention is described below by using a specific embodiment, in which the first level signal terminal VG1 is the high level signal input terminal VGH, and the second level signal terminal VG2 is the low level signal input terminal VGL.
The shift register unit of the invention includes a first control signal input terminal IN1, a second control signal input terminal IN2, a first clock signal input terminal CK1, a second clock signal input terminal CK2, a high level signal terminal VGH, a low level signal terminal VGL, a first output module, a second output module, a first output control module, a second output control module, an input node control module, a light emitting control signal output terminal OUT, and a selection signal output terminal NEXT, wherein the first output control module 12 includes a first control module 121 and a second control module 122, the first control module 121 includes a first transistor T1, a second transistor T2, and a first storage capacitor C1, and the second control module 122 includes a third transistor T3;
the input node control module 15 includes a fourth transistor T4, a fifth transistor T5, and a sixth transistor T6;
the first output control block 11 includes a third control block 111 and a fourth control block 112, the third control block 111 includes a seventh transistor T7, and the fourth control block 112 includes an eighth transistor T8 and a second storage capacitor;
the first output block 13 includes a first output transistor T9, and the second output block 14 includes a second output transistor T10 and a third storage capacitor C3.
Specifically, the control electrode of the first transistor T1 is connected to the first clock signal input terminal CK1, the first electrode is connected to the first control signal input terminal IN1, and the second electrode is connected to the first electrode of the second transistor T2;
a control electrode of the second transistor T2 is connected to the second terminal of the first storage capacitor C1, and a second electrode is connected to the second output node N2;
a control electrode of the third transistor T3 is connected to the input node N1, a first electrode is connected to the second output node N2, and a second electrode is connected to the high level signal input terminal VGH;
a first end of the first storage capacitor C1 is connected to the first clock signal input terminal CK 1;
a control electrode of the fourth transistor T4 is connected to the first clock signal input terminal CK1, a first electrode is connected to the second control signal input terminal IN2, and a second electrode is connected to the input node N1;
a control electrode of the fifth transistor T5 is connected to the second clock signal input terminal CK2, a first electrode thereof is connected to the input node N1, and a second electrode thereof is connected to a first electrode of the sixth transistor T6;
a control electrode of the sixth transistor T6 is connected to the second output node N2, and a second electrode is connected to the high level signal input terminal VGH;
a control electrode of the seventh transistor T7 is connected to the second output node N2, a first electrode is connected to the first output node N3, and a second electrode is connected to the high level signal input terminal VGH;
a control electrode of the eighth transistor T8 is connected to the input node N1, a first electrode is connected to the low level signal input terminal VGL, and a second electrode is connected to the first output node N3;
a first terminal of the second storage capacitor is connected to the input node N1, and a second terminal is connected to the first output node N3;
a control electrode of the first output transistor T9 is connected to the first output node N3, a first electrode is connected to the emission control signal output terminal OUT, and a second electrode is connected to the high level signal input terminal VGH;
a control electrode of the second output transistor T10 is connected to the low level signal input terminal VGL, a first electrode is connected to the low level signal input terminal VGL, and a second electrode is connected to the emission control signal output terminal OUT;
a first terminal of the third storage capacitor C3 is connected to the second output node N2, and a second terminal thereof is connected to the emission control signal output terminal OUT;
the first output node N3 is connected to the selection signal output terminal NEXT.
In the embodiment of the shift register unit shown in fig. 3, all the transistors are P-type transistors, but not limited thereto.
The operation of the shift register cell of the example of fig. 3 of the present invention will be further described with reference to fig. 4.
IN a first period P1, when a high-level signal is input to CK2, a low-level signal is input to CK1, a high-level signal is input to IN1, and a low-level signal is input to IN2, T4 is turned on, T1 is turned on, T2 is turned off, T4 is turned on, so that the potential of N1 is a low-level signal, and T3 is turned on, so that the potential of N2 is a high-level signal; t5 is off, T6 is off, T7 is off, T8 is on, the potential of N3 is a low level signal, so that T9 is on, T10 is off, OUT outputs a high level signal, and NEXT outputs a low level signal;
IN the second period P2, CK2 inputs a low level, CK1 inputs a high level, IN1 inputs a high level, then T4 is turned off, T1 is turned off, T2 is turned off, the potential of N1 maintains a low level signal, T3 is turned on, the potential of N2 maintains a high level signal, T7 is turned off, T8 is turned on, the potential of N3 maintains a low level signal, so that T9 is turned on, T10 is turned off, OUT outputs a high level signal, and NEXT outputs a low level signal;
IN the third period P3, CK2 inputs a high level, CK1 inputs a low level, IN1 inputs a low level, IN2 inputs a high level, T4 is turned on, T1 is turned on, T4 is turned on so that the potential of N1 changes from a low level signal to a high level signal, T3 is turned off, T2 is turned on, the potential of N2 changes from a high level signal to a low level signal VLH, T6 is turned on, T5 is turned off, T7 is turned on, T8 is turned off, the potential of N3 changes from a low level signal to a high level signal, T9 is turned off, T10 is turned on, OUT outputs a low level signal, and NEXT outputs a high level signal.
When the potential of N3 is a low level signal, the potential of N2 is a high level signal; when the potential of the N3 is a high level signal, the potential of the N2 is a low level signal, so that the situation that the T9 and the T11 are both turned off is avoided, the output of an unstable light-emitting control signal is avoided, and the light-emitting brightness is uniform.
The embodiment of the present invention further provides a driving method of a shift register unit, which is applied to the shift register unit, and the driving method includes:
the first output control module provides a first output control signal to a first output node;
the second output control module provides a second output control signal to a second output node;
when the first output control module controls the first output control signal to be an effective control signal, the second output control module controls the second output control signal to be an ineffective control signal;
when the first output control module controls the first output control signal to be an invalid control signal, the second output control module controls the second output control signal to be an valid control signal.
In the driving method of the shift register unit according to the embodiment of the present invention, when the first output control signal is the invalid control signal, the second output control signal is controlled to be the valid control signal, and when the second output control signal is the invalid control signal, the first output control signal is controlled to be the valid control signal, so that a situation that both the first output control signal and the second output control signal are the invalid control signals is avoided, and the light emitting control signal is output more stably.
As shown in fig. 5, an embodiment of the present invention further provides a shift register, including a plurality of cascaded shift register units as above;
except the last stage of shift register unit, the light-emitting control signal output end OUT of each stage of shift register unit is connected to the first control signal input end IN1 of the next stage of shift register unit;
except for the last stage of shift register unit, the selection signal output end of each stage of shift register unit is connected to the second control signal input end IN2 of the next stage of shift register unit.
Reference numeral G (n) denotes an nth stage shift register unit of the shift register, reference numeral G (n-1) denotes an nth-1 stage shift register unit of the shift register, reference numeral G (n +1) denotes an n +1 th stage shift register unit of the shift register, and n is an integer greater than 1. The first control signal input IN1 of G (n) is coupled to the output OUT of G (n-1), and the second control signal input IN2 of G (n) is coupled to the output NEXT of G (n-1).
The shift register provided in this embodiment is used to generate multi-stage light-emitting control signals, and provide corresponding light-emitting control signals for a plurality of rows of pixel units on the display panel.
The invention also provides a display device which comprises the shift register.
The display device may be: electronic paper, an OLED (Organic Light-Emitting Diode) display device, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator and other products or components with a display function.
The foregoing description is only exemplary of the preferred embodiments of the invention and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention is not limited to the specific combination of the above-mentioned features, but also encompasses other embodiments in which any combination of the above-mentioned features or their equivalents is possible without departing from the inventive concept. For example, the above features and (but not limited to) features having similar functions disclosed in the present invention are mutually replaced to form the technical solution.
Claims (12)
1. A shift register cell, comprising:
the light-emitting control device comprises a first output control module, a second output control module, a first output module, a second output module and a light-emitting control signal output end;
the first output control module is used for providing a first output control signal to a first output node;
the second output control module is used for providing a second output control signal to a second output node;
the first output module is used for controlling the light-emitting control signal output end to be communicated with a first level signal input end when the first output control signal is an effective control signal;
when the first output control signal is an invalid control signal, the second output control signal is an effective control signal, and the second output module is used for controlling the light-emitting control signal output end to be communicated with the second level signal input end when the second output control signal is an effective control signal.
2. The shift register cell of claim 1, wherein the second output control module comprises:
the first control module is used for controlling the potential of the second output node according to the first control signal input end under the control of the first clock signal input end;
and the second control module is used for controlling the potential of the second output node according to the first level signal input end under the control of the input node.
3. The shift register cell of claim 2, wherein the first control block comprises a first transistor, a second transistor, and a first storage capacitor, and the second control block comprises a second transistor;
a control electrode of the first transistor is connected with the first clock signal input end, a first electrode of the first transistor is connected with the first control signal input end, and a second electrode of the first transistor is connected with a first electrode of the second transistor;
a control electrode of the second transistor is connected with a second end of the first storage capacitor, and a second electrode of the second transistor is connected with the second output node;
a control electrode of the third transistor is connected with the input node, a first electrode of the third transistor is connected with the second output node, and a second electrode of the third transistor is connected with a first level signal input end;
the first end of the first storage capacitor is connected with the first clock signal input end.
4. The shift register unit according to claim 2, further comprising an input node control module for controlling a potential of the input node according to a second control signal input terminal and the first level signal input terminal under control of the first clock signal input terminal and the second clock signal input terminal.
5. The shift register cell of claim 4, wherein the input node control module comprises a fourth transistor, a fifth transistor, and a sixth transistor;
a control electrode of the fourth transistor is connected with the first clock signal input end, a first electrode of the fourth transistor is connected with the second control signal input end, and a second electrode of the fourth transistor is connected with the input node;
a control electrode of the fifth transistor is connected with the second clock signal input end, a first electrode of the fifth transistor is connected with the input node, and a second electrode of the fifth transistor is connected with a first electrode of the sixth transistor;
and a control electrode of the sixth transistor is connected with the second output node, and a second electrode of the sixth transistor is connected with the first level signal input end.
6. The shift register cell of claim 2, wherein the first output control module comprises:
the third control module is used for controlling the potential of the first output node according to the first level signal input end under the control of the second output node;
and the fourth control module is used for controlling the potential of the first output node according to the second level signal input end under the control of the input node.
7. The shift register unit according to claim 6, wherein the third control module comprises a seventh transistor, and the fourth control module comprises an eighth transistor and a second storage capacitor;
a control electrode of the seventh transistor is connected with the second output node, a first electrode of the seventh transistor is connected with the first output node, and a second electrode of the seventh transistor is connected with the first level signal input end;
a control electrode of the eighth transistor is connected with the input node, a first electrode of the eighth transistor is connected with a second level signal input end, and a second electrode of the eighth transistor is connected with the first output node;
the first end of the second storage capacitor is connected with the input node, and the second end of the second storage capacitor is connected with the first output node.
8. The shift register cell of claim 7, wherein the first output module comprises a first output transistor, the second output module comprises a tenth transistor and a third storage capacitor;
a control electrode of the first output transistor is connected with the first output node, a first electrode of the first output transistor is connected with the light-emitting control signal output end, and a second electrode of the first output transistor is connected with the first level signal input end;
a control electrode of the tenth transistor is connected with the second level signal input end, a first electrode of the tenth transistor is connected with the second level signal input end, and a second electrode of the tenth transistor is connected with the light-emitting control signal output end;
and the first end of the third storage capacitor is connected with the second output node, and the second end of the third storage capacitor is connected with the light-emitting control signal output end.
9. The shift register cell of any one of claims 1-8, further comprising a select signal output connected to the first output node.
10. A driving method of a shift register, which is applied to the shift register unit according to any one of claims 1 to 9, the driving method of the shift register unit comprising:
the first output control module provides a first output control signal to a first output node;
the second output control module provides a second output control signal to a second output node;
when the first output control module controls the first output control signal to be an effective control signal, the second output control module controls the second output control signal to be an ineffective control signal;
and when the first output control module controls the first output control signal to be an invalid control signal, the second output control module controls the second output control signal to be an effective control signal.
11. A shift register comprising a plurality of cascaded shift register cells according to claim 9;
except the last stage of shift register unit, the light-emitting control signal output end of each stage of shift register unit is connected to the first control signal input end of the next stage of shift register unit;
except the last stage of shift register unit, the selection signal output end of each stage of shift register unit is connected to the second control signal input end of the next stage of shift register unit.
12. A display device comprising the shift register according to claim 11.
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