CN111244144B - Display substrate, display device and manufacturing method of display substrate - Google Patents

Display substrate, display device and manufacturing method of display substrate Download PDF

Info

Publication number
CN111244144B
CN111244144B CN202010067046.0A CN202010067046A CN111244144B CN 111244144 B CN111244144 B CN 111244144B CN 202010067046 A CN202010067046 A CN 202010067046A CN 111244144 B CN111244144 B CN 111244144B
Authority
CN
China
Prior art keywords
layer
metal layer
substrate
contact hole
material layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010067046.0A
Other languages
Chinese (zh)
Other versions
CN111244144A (en
Inventor
邓雷
魏悦
张震
潘康观
黎飞
邓伟
曹惠敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202010067046.0A priority Critical patent/CN111244144B/en
Publication of CN111244144A publication Critical patent/CN111244144A/en
Application granted granted Critical
Publication of CN111244144B publication Critical patent/CN111244144B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The present invention relates to a display substrate comprising: a base substrate; the first source drain metal layer is connected with the first gate metal layer through a contact hole in the dielectric insulating layer, the first gate metal layer is a metal wire, and the part, located in the contact hole, of the second source drain metal layer comprises a middle area and an edge area; a second gate metal layer is arranged between the first gate insulating layer and the second gate insulating layer, and a through hole is formed in the second gate metal layer to form a step structure at the edge of the contact hole and reduce the section difference between the middle area and the edge area; the orthographic projection of the via hole on the substrate base plate is smaller than that of the contact hole on the substrate base plate, and the center of the via hole is superposed with that of the contact hole. The invention also relates to a manufacturing method of the display substrate and a display device.

Description

Display substrate, display device and manufacturing method of display substrate
Technical Field
The invention relates to the technical field of display product manufacturing, in particular to a display substrate, a display device and a manufacturing method of the display substrate.
Background
In order to solve the problem of Loading of an OLED (organic light-Emitting Diode) product with a large size, a double-layer SD (source drain metal) structure is a means for reducing screen routing Loading and improving uniformity and power consumption. In the structural arrangement of the double-layer source drain metal layer, the gradient of a contact hole for depositing the source drain metal layer is large, so that the middle of the first source drain metal layer is thick, the edge of the first source drain metal layer is thin, after the second source drain metal layer is deposited in the contact hole, the difference between the thicknesses of the middle area and the edge area of the second source drain metal layer is increased, the second source drain metal layer comprises an aluminum substrate and a metal titanium protective film (Top Ti) positioned on one side of the aluminum substrate far away from the first source drain metal layer, and the difference between the thicknesses of the middle area and the edge area of the second source drain metal layer is increased, so that the thickness of the metal titanium protective film on one side of the second source drain metal layer far away from the first source drain metal layer is thinner or even missing in the edge area, therefore, in the subsequent wet etching process, the aluminum substrate in the edge area is easy to be corroded, and for the structure of the single-layer source drain metal layer, the corrosion can be solved by thickening the metal titanium protective film, however, for the double-layer source drain metal layer structure, corrosion still exists even if the metal titanium protective film is thickened due to serious corrosion.
Disclosure of Invention
In order to solve the technical problems, the invention provides a display substrate, a display device and a manufacturing method of the display substrate, and solves the problem that the thickness difference between the middle area and the edge area of a source drain metal layer is large in a double-layer source drain metal layer structure.
In order to achieve the purpose, the invention adopts the technical scheme that: a display substrate, comprising: a base substrate; the first source drain metal layer is connected with the first gate metal layer through a contact hole in the dielectric insulating layer, the first gate metal layer is a metal routing, and the part, located in the contact hole, of the second source drain metal layer comprises a middle area and an edge area;
a second gate metal layer is arranged between the first gate insulating layer and the second gate insulating layer, and a through hole is formed in the second gate metal layer so as to form a step structure at the edge of the contact hole and reduce the section difference between the middle area and the edge area;
the orthographic projection of the via hole on the substrate base plate is smaller than the orthographic projection of the contact hole on the substrate base plate, and the center of the via hole is coincided with the center of the contact hole.
Optionally, an angle between a sidewall of the via hole and the surface of the first gate insulating layer is smaller than a preset value, so that the transition between the middle region and the edge region is smooth.
Optionally, an angle between a sidewall of the via hole and a surface of the first gate insulating layer is smaller than an angle between a sidewall of the contact hole and a surface of the first gate insulating layer.
Optionally, an orthographic projection of the edge region on the substrate base plate covers an orthographic projection of the sidewall of the via hole on the substrate base plate.
Optionally, the sidewall of the via hole includes a first end far away from the substrate base plate, the contact hole includes a second end near the substrate base plate, the first end and the second end have a spacing in a first direction, and the first direction is a direction parallel to the surface of the substrate base plate.
Optionally, the distance is 0.6-1 um.
Optionally, the second source-drain metal layer includes an aluminum substrate and a titanium protection film disposed on a side of the aluminum substrate away from the substrate base plate.
Optionally, the first area is a non-display area.
The invention also provides a display device comprising the display substrate.
The invention also provides a manufacturing method of the display substrate, which comprises the following steps:
depositing a first insulating material layer, patterning the first insulating material layer, and forming a first grid insulating layer pattern in a first area of the substrate;
depositing a first conductive material layer, patterning the first conductive material layer, and forming a pattern of a second gate metal layer including a via hole on the first gate insulating layer;
depositing a second insulating material layer, patterning the second insulating material layer, and forming a pattern of a second gate insulating layer on the second gate metal layer;
depositing a second conductive material layer, patterning the second conductive material layer, and forming a pattern of a first gate metal layer on the second gate insulating layer;
depositing a third insulating material layer, patterning the third insulating material layer, and forming a material of a dielectric insulating layer comprising a contact hole on the first gate metal layer, wherein the orthographic projection of the via hole on the substrate base plate is positioned in the orthographic projection of the contact hole on the substrate base plate;
depositing a third conductive material layer, patterning the third conductive material layer, and forming a first source drain metal layer on the dielectric insulating layer;
depositing a fourth insulating material layer, patterning the fourth insulating material layer, and forming a passivation layer on the first source drain metal layer;
and depositing a fourth conductive material layer, patterning the fourth conductive material layer, and forming a second source drain metal layer on the passivation layer.
The invention has the beneficial effects that: through the arrangement of the second grid metal layer and the via holes on the second grid metal layer, the concave structure is formed on the first source drain metal layer formed by deposition on one side close to the substrate base body, the section difference between the middle area and the edge area of the first source drain metal layer and on one side far away from the substrate base body is reduced, the film thickness uniformity of the second source drain metal layer is improved, and the aluminum base body of the edge area of the second source drain metal layer is prevented from being corroded.
Drawings
FIG. 1 is a schematic view illustrating a partial structure of a display substrate according to the related art;
fig. 2 is a schematic diagram of a substrate after a first source-drain metal layer is formed in the related art;
FIG. 3 is a schematic view of a portion of a display substrate according to an embodiment of the invention;
FIG. 4 is a schematic diagram of a substrate after a second gate metal layer is formed according to an embodiment of the invention;
FIG. 5 shows a schematic diagram of a substrate after a first source-drain metal layer is formed in an embodiment of the present invention;
fig. 6 is a schematic flow chart illustrating a method for manufacturing a display substrate according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
As shown in fig. 1 and fig. 2, for the dual SD structure, when SPT is used to deposit (chemical vapor deposition) a metal film in the COF region (chip on film) hole, the following reasons are used:
the Profile (side slope) of the contact hole 10 formed by etching the CNT is large (approximately equal to 78 degrees);
forming directionality of the metal film layer using chemical vapor deposition;
when the SD1 (first source-drain metal layer 1) is deposited in the contact hole 10, the intermediate film thickness and the edge film thickness of the SD1 in the contact hole are thick, and the topography of the SD1 film layer is in a convex shape, as shown in fig. 1. After the PVX (passivation layer) deposition is sequentially performed, when the SD2 (second source/drain metal layer 2) is deposited, the difference between the film thickness of the middle region 100 and the film thickness of the edge region 200 of the SD2 in the contact hole 10 is increased, so that the Top Ti (titanium protective film 3) of the SD2 has Loss (see the dotted circle portion in fig. 1) at the edge of the contact hole, and the Al (aluminum matrix) without the Top Ti protection reacts with the etching solution during the anode wet etching, so that the aluminum matrix of the SD2 is corroded. For single SD structures, this corrosion can be addressed by Top Ti thickening, but for dual SD structures, thickened Top Ti corrosion still exists due to the severe corrosion.
In view of the above problems, the present embodiment provides a display substrate, wherein the second gate metal layer 2 is disposed between the first gate insulating layer 1 and the second gate insulating layer 3, which are stacked and disposed in the first region of the substrate in the direction away from the substrate, and the via hole 20 is formed on the second gate metal layer 2, so that the middle region of the bottom of the contact hole 10 is no longer a plane but is recessed, and after the first source-drain metal layer 6 is deposited, the step difference between the middle region and the edge region of the side of the first source-drain metal layer 6 away from the substrate base is reduced, thereby improving the uniformity of the film thickness of the second source-drain metal layer 8, further improving the uniformity of the film thickness of the titanium protective film 9, and avoiding the corrosion of the aluminum base of the second source-drain metal layer 8 due to the absence of the protection of the titanium protective film 9.
Specifically, as shown in fig. 3, 4 and 5, a display substrate includes: a substrate base plate; the first gate insulating layer 1, the second gate insulating layer 3, the first gate metal layer 4, the dielectric insulating layer 5, the first source drain metal layer 6 and the second source drain metal layer 8 are sequentially arranged on the first region of the substrate in a stacking manner along the direction far away from the substrate, the first source drain metal layer 6 is connected with the first gate metal layer 4 through a contact hole 10 in the dielectric insulating layer 5, the first gate metal layer 4 is a metal wiring, and the part, located in the contact hole 10, of the second source drain metal layer 8 comprises a middle region and an edge region;
a second gate metal layer 2 is arranged between the first gate insulating layer 1 and the second gate insulating layer 3, and a via hole 20 is arranged on the second gate metal layer 2 to form a step structure at the edge of the contact hole 10, so that the step difference between the middle area and the edge area is reduced;
the orthographic projection of the via hole 20 on the substrate base plate is smaller than the orthographic projection of the contact hole 10 on the substrate base plate, and the center of the via hole 20 is coincided with the center of the contact hole 10.
As shown in fig. 3, the second gate metal layer 2 and the via hole 20 thereon are arranged to form a step structure at the edge of the contact hole 10, that is, the middle area at the bottom of the contact hole 10 is no longer a plane but is recessed, after the first source drain metal layer 6 is deposited, the step difference between the middle area and the edge area at the side of the first source drain metal layer 6 away from the substrate base is reduced, as shown in fig. 2 and 5, due to the step structure, the middle area of the first source drain metal layer 6 sinks, so that the step difference between the middle area and the edge area at the side of the first source drain metal layer 6 away from the substrate base is reduced, and the step difference between the middle area 11 and the edge area 12 of the first source drain metal layer in fig. 2 is significantly greater than the step difference between the middle area 61 and the edge area 62 of the first source drain metal layer in fig. 5, thereby improving the uniformity of the film thickness of the second source drain metal layer 8, further improving the film thickness uniformity of the titanium protective film 9 and solving the problem of corrosion of the aluminum substrate in the subsequent wet etching process caused by over-thin or defect of the titanium protective film 9 in the edge area.
In this embodiment, an angle b between the sidewall of the via hole 20 and the surface of the first gate insulating layer 1 is smaller than a preset value, so that the transition between the middle region and the edge region of the second source-drain metal layer or the first source-drain metal layer is smooth.
The difference between the thickness of the middle film and the thickness of the edge film of the first source drain metal layer 6 is caused by the large slope of the side surface of the contact hole 10, in this embodiment, the angle between the side wall of the via hole 20 and the surface of the first gate insulating layer 1 is set to be a smaller angle, so that the gradient of the edge of the contact hole 10 is reduced, and the uniformity of the thickness of the film deposited by the metal film layer (source drain metal layer) in the hole is improved. When the source and drain metal layers are deposited, a concave structure (which can also be considered as an inverted convex structure as shown in fig. 3 and 5) with a low middle edge and a high edge is formed at the bottom of the source and drain metal layer (close to one side of the substrate), so that the difference of the shape film thickness is reduced when the first source and drain metal layer 6 is deposited, and therefore, when the second source and drain metal layer 8 is deposited, the shape of the bottom of the second source and drain metal layer 8 is flatter, the problem that the titanium protection film 9 at the inner edge of the contact hole 10 is too thin or damaged is solved, and the problem of dark spots caused by corrosion of the aluminum matrix of the second source and drain metal layer 8 is improved.
It should be noted that, in this embodiment, the second gate metal layer 2 is manufactured without adding an additional process step, and only the corresponding mask plate needs to be replaced, so that when the gate of the TFT (thin film transistor) is formed, the second gate metal layer 2 on the first region of the substrate is formed at the same time.
It should be noted that the preset value may be set according to actual needs, and only needs to reduce the difference between the middle film thickness and the edge film thickness of the source and drain metal layer and improve the film thickness uniformity of the source and drain metal layer, as compared with the display substrate in fig. 1.
In this embodiment, an angle b between the sidewall of the via hole 20 and the surface of the first gate insulating layer 1 is smaller than an angle a between the sidewall of the contact hole 10 and the surface of the first gate insulating layer 1.
The aluminum substrate of the second source drain metal layer 8 is corroded due to the fact that the side slope of the contact hole 10 is large, a small angle is adopted for an angle between the side wall of the via hole 20 and the surface of the first grid insulating layer 1, so that one side, away from the substrate, of the source drain metal layer is flat, the problem that the thickness of the titanium protective film 9 is not uniform or even defective is solved, in a specific implementation mode of the embodiment, the side slope of the contact hole 10 is 76 degrees, and the angle between the side wall of the via hole 20 and the surface of the first grid insulating layer 1 is 55 degrees, but the method is not limited to the above.
In this embodiment, the orthographic projection of the edge region on the substrate base plate covers the orthographic projection of the sidewall of the via hole 20 on the substrate base plate.
In an embodiment of the present embodiment, the sidewall of the via hole 20 includes a first end far away from the substrate base, and the contact hole 10 includes a second end near the substrate base, where the first end and the second end have a distance in a first direction (refer to a distance between two dotted lines in fig. 3), and the first direction is a direction parallel to the surface of the substrate base.
The distance between the first end and the second end in the first direction is to ensure the accuracy of parameters such as the position, the size and the like of the contact hole 10, the edge area of the source and drain metal layer in fig. 1 is just padded up by the position of the side slope of the via hole 20, and the uniformity of the film thickness of the source and drain metal layer is effectively improved.
In a specific embodiment of the present invention, the distance is 0.6 to 1um, but not limited thereto.
In this embodiment, the second source-drain metal layer 8 includes an aluminum substrate and a titanium protection film 9 disposed on a side of the aluminum substrate away from the substrate base plate.
In this embodiment, the first area is a non-display area. The first gate metal layer 4 located in the non-display area of the substrate base plate is a metal routing.
The embodiment also provides a display device, which comprises the display substrate.
The display device may be: the display device comprises any product or component with a display function, such as a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet personal computer and the like, wherein the display device further comprises a flexible circuit board, a printed circuit board and a back plate.
Through the arrangement of the second grid metal layer 2 and the via hole 20 on the second grid metal layer in the first area of the substrate, the first source-drain metal layer 6 formed by deposition is enabled to form a concave structure on one side close to the substrate base body, the section difference of the middle area and the edge area of the first source-drain metal layer 6 on one side far away from the substrate base body is reduced, the film thickness uniformity of the second source-drain metal layer 8 is improved, and the aluminum base body of the edge area of the second source-drain metal layer 8 is prevented from being corroded. The yield of the product is improved.
The present embodiment further provides a method for manufacturing the display substrate, as shown in fig. 6, including:
depositing a first insulating material layer, patterning the first insulating material layer, and forming a pattern of a first gate insulating layer 1 in a first area of the substrate;
depositing a first conductive material layer, patterning the first conductive material layer, and forming a pattern of a second gate metal layer 2 including a via hole on the first gate insulating layer 1;
depositing a second insulating material layer, patterning the second insulating material layer, and forming a pattern of a second gate insulating layer 3 on the second gate metal layer 2;
depositing a second conductive material layer, patterning the second conductive material layer, and forming a pattern of a first gate metal layer 4 on the second gate insulating layer 3;
depositing a third insulating material layer, patterning the third insulating material layer, and forming a material of the dielectric insulating layer 5 comprising a contact hole 10 on the first gate metal layer 4, wherein the orthographic projection of the via hole 20 on the substrate base is positioned in the orthographic projection of the contact hole 10 on the substrate base;
depositing a third conductive material layer, patterning the third conductive material layer, and forming a first source drain metal layer 6 on the dielectric insulating layer 5;
depositing a fourth insulating material layer, patterning the fourth insulating material layer, and forming a passivation layer 7 on the first source drain metal layer 6;
and depositing a fourth conductive material layer, patterning the fourth conductive material layer, and forming a second source-drain metal layer 8 on the passivation layer 7.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A display substrate, comprising: a substrate base plate; the first source drain metal layer is connected with the first gate metal layer through a contact hole in the dielectric insulating layer, the first gate metal layer is a metal wiring, and the part, located in the contact hole, of the second source drain metal layer comprises a middle area and an edge area;
a second gate metal layer is arranged between the first gate insulating layer and the second gate insulating layer, and a through hole is formed in the second gate metal layer so as to form a step structure at the edge of the contact hole and reduce the section difference between the middle area and the edge area;
the orthographic projection of the via hole on the substrate base plate is smaller than the orthographic projection of the contact hole on the substrate base plate, and the center of the via hole is coincided with the center of the contact hole.
2. The display substrate according to claim 1, wherein an angle between a sidewall of the via hole and a surface of the first gate insulating layer is smaller than a preset value, so that the middle region and the edge region transition smoothly.
3. The display substrate according to claim 2, wherein an angle between a sidewall of the via hole and a surface of the first gate insulating layer is smaller than an angle between a sidewall of the contact hole and a surface of the first gate insulating layer.
4. The display substrate of claim 1, wherein an orthographic projection of the edge region on the substrate base covers an orthographic projection of a sidewall of the via on the substrate base.
5. The display substrate of claim 1, wherein the sidewall of the via comprises a first end distal from the substrate base, wherein the contact hole comprises a second end proximal to the substrate base, wherein the first end and the second end have a pitch in a first direction, and wherein the first direction is a direction parallel to a surface of the substrate base.
6. The display substrate of claim 5, wherein the distance is 0.6-1 um.
7. The display substrate according to claim 1, wherein the second source-drain metal layer comprises an aluminum substrate and a titanium protective film disposed on a side of the aluminum substrate away from the substrate.
8. The display substrate according to claim 1, wherein the first region is a non-display region.
9. A display device comprising the display substrate of any one of claims 1-8.
10. A method of manufacturing a display substrate according to any one of claims 1 to 8, comprising:
depositing a first insulating material layer, patterning the first insulating material layer, and forming a first grid insulating layer pattern in a first area of the substrate;
depositing a first conductive material layer, patterning the first conductive material layer, and forming a pattern of a second gate metal layer including a via hole on the first gate insulating layer;
depositing a second insulating material layer, patterning the second insulating material layer, and forming a pattern of a second gate insulating layer on the second gate metal layer;
depositing a second conductive material layer, patterning the second conductive material layer, and forming a pattern of a first gate metal layer on the second gate insulating layer;
depositing a third insulating material layer, patterning the third insulating material layer, and forming a material of a dielectric insulating layer comprising a contact hole on the first gate metal layer, wherein the orthographic projection of the via hole on the substrate base plate is positioned in the orthographic projection of the contact hole on the substrate base plate;
depositing a third conductive material layer, patterning the third conductive material layer, and forming a first source drain metal layer on the dielectric insulating layer;
depositing a fourth insulating material layer, patterning the fourth insulating material layer, and forming a passivation layer on the first source drain metal layer;
and depositing a fourth conductive material layer, patterning the fourth conductive material layer, and forming a second source drain metal layer on the passivation layer.
CN202010067046.0A 2020-01-20 2020-01-20 Display substrate, display device and manufacturing method of display substrate Active CN111244144B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010067046.0A CN111244144B (en) 2020-01-20 2020-01-20 Display substrate, display device and manufacturing method of display substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010067046.0A CN111244144B (en) 2020-01-20 2020-01-20 Display substrate, display device and manufacturing method of display substrate

Publications (2)

Publication Number Publication Date
CN111244144A CN111244144A (en) 2020-06-05
CN111244144B true CN111244144B (en) 2022-05-20

Family

ID=70869777

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010067046.0A Active CN111244144B (en) 2020-01-20 2020-01-20 Display substrate, display device and manufacturing method of display substrate

Country Status (1)

Country Link
CN (1) CN111244144B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1623235A (en) * 2002-03-07 2005-06-01 三星电子株式会社 Contact portion of semiconductor device and manufacturing method thereof including thin film transistor array panel for contact portion display device and manufacturing method thereof
CN107316839A (en) * 2017-06-30 2017-11-03 上海天马微电子有限公司 A kind of preparation method of array base palte, array base palte and display device
CN107818991A (en) * 2017-10-23 2018-03-20 京东方科技集团股份有限公司 A kind of array base palte and preparation method thereof, display panel
CN108878449A (en) * 2018-06-28 2018-11-23 京东方科技集团股份有限公司 Production method, array substrate and the display device of array substrate

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI686874B (en) * 2014-12-26 2020-03-01 日商半導體能源研究所股份有限公司 Semiconductor device, display device, display module, electronic evice, oxide, and manufacturing method of oxide

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1623235A (en) * 2002-03-07 2005-06-01 三星电子株式会社 Contact portion of semiconductor device and manufacturing method thereof including thin film transistor array panel for contact portion display device and manufacturing method thereof
CN107316839A (en) * 2017-06-30 2017-11-03 上海天马微电子有限公司 A kind of preparation method of array base palte, array base palte and display device
CN107818991A (en) * 2017-10-23 2018-03-20 京东方科技集团股份有限公司 A kind of array base palte and preparation method thereof, display panel
CN108878449A (en) * 2018-06-28 2018-11-23 京东方科技集团股份有限公司 Production method, array substrate and the display device of array substrate

Also Published As

Publication number Publication date
CN111244144A (en) 2020-06-05

Similar Documents

Publication Publication Date Title
US20220246885A1 (en) Display panel, display device, and manufacturing methods thereof
CN108257982B (en) Flexible substrate, method for manufacturing same, flexible panel, and electronic device
WO2018214727A1 (en) Flexible display substrate and manufacturing method thereof, and display device
US9911944B2 (en) Display panel
US20200043996A1 (en) Display substrate and display apparatus
US11335870B2 (en) Display substrate and preparation method thereof, and display device
CN110828483A (en) Top-emitting OLED display back plate, manufacturing method thereof and OLED display device
CN111244144B (en) Display substrate, display device and manufacturing method of display substrate
US20230335624A1 (en) Display substrate and manufacturing method thereof, display device
US11068114B2 (en) Display panel, manufacturing method thereof, and display device
US11139361B2 (en) Array substrate with metal traces, method of manufacturing same, and display panel
US20220310572A1 (en) Display device and manufacturing method thereof
US11282867B2 (en) Manufacturing method of display substrate motherboard, and display device
CN113421889A (en) Display panel, method for preparing display panel and display device
US20160300897A1 (en) Method of manufacturing display substrate, display substrate and display device
CN112885975A (en) Display substrate, preparation method thereof and display device
CN111048527B (en) Display back plate, manufacturing method thereof and display device
US20220352275A1 (en) Oled display panel and method of manufacturing same
US20240188348A1 (en) Display panel and method for fabricating display panel
CN112259579B (en) OLED display panel and manufacturing method thereof
CN214797374U (en) Planarization insulating layer
US20240032348A1 (en) Display panel and display device and method of manufacturing display panel
US20220320473A1 (en) Manufacturing method of oled panel and oled panel
US20220238819A1 (en) Display Substrate, Preparation Method thereof, and Display Apparatus
CN113421903A (en) Display substrate, preparation method thereof, display panel and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant