CN111209079A - Scheduling method, device and medium based on Roc processor - Google Patents

Scheduling method, device and medium based on Roc processor Download PDF

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Publication number
CN111209079A
CN111209079A CN201911382622.4A CN201911382622A CN111209079A CN 111209079 A CN111209079 A CN 111209079A CN 201911382622 A CN201911382622 A CN 201911382622A CN 111209079 A CN111209079 A CN 111209079A
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virtual machine
processor
vcpus
vcpu
instruction
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石磊
刘春�
张辉
李铭
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Shandong Qianyun Qichuang Information Technology Co ltd
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Shandong Qianyun Qichuang Information Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5077Logical partitioning of resources; Management or configuration of virtualized resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/4557Distribution of virtual machine instances; Migration and load balancing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45591Monitoring or debugging support

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  • Software Systems (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The embodiment of the specification discloses a scheduling method based on a spread-spectrum processor, which comprises the following steps: the method comprises the steps that a virtual machine monitor monitors instruction streams operated by all VCPUs corresponding to the virtual machine monitor, determines that the number of times of preset instructions contained in the instruction streams operated by at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs; and executing the VCPUs in other virtual machines by the physical CPU corresponding to the Roc processor. In this embodiment of the present description, the instruction stream of each VCPU operation corresponding to the virtual machine monitor is monitored by the virtual machine monitor, and if it is determined that the number of times of the preset instruction included in the instruction stream of the VCPU operation exceeds the preset value, all VCPUs in the virtual machine corresponding to the mashup processor to which the VCPU belongs need to be scheduled out, so as to improve the scheduling efficiency of the multi-core virtual machine.

Description

Scheduling method, device and medium based on Roc processor
Technical Field
The present application relates to the field of computer technologies, and in particular, to a scheduling method, apparatus, and medium based on a spread-spectrum processor.
Background
Virtualization technology is a technology for abstracting computer physical resources, converting the computer physical resources into virtual computer resources, and providing the virtual computer resources for a program to use, and presenting a virtual hardware interface upwards so that a plurality of operating systems can run on the same physical device. By utilizing the virtualization technology, the services originally running on a plurality of physical devices are integrated into the same physical server, so that the management and maintenance cost of an enterprise on an IT infrastructure is reduced while the utilization rate of physical resources is improved. On the other hand, the management of the physical resources through the virtualization technology can dynamically configure the resources, and the adaptability to various services is stronger. Meanwhile, the virtualization technology can monitor and isolate the virtual machines, so that the normal operation of the virtual machines and mutual independence between the virtual machines can be ensured. In addition, the virtual machine can more quickly perform copy transfer, thereby improving the availability and the disaster recovery speed. Thus, virtualization technology becomes an integral part of cloud computing as well as data centers. Currently, the mainstream virtualization technology includes a Virtual Machine Monitor (VMM).
The introduction of the virtual machine monitor makes many problems already solved in the conventional operating system to have new changes, and also makes the existing scheduling mechanism in the conventional operating system to have new problems. The scheduling mechanism works well on the multi-core physical server, but the problem of low scheduling efficiency exists in the multi-core virtual machine, so that the performance of the virtual machine is reduced.
Disclosure of Invention
In view of this, embodiments of the present specification provide a method, an apparatus, and a medium for scheduling based on a spread-spectrum processor, so as to solve the problem in the prior art that the scheduling efficiency is low in a multi-core virtual machine.
The embodiment of the specification adopts the following technical scheme:
an embodiment of the present specification provides a scheduling method based on a spread-spectrum processor, where the method includes:
the method comprises the steps that a virtual machine monitor monitors instruction streams operated by VCPUs corresponding to the virtual machine monitor, determines that the number of times of preset instructions contained in the instruction streams operated by at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and executing the VCPUs in other virtual machines by the physical CPU corresponding to the Roc processor.
Further, the monitoring, by the virtual machine monitor, of the instruction stream of each VCPU operation corresponding to the virtual machine monitor, and determining that the number of times of the preset instruction included in the instruction stream of at least one VCPU operation exceeds a preset value specifically includes:
when the virtual machine runs, the virtual machine monitor periodically monitors the instruction stream of the running of the VCPUs corresponding to the virtual machine monitor to obtain the frequency of sending a preset instruction by each VCPU;
determining whether the frequency of sending a preset instruction by at least one VCPU exceeds a preset value;
and if the frequency of sending the preset instruction by at least one VCPU is determined to exceed the preset value, executing the step of dispatching all VCPUs in the virtual machine corresponding to the spread processor to which the at least one VCPU belongs.
Further, the preset instruction at least comprises a WFE instruction.
Further, the virtual machine includes a user mode and a kernel mode.
Further, before scheduling all VCPUs in the virtual machine corresponding to the spread network processor to which the at least one VCPU belongs, the method further includes:
determining whether the VCPU is in a kernel state;
and executing the step of dispatching all VCPUs in the virtual machine corresponding to the spread processor to which the at least one VCPU belongs under the condition that the VCPUs are determined to be in the kernel state.
Further, after scheduling all VCPUs in the virtual machine corresponding to the spread network processor to which the at least one VCPU belongs, the method further includes:
and arranging all VCPUs in the virtual machine at the tail of a scheduling queue.
Further, after the physical CPU corresponding to the spread processor executes VCPUs in other virtual machines, the method further includes:
after the physical CPU corresponding to the Roc processor is determined to finish executing the VCPUs in other virtual machines, all the VCPUs of the virtual machines are dispatched back at the same time, wherein the dispatching back means that the physical CPU corresponding to the Roc processor in the virtual machine continues executing the VCPUs.
Further, before or during the monitoring of the instruction stream executed by each VCPU corresponding to the virtual machine monitor by the virtual machine monitor, the method further includes:
the VCPU in the virtual machine corresponding to the Kunpeng processor acquires the spin lock;
calling the preset instruction under the condition that the spin lock is failed to be acquired, wherein the preset instruction is used for enabling the VCPU to enter a waiting state;
after waiting for a preset time, the VCPU acquires the spin lock again until the spin lock is acquired successfully.
An embodiment of the present specification further provides a scheduling apparatus based on a spread spectrum processor, where the apparatus includes:
the scheduling unit is used for monitoring instruction streams of the running of each VCPU corresponding to the virtual machine monitor by the virtual machine monitor, determining that the frequency of preset instructions contained in the instruction stream of the running of at least one VCPU exceeds a preset value, and scheduling all VCPUs in the virtual machine corresponding to the Roc processor to which the at least one VCPU belongs, wherein the VCPU scheduling refers to that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and the execution unit is used for executing the VCPUs in other virtual machines by the physical CPU corresponding to the spread-spectrum processor.
Embodiments of the present specification also provide a computer readable medium having computer readable instructions stored thereon, the computer readable instructions being executable by a processor to perform the steps of:
the method comprises the steps that a virtual machine monitor monitors instruction streams operated by VCPUs corresponding to the virtual machine monitor, determines that the number of times of preset instructions contained in the instruction streams operated by at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and executing the VCPUs in other virtual machines by the physical CPU corresponding to the Roc processor.
Embodiments of the present specification further provide a spread-spectrum-processor-based scheduling apparatus, the apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the following:
the scheduling unit is used for monitoring instruction streams of the running of each VCPU corresponding to the virtual machine monitor by the virtual machine monitor, determining that the frequency of preset instructions contained in the instruction stream of the running of at least one VCPU exceeds a preset value, and scheduling all VCPUs in the virtual machine corresponding to the Roc processor to which the at least one VCPU belongs, wherein the VCPU scheduling refers to that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and the execution unit is used for executing the VCPUs in other virtual machines by the physical CPU corresponding to the spread-spectrum processor.
The embodiment of the specification adopts at least one technical scheme which can achieve the following beneficial effects: in this embodiment of the present description, the instruction stream of each VCPU operation corresponding to the virtual machine monitor is monitored by the virtual machine monitor, and if it is determined that the number of times of the preset instruction included in the instruction stream of the VCPU operation exceeds the preset value, all VCPUs in the virtual machine corresponding to the mashup processor to which the VCPU belongs need to be scheduled out, so as to improve the scheduling efficiency of the multi-core virtual machine.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a flowchart illustrating a scheduling method based on a spread-spectrum processor according to an embodiment of the present disclosure;
fig. 2 is a schematic flowchart of a scheduling method based on a spread-spectrum processor according to a second embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a scheduling apparatus based on a spread-spectrum processor according to a third embodiment of the present disclosure.
Detailed Description
The virtual machine monitor is arranged between hardware and a traditional operating system, is responsible for managing physical resources of the computer, the physical resources comprise hardware resources such as a memory, a CPU (central processing unit) and I/O (input/output) equipment, and virtualizes a hardware interface for an upper layer to use, so that a plurality of operating systems can run on the same physical equipment. Meanwhile, in order to better improve the performance of the virtualization server, the hardware is also added with support for virtualization.
The introduction of the virtual machine monitor makes many problems already solved in the conventional operating system to have new changes, and also makes the existing scheduling mechanism in the conventional operating system to have new problems. The scheduling mechanism works well on multi-core physical servers, but there is an obvious scheduling efficiency problem in multi-core virtual machines. Among them, Spin-Lock (Spin-Lock) is used to resolve contention between CPUs for shared resources. When a plurality of CPUs need to acquire the same spin lock, only one CPU can hold the spin lock, and other CPUs always circularly detect whether the spin lock is released. In a conventional operating system, a CPU holding a spin lock releases the lock in a very short time, so that the time for waiting for the CPU cycle detection of the spin lock is not very long. However, in a virtualization environment, a VCPU holding a spin Lock in a virtual machine may be dispatched out of a physical CPU by a virtual machine monitor, so that other VCPUs in the virtual machine waiting for the spin Lock are always in a state of circularly detecting the spin Lock, which is called a LHP (Lock Holder preference) problem, and if the above-mentioned LHP exists, the performance of the virtual machine is reduced.
The VCPU is a virtual processor, and the VCPU is a CPU in a virtual machine, as opposed to a physical CPU.
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The technical solutions provided by the embodiments of the present application are described in detail below with reference to the accompanying drawings.
Fig. 1 is a flowchart illustrating a scheduling method based on a mashup processor according to an embodiment of the present disclosure.
The embodiment of the present description may be executed by a spread processor, where the spread processor is a multi-core processor, the number of cores is greater than 32 cores, and the spread processor may support multiple virtual machines to run simultaneously, and the embodiment of the present description may be executed by a virtual machine monitor, where before executing the following steps, a communication channel between the virtual machine and the virtual machine monitor needs to be established, so that the virtual machine monitor monitors the virtual machine, which specifically includes:
step S101, a virtual machine monitor monitors instruction streams of the running of each VCPU corresponding to the virtual machine monitor, determines that the number of times of a preset instruction contained in the instruction stream of the running of at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily stops executing the VCPUs.
And S102, the virtual machine monitor executes the VCPUs in other virtual machines by using the physical CPU corresponding to the spread processor.
In this embodiment of the present description, the instruction stream of each VCPU operation corresponding to the virtual machine monitor is monitored by the virtual machine monitor, and if it is determined that the number of times of the preset instruction included in the instruction stream of the VCPU operation exceeds the preset value, all VCPUs in the virtual machine corresponding to the mashup processor to which the VCPU belongs need to be scheduled out, so as to improve the scheduling efficiency of the multi-core virtual machine.
Corresponding to the foregoing embodiments, fig. 2 is a schematic flowchart of a scheduling method based on a mashup processor according to a second embodiment of the present disclosure.
The embodiment of the present description may be executed by a spread processor, where the spread processor is a multi-core processor, the number of cores is greater than 32 cores, and the spread processor may support multiple virtual machines to run simultaneously, and the embodiment of the present description may be executed by a virtual machine monitor, where before executing the following steps, a communication channel between the virtual machine and the virtual machine monitor needs to be established, so that the virtual machine monitor monitors the virtual machine, which specifically includes:
step S201, when the virtual machine runs, the virtual machine monitor periodically monitors a running instruction stream of the VCPU corresponding to the virtual machine monitor, and obtains the number of times that each VCPU sends a preset instruction.
In step S201 of this embodiment, the preset instruction at least includes a WFE instruction. Because the VCPU with spin lock in the virtual machine may be dispatched by the virtual machine monitor, so that other VCPUs waiting for the spin lock in the virtual machine are in a state of circularly detecting the spin lock, the VCPU waiting for the spin lock will periodically issue WFE instructions, and if the VCPU waiting for the spin lock cannot hold the lock, the WFE instructions will be issued until the spin lock is taken.
Before or during the process that the virtual machine monitor monitors the instruction streams operated by the VCPUs corresponding to the virtual machine monitor, the method further includes:
the VCPU in the virtual machine corresponding to the Kunpeng processor acquires the spin lock;
calling the preset instruction under the condition that the spin lock is failed to be acquired, wherein the preset instruction is used for enabling the VCPU to enter a waiting state;
after waiting for a preset time, the VCPU acquires the spin lock again until the spin lock is acquired successfully.
It should be noted that the VCPU is a virtualization technology of a physical CPU corresponding to the spread processor, and the virtualization of the physical CPU corresponding to the spread processor is that the physical CPU corresponding to a single spread processor simulates multiple VCPUs to be parallel, so that a platform is allowed to run multiple operating systems at the same time, and application programs can run in mutually independent spaces without mutual influence, thereby significantly improving the work efficiency of the computer.
Step S202, the virtual machine monitor determines whether the frequency of at least one VCPU sending a preset instruction exceeds a preset value, if so, the step S203 is executed; if not, the process returns to step S201.
In step S202 in the embodiment of this specification, the virtual machine monitor determines whether there is at least one VCPU in the virtual machine that has sent a preset instruction more than a preset value, if so, step S203 is executed, and if not, step S201 is executed again, for example, the preset value is 5 times, and the virtual machine monitor determines whether there is at least one VCPU in the virtual machine that has sent a preset instruction more than 5 times.
Step S203, the virtual machine monitor dispatches all VCPUs in the virtual machine corresponding to the spread-penning processor to which the at least one VCPU belongs, where the dispatching of VCPUs means that the physical CPU corresponding to the spread-penning processor in the virtual machine suspends the execution of VCPUs.
In step S203 of this embodiment of the present description, a plurality of VCPUs may be run in the virtual machine, and since the virtual machine monitor cannot determine which VCPU has issued the preset instruction for a time exceeding the preset value, when the virtual machine monitor determines that the time for which at least one VCPU has issued the preset instruction exceeds the preset value, all VCPUs in the virtual machine are dispatched, that is, in the virtual machine, the virtual machine monitor controls the physical CPU corresponding to the kupeng processor to suspend executing all VCPUs.
Further, after the virtual machine monitor schedules all VCPUs in the virtual machine corresponding to the spread grid processor to which the at least one VCPU belongs, the virtual machine monitor may arrange all VCPUs in the virtual machine at the tail of the scheduling queue.
And step S204, the virtual machine monitor executes the VCPUs in other virtual machines by using the physical CPU corresponding to the spread-penning processor.
Step S205, after the virtual machine monitor determines that the physical CPU corresponding to the spread network processor has executed VCPUs in other virtual machines, the virtual machine monitor simultaneously schedules all VCPUs of the virtual machines back, where the scheduling back means that the physical CPU corresponding to the spread network processor in the virtual machine continues to execute VCPUs.
In step S205 of the embodiment of the present specification, after determining that the physical CPU corresponding to the mashup processor has executed all VCPUs in other virtual machines, the virtual machine monitor schedules all VCPUs of the virtual machine back, that is, in the virtual machine, the virtual machine monitor controls the physical CPU corresponding to the mashup processor to continue executing all VCPUs of the virtual machine.
Further, the virtual machine comprises a user mode and a kernel mode.
Before executing the step of scheduling out all VCPUs in the virtual machine corresponding to the spread penny processor to which the at least one VCPU belongs, the embodiment of the present specification may execute the following steps:
determining whether the VCPU is in a kernel state;
and executing the step of dispatching all VCPUs in the virtual machine corresponding to the spread processor to which the at least one VCPU belongs under the condition that the VCPU is determined to be in the kernel state.
In this embodiment of the present description, the instruction stream of each VCPU operation corresponding to the virtual machine monitor is monitored by the virtual machine monitor, and if it is determined that the number of times of the preset instruction included in the instruction stream of the VCPU operation exceeds the preset value, all VCPUs in the virtual machine corresponding to the mashup processor to which the VCPU belongs need to be scheduled out, so as to improve the scheduling efficiency of the multi-core virtual machine.
Fig. 3 is a schematic structural diagram of a scheduling apparatus based on a mashup processor according to a third embodiment of the present disclosure.
The embodiments of the present description may be executed by a spread processor, where the spread processor is a multi-core processor, and the number of cores is greater than 32 cores, and may support multiple virtual machines to run simultaneously, specifically including: scheduling unit 1 and execution unit 2.
The scheduling unit 1 is configured to monitor, by a virtual machine monitor, instruction streams of running of VCPUs corresponding to the virtual machine monitor, determine that the number of times of a preset instruction included in the instruction stream of running of at least one VCPU exceeds a preset value, and schedule all VCPUs in a virtual machine corresponding to a mashrough processor to which the at least one VCPU belongs, where the VCPU scheduling refers to suspending execution of the VCPU by a physical CPU corresponding to the mashrough processor in the virtual machine;
the execution unit 2 is configured to execute the VCPU in the other virtual machine on the physical CPU corresponding to the spread processor.
Embodiments of the present specification also provide a computer readable medium having computer readable instructions stored thereon, the computer readable instructions being executable by a processor to perform the steps of:
the method comprises the steps that a virtual machine monitor monitors instruction streams operated by VCPUs corresponding to the virtual machine monitor, determines that the number of times of preset instructions contained in the instruction streams operated by at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and executing the VCPUs in other virtual machines by the physical CPU corresponding to the Roc processor.
Embodiments of the present specification further provide a monitoring apparatus based on a spread-spectrum processor, the apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform:
the scheduling unit is configured to monitor instruction streams of the VCPUs operated by the virtual machine monitor, determine that the number of times of a preset instruction included in the instruction stream of at least one VCPU operation exceeds a preset value, and schedule all VCPUs in a virtual machine corresponding to the mashrough processor to which the VCPU belongs, where the VCPU scheduling refers to suspending execution of the VCPU by a physical CPU corresponding to the mashrough processor in the virtual machine;
and the execution unit is used for executing the VCPUs in other virtual machines by the physical CPU corresponding to the spread-spectrum processor.
In this embodiment of the present description, the instruction stream of each VCPU operation corresponding to the virtual machine monitor is monitored by the virtual machine monitor, and if it is determined that the number of times of the preset instruction included in the instruction stream of the VCPU operation exceeds the preset value, all VCPUs in the virtual machine corresponding to the mashup processor to which the VCPU belongs need to be scheduled out, so as to improve the scheduling efficiency of the multi-core virtual machine.
In the 90 s of the 20 th century, improvements in a technology could clearly distinguish between improvements in hardware (e.g., improvements in circuit structures such as diodes, transistors, switches, etc.) and improvements in software (improvements in process flow). However, as technology advances, many of today's process flow improvements have been seen as direct improvements in hardware circuit architecture. Designers almost always obtain the corresponding hardware circuit structure by programming an improved method flow into the hardware circuit. Thus, it cannot be said that an improvement in the process flow cannot be realized by hardware physical modules. For example, a Programmable Logic Device (PLD), such as a Field Programmable Gate Array (FPGA), is an integrated circuit whose Logic functions are determined by programming the Device by a user. A digital system is "integrated" on a PLD by the designer's own programming without requiring the chip manufacturer to design and fabricate application-specific integrated circuit chips. Furthermore, nowadays, instead of manually making an integrated Circuit chip, such Programming is often implemented by "logic compiler" software, which is similar to a software compiler used in program development and writing, but the original code before compiling is also written by a specific Programming Language, which is called Hardware Description Language (HDL), and HDL is not only one but many, such as abel (advanced Boolean Expression Language), ahdl (alternate Language Description Language), traffic, pl (core unified Programming Language), HDCal, JHDL (Java Hardware Description Language), langue, Lola, HDL, laspam, hardsradware (Hardware Description Language), vhjhd (Hardware Description Language), and vhigh-Language, which are currently used in most common. It will also be apparent to those skilled in the art that hardware circuitry that implements the logical method flows can be readily obtained by merely slightly programming the method flows into an integrated circuit using the hardware description languages described above.
The controller may be implemented in any suitable manner, for example, the controller may take the form of, for example, a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro) processor, logic gates, switches, an Application Specific Integrated Circuit (ASIC), a programmable logic controller, and an embedded microcontroller, examples of which include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320, the memory controller may also be implemented as part of the control logic for the memory. Those skilled in the art will also appreciate that, in addition to implementing the controller as pure computer readable program code, the same functionality can be implemented by logically programming method steps such that the controller is in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Such a controller may thus be considered a hardware component, and the means included therein for performing the various functions may also be considered as a structure within the hardware component. Or even means for performing the functions may be regarded as being both a software module for performing the method and a structure within a hardware component.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. One typical implementation device is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission medium which can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (10)

1. A scheduling method based on a Kunpeng processor, the method comprising:
the method comprises the steps that a virtual machine monitor monitors instruction streams operated by VCPUs corresponding to the virtual machine monitor, determines that the number of times of preset instructions contained in the instruction streams operated by at least one VCPU exceeds a preset value, and dispatches all VCPUs in a virtual machine corresponding to a Roc processor to which the at least one VCPU belongs, wherein the dispatching of the VCPUs means that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and executing the VCPUs in other virtual machines by the physical CPU corresponding to the Roc processor.
2. The method according to claim 1, wherein the virtual machine monitor monitors the instruction streams of the VCPUs that the virtual machine monitor corresponds to, and determines that the number of times of the preset instructions included in the instruction stream of at least one VCPU operation exceeds a preset value, specifically comprising:
when the virtual machine runs, the virtual machine monitor periodically monitors the instruction stream of the running of the VCPUs corresponding to the virtual machine monitor to obtain the frequency of sending a preset instruction by each VCPU;
determining whether the frequency of sending a preset instruction by at least one VCPU exceeds a preset value;
and if the frequency of sending the preset instruction by at least one VCPU is determined to exceed the preset value, executing the step of dispatching all VCPUs in the virtual machine corresponding to the spread processor to which the at least one VCPU belongs.
3. The method of claim 1, wherein the predetermined instructions comprise at least WFE instructions.
4. The Kunpeng processor-based scheduling method according to claim 1, wherein said virtual machine comprises a user mode and a kernel mode.
5. The Kunpeng processor-based scheduling method according to claim 4, wherein before scheduling out all VCPUs in the virtual machine corresponding to the Kunpeng processor to which said at least one VCPU belongs, said method further comprises:
determining whether the VCPU is in a kernel state;
and executing the step of dispatching all VCPUs in the virtual machine corresponding to the spread processor to which the at least one VCPU belongs under the condition that the VCPUs are determined to be in the kernel state.
6. The Kunpeng processor-based scheduling method according to claim 1, wherein after scheduling out all VCPUs in the virtual machine corresponding to the Kunpeng processor to which said at least one VCPU belongs, said method further comprises:
and arranging all VCPUs in the virtual machine at the tail of a scheduling queue.
7. The Kunpeng processor-based scheduling method according to claim 1, wherein after the physical CPU corresponding to the Kunpeng processor executes VCPUs in other virtual machines, the method further comprises:
after the physical CPU corresponding to the Roc processor is determined to finish executing the VCPUs in other virtual machines, all the VCPUs of the virtual machines are dispatched back at the same time, wherein the dispatching back means that the physical CPU corresponding to the Roc processor in the virtual machine continues executing the VCPUs.
8. The method for scheduling a spread-spectrum processor according to claim 1, wherein before or during the monitoring, by the virtual machine monitor, of the instruction stream executed by each VCPU corresponding to the virtual machine monitor, the method further comprises:
the VCPU in the virtual machine corresponding to the Kunpeng processor acquires the spin lock;
calling the preset instruction under the condition that the spin lock is failed to be acquired, wherein the preset instruction is used for enabling the VCPU to enter a waiting state;
after waiting for a preset time, the VCPU acquires the spin lock again until the spin lock is acquired successfully.
9. A mashup processor-based scheduling apparatus, the apparatus comprising:
the scheduling unit is used for monitoring instruction streams of the running of each VCPU corresponding to the virtual machine monitor by the virtual machine monitor, determining that the frequency of preset instructions contained in the instruction stream of the running of at least one VCPU exceeds a preset value, and scheduling all VCPUs in the virtual machine corresponding to the Roc processor to which the at least one VCPU belongs, wherein the VCPU scheduling refers to that a physical CPU corresponding to the Roc processor in the virtual machine temporarily executes the VCPUs;
and the execution unit is used for executing the VCPUs in other virtual machines by the physical CPU corresponding to the spread-spectrum processor.
10. A computer readable medium having computer readable instructions stored thereon which are executable by a processor to implement the method of any one of claims 1 to 8.
CN201911382622.4A 2019-12-27 2019-12-27 Scheduling method, device and medium based on Roc processor Pending CN111209079A (en)

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