CN111190776A - Server mainboard test method - Google Patents

Server mainboard test method Download PDF

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Publication number
CN111190776A
CN111190776A CN201811350468.8A CN201811350468A CN111190776A CN 111190776 A CN111190776 A CN 111190776A CN 201811350468 A CN201811350468 A CN 201811350468A CN 111190776 A CN111190776 A CN 111190776A
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test
processing unit
parameter
path controller
platform path
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CN201811350468.8A
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CN111190776B (en
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王启禹
曹登云
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Shencloud Technology Co Ltd
Shunda Computer Factory Co Ltd
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Shencloud Technology Co Ltd
Shunda Computer Factory Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273—Test methods
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

A server mainboard test method is applied to a server mainboard. The server mainboard comprises a processing unit, a platform path controller and a basic input and output unit. The basic input/output unit comprises an execution module and a test module. The server mainboard test method comprises the following steps: in step (B), when the processing unit executes the execution module and reads an execution parameter built in the execution module, it is determined whether the read execution parameter is a first bit value, if not, the processing unit continues to execute the execution module and completes booting, and in step (C), if the step (B) is determined to be yes, the processing unit directly executes the test module. When the processing unit judges that the execution parameter is the first bit value, the processing unit directly executes the test module to perform test operation, thereby effectively improving the inconvenience of externally connecting a server mainboard with a peripheral device with an operation system in the prior art, saving time and having good test efficiency.

Description

Server mainboard test method
Technical Field
The present invention relates to a method for testing a server motherboard, and more particularly, to a method for testing a server motherboard with high efficiency and time saving.
Background
Nowadays, servers are widely used, and before leaving a factory, the server motherboard needs to be tested and verified to ensure its functionality and stability. Therefore, there are items to be tested and verified at various stages of the manufacturing process of the server motherboard, so as to find problems and improve abnormalities in time, and ensure the execution of subsequent work stations. Generally, during the development phase, a Reset test operation of a Basic Input/Output System (BIOS) is usually performed, such as: warm Reset/Soft Reset (WARM/Soft Reset) operation or Full Reset/Power cycle (FULL/Power cycle) operation, however, when performing the test for executing the Reset (Reset) operation, it is usually necessary to connect a peripheral device (such as a hard disk or a flash drive) having an Operating System (OS) externally, and the Reset (Reset) operation is executed through an instruction after entering the OS. However, generally, the number of servers to be tested is huge and external peripheral devices are required each time, which not only wastes time and labor, but also causes problems that if the number of peripheral devices is not enough, server testing needs to be performed in batches or testing can be performed only when idle peripheral devices are waited for, which causes troubles and inconvenience for research and development personnel. In the development and production process, when the verification server executes a restart (Reset) test, problems and abnormalities mostly occur in the process of executing a Basic Input Output System (BIOS) post (power on Self test) by the verification server, however, the verification is completed by entering the OS each time, which is very time-consuming and inefficient, and needs to be discussed and improved.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a time-saving and efficient server mainboard testing method.
In order to solve the above technical problem, a server motherboard testing method is applied to a server motherboard, and the server motherboard includes a processing unit, a platform path controller connected to the processing unit, and a basic input/output unit connected to the platform path controller. The basic input/output unit comprises an execution module and a test module. The test module has a test function parameter, a first start-up test mode, and a second start-up test mode. The server mainboard test method comprises a step (A), a step (B), a step (C), a step (D) and a step (E).
In the step (a), the server motherboard is activated to perform a boot operation, and the processing unit executes the execution module of the bios via the platform path controller.
In the step (B), when the processing unit executes the execution module of the bios and reads an execution parameter built in the execution module, the processing unit determines whether the read execution parameter is a first bit value, and if not, the processing unit continues to execute the execution module and completes the boot operation.
In the step (C), if the determination in the step (B) is yes, the processing unit directly executes the test module and reads the test function parameter of the test module, and determines whether the read test function parameter is a first test bit value.
In the step (D), if the determination of the step (C) is yes, the processing unit executes the first boot test mode and transmits a first boot test command to the platform path controller, and the platform path controller starts a warm restart operation when receiving the first boot test command.
In the step (E), if the determination in the step (C) is negative, the processing unit executes the second boot test mode and transmits a second boot test command to the platform path controller, and the platform path controller starts a full restart operation when receiving the second boot test command, which represents that the test function parameter is a second test bit value.
Compared with the prior art, the server mainboard testing method of the invention has the advantages that by reading the execution parameter built in the execution module by the processing unit in the step (B) and judging whether the execution parameter is the first bit value or not, if so, the processing unit directly executes the testing module in the step (C) to directly perform testing operation, and by reading the testing function parameter by the processing unit in the step (C) and judging whether the read testing function parameter is the first testing bit value or the second testing bit value, the server mainboard starts the warm restart operation or the full restart operation, thereby effectively improving the problem that the conventional server mainboard needs to enter an Operating System (OS) to complete testing verification when performing the boot testing operation each time, and does not need to connect the server mainboard externally with a peripheral device with an Operating System (OS), effectively save time and test efficiency is good.
[ description of the drawings ]
Fig. 1 is a block diagram illustrating an embodiment of a method for testing a server motherboard according to the present invention.
FIG. 2 is a flowchart illustrating the steps of the embodiment.
[ detailed description ] embodiments
Referring to fig. 1 and 2, the server motherboard testing method of the present invention is applied to a server motherboard 1, where the server motherboard 1 includes a processing unit 2, a platform path controller 3 connected to the processing unit 2, and a basic input/output unit 4 connected to the platform path controller 3. The basic input/output unit 4 includes an execution module 41 and a test module 42. The test module 42 has a test function parameter, a first power-on test mode, and a second power-on test mode. The server mainboard test method comprises a step (A), a step (B), a step (C), a step (D) and a step (E).
First, in the step (a), the server motherboard 1 is turned on, and the processing unit 2 receives and executes the execution module 41 of the Basic Input/Output unit 4(BIOS) via the Platform path Controller 3 (PCH). In the step (B), when the processing unit 2 executes the executing module 41 of the bios 4 and reads an executing parameter built in the executing module 41, the processing unit 2 determines whether the read executing parameter is a first bit value, and if not, the processing unit 2 continues to execute the executing module 41 and completes the booting operation.
In this embodiment, the BIOS 4 further comprises a parameter setting module 43, the execution module 41 is a BIOS Code (BIOS Code) in the BIOS 4, and the execution parameter is a setting value manually preset in the execution module 41, the execution parameter setting is to perform the boot-up operation through the server motherboard 1 and enter a function field setting Menu (BIOS Setup Menu) (not shown) in the parameter setting module 43 of the BIOS 4 to set the execution parameter, for example: the user first sets and stores the setting value of the execution parameter in the function field setting Menu (BIOS Setup Menu) of the BIOS 4 corresponding to the field of the execution parameter, which is not described herein. In short, after the server motherboard 1 is turned on, the processing unit 2 executes the execution module 41 Code (BIOS Code) of the BIOS 4, and the execution module 41 Code has the execution parameter built therein, and when the processing unit 2 reads the execution parameter, it determines to continue to execute the execution module 41 Code to complete the boot-up operation or directly execute the test module 42 to directly perform the test operation according to the value of the read parameter. In addition, in the embodiment, the basic input/output unit 4(BIOS) is stored in an EEPROM or a flash memory, which is not described herein, and the processing unit 2 reads the execution parameters built in the execution module 41 when executing a DXE phase in the execution module 41(BIOS Code) and after executing a BIOS run, but is not limited thereto.
If the determination in the step (B) is yes, in the step (C), the processing unit 2 directly executes the test module 42 and reads the test function parameter of the test module 42, and determines whether the read test function parameter is a first test bit value. That is, if the step (B) determines yes, in the step (C), the processing unit 2 executes the test module 42 and reads the test function parameters of the test module 42, and executes the test command to be executed in the test module 42 according to the test function parameters. In other words, the first bit value of the execution parameter represents that the test program code in the test module 42 is to be executed, in the embodiment, the first bit value of "1" is True, but not limited thereto, so that when the processing unit 2 reads that the execution parameter is "1", the processing unit 2 directly executes the test module 42 and reads the test function parameter of the test module 42, and then executes the step (D) or the step (E) according to the test function parameter.
In this embodiment, the testing module 42 is a testing program code, and the testing function parameter is a setting value preset in the testing module 42 manually, the testing function parameter is set by performing the boot-up operation through the server motherboard 1 and entering a field corresponding to the testing function parameter in the function field setting Menu (bios setup Menu) in the parameter setting module 43 of the bios unit 4, so as to set and store the setting value required by the testing function parameter, for example: the user first enters the field corresponding to the execution parameter and sets the setting value required by the execution parameter in the function field setting Menu (BIOS Setup Menu) of the basic input/output unit 4, then enters the field corresponding to the test function parameter and sets the setting value required by the test function parameter, and finally completes the storage, which is not described herein again.
Finally, if the step (C) determines yes, in the step (D), the processing unit 2 executes the first boot test mode and transmits a first boot test instruction to the platform path controller 3, and the platform path controller 3 starts a warm restart operation when receiving the first boot test instruction. If the step (C) is judged as no, it represents that the test function parameter is a second test bit value, and in the step (E), the processing unit 2 executes the second boot test mode and transmits a second boot test instruction to the platform path controller 3, and the platform path controller 3 starts a full restart operation when receiving the second boot test instruction.
In the embodiment, during the Warm restart (Warm reset/Soft reset) operation, a power shutdown (DC cycling) is not required and an Operating System (OS) is not required to be entered; during the execution of the full restart (Fullreset/Power cycle reset), the Power-off (DC cycling) process is performed without entering the Operating System (OS), but not limited thereto. In detail, in the step (C), when the processing unit 2 determines that the read test function parameter of the test module 42 is the first test bit value, and in the step (D), the first boot test mode in the test module 42 is executed, and the first boot test instruction is generated and transmitted to the platform path controller 3, so that the platform path controller 3 starts the warm restart operation; if the step (C) is performed, the processing unit 2 determines that the read test function parameter of the test module 42 is not the first test bit value, and then the test function parameter is the second test bit value, and in the step (E), the second boot test mode in the test module 42 is executed, and the second boot test instruction is generated and transmitted to the platform path controller 3, so that the platform path controller 3 starts the full restart operation. In this embodiment, the Warm-restart operation is a Warm-restart cycle test program (Warm reset cycle/Soft reset cycle), and the Full-restart operation is a Full-restart cycle test program (Full reset/Power cycle reset), that is, when the Warm-restart operation is started, the Warm-restart operation is performed cyclically according to the built-in test times (Warm reset/Soft reset); when the full restart operation is started, the built-in test times are cycled to execute the full restart test program (Fullreset/Power cycle reset).
In this embodiment, the test function parameter has preset the states of only the first test bit value (1) and the second test bit value (0), such as: the first test bit value (1) is a first test state, and the second test bit value (0) is a second test state, so that the processing unit 2 can read the test function parameter of the test module 42 only by one of the first test bit value (1) and the second test bit value (0), but not limited thereto, and can also be performed by determining whether there is a flag state.
In the step (B), the processing unit 2 reads the execution parameter built in the execution module 41 and determines whether the execution parameter is the first bit value, if so, in the step (C), the processing unit 2 directly executes the test module 42 to directly perform the test operation, and through the step (C), the processing unit 2 reads the testing function parameter and determines whether the read testing function parameter is the first testing bit value or the second testing bit value, so that the server motherboard 1 can start the warm-boot operation or the full-boot operation, thereby effectively improving the problem that the conventional server motherboard 1 needs to enter the Operating System (OS) to complete the test verification after performing the boot test operation each time, and the peripheral device with an Operating System (OS) is not required to be connected with the server mainboard 1 externally, so that the time is effectively saved and the test efficiency is good.
It is to be noted that the stage path controller 3 has an input/output control port (not shown). In the step (D), the processing unit 2 transmits the first boot test command to the platform path controller 3 to enable the input/output control port of the platform path controller 3 to be filled with a first reset parameter, and triggers the platform path controller 3 to start the warm restart operation; in the step (E), the processing unit 2 transmits the second boot test command to the platform path controller 3 to enable the input/output control port of the platform path controller 3 to be filled with a second reset parameter, and triggers the platform path controller 3 to start the full reboot operation.
In the embodiment, the io control port is I/O port 0xCF9, the first reset parameter is 0x6, and the second reset parameter is 0xE, but not limited thereto. Further, in the step (D), the first boot test command transmitted by the processing unit 2 fills the address of the I/O port 0xCF9 of the platform path controller 3 with the first reset parameter (0x6), so as to trigger the platform path controller 3 to initiate the warm restart operation; in step (E), the second boot test command sent by the processing unit 2 fills the address of the I/O port 0xCF9 of the platform path controller 3 with the second reset parameter (0xE), which triggers the platform path controller 3 to initiate the full restart operation.
In summary, in the server motherboard testing method of the present invention, in the step (B), the processing unit 2 reads the execution parameter built in the execution module 41 and determines whether the execution parameter is the first bit value, if yes, in the step (C), the processing unit 2 directly executes the testing module 42, so as to directly perform the testing operation, thereby effectively improving the problem that the conventional server motherboard 1 needs to enter the Operating System (OS) to complete the testing verification after performing the boot testing operation each time, and the server motherboard 1 does not need to be connected to the peripheral device having the Operating System (OS) in a troublesome manner, effectively saving time and achieving good testing efficiency.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (7)

1. A server mainboard test method is applied to a server mainboard, the server mainboard comprises a processing unit, a platform path controller connected with the processing unit and a basic input and output unit connected with the platform path controller, the basic input and output unit comprises an execution module and a test module, the test module has a test function parameter, a first start-up test mode and a second start-up test mode, the server mainboard test method is characterized by comprising the following steps:
(A) the server mainboard is started to carry out a starting action, and the processing unit executes the execution module of the basic input and output unit through the platform path controller;
(B) when the processing unit executes the execution module of the basic input and output unit and reads an execution parameter built in the execution module, the processing unit judges whether the read execution parameter is a first bit value, if not, the processing unit continues to execute the execution module and finishes the starting action;
(C) if the step (B) is judged to be yes, the processing unit directly executes the test module and reads the test function parameter of the test module, and judges whether the read test function parameter is a first test bit value;
(D) if the step (C) judges that the operation is yes, the processing unit executes the first starting test mode and transmits a first starting test instruction to the platform path controller, and the platform path controller starts a warm restart operation when receiving the first starting test instruction;
(E) if the step (C) judges no, the testing function parameter is represented as a second testing bit value, the processing unit executes the second starting-up testing mode and transmits a second starting-up testing instruction to the platform path controller, and the platform path controller starts a full restart operation when receiving the second starting-up testing instruction.
2. The method according to claim 1, wherein in the step (D), a power-off procedure is not performed and an operating system is not required to be entered during the warm-restart operation; in step (E), the power-off procedure is performed without entering the operating system during the execution of the full reboot operation.
3. The method according to claim 1, wherein the platform path controller has an I/O control port, and in the step (D), the processing unit transmits the first boot test command to the platform path controller to enable the I/O control port of the platform path controller to be filled with a first reset parameter and trigger the platform path controller to start the warm restart operation; in the step (E), the processing unit transmits the second boot test command to the platform path controller to enable the input/output control port of the platform path controller to be filled with a second reset parameter, and triggers the platform path controller to start the full reboot operation.
4. The method as claimed in claim 3, wherein the I/O control port is I/Oport 0xCF9, the first reset parameter is 0x6, the second reset parameter is 0xE, in the step (D), the first boot test command transmitted by the processing unit fills 0x6 in the address of I/O port 0xCF9 of the platform path controller to trigger the platform path controller to start the warm operation, in the step (E), the second boot test command transmitted by the processing unit fills 0xE in the address of I/O port 0xCF9 of the platform path controller to trigger the platform path controller to start the full restart operation.
5. The method of claim 1, wherein in the step (B), the processing unit reads the execution parameter embedded in the execution module when executing to a DXE phase of the execution module, and the processing unit determines whether the read execution parameter is the first bit value.
6. The method as claimed in claim 1, wherein in the step (D), the warm reboot operation is a warm reboot cycle test procedure, and in the step (E), the full reboot operation is a full reboot cycle test procedure.
7. The method as claimed in claim 1, wherein the BIOS further comprises a parameter setting module, and the setting of the execution parameter and the test function parameter is performed by the server motherboard performing the boot-up operation and entering a function field setting menu of the parameter setting module of the BIOS to set the execution parameter and the test function parameter.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1983179A (en) * 2005-12-15 2007-06-20 英业达股份有限公司 System and method for correcting fault of turn-on self-test
US7369958B1 (en) * 2007-02-19 2008-05-06 Inventec Corporation System and method for setting motherboard testing procedures
CN103186439A (en) * 2011-12-27 2013-07-03 鸿富锦精密工业（深圳）有限公司 Server test system and server stability test method
CN107132468A (en) * 2016-02-26 2017-09-05 富泰华工业（深圳）有限公司 Mainboard test device and method of testing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1983179A (en) * 2005-12-15 2007-06-20 英业达股份有限公司 System and method for correcting fault of turn-on self-test
US7369958B1 (en) * 2007-02-19 2008-05-06 Inventec Corporation System and method for setting motherboard testing procedures
CN103186439A (en) * 2011-12-27 2013-07-03 鸿富锦精密工业（深圳）有限公司 Server test system and server stability test method
CN107132468A (en) * 2016-02-26 2017-09-05 富泰华工业（深圳）有限公司 Mainboard test device and method of testing

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