CN111180550A - Preparation method of N-type monocrystalline silicon wafer - Google Patents
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- 229910021421 monocrystalline silicon Inorganic materials 0.000 title claims abstract description 41
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 76
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 76
- 239000010703 silicon Substances 0.000 claims abstract description 76
- 238000005245 sintering Methods 0.000 claims abstract description 26
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 16
- 238000004140 cleaning Methods 0.000 claims abstract description 16
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 16
- 239000003513 alkali Substances 0.000 claims abstract description 13
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000002161 passivation Methods 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims abstract description 10
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 6
- 239000005388 borosilicate glass Substances 0.000 claims abstract description 6
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000007747 plating Methods 0.000 claims abstract description 6
- 229910052709 silver Inorganic materials 0.000 claims abstract description 6
- 239000004332 silver Substances 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 238000007639 printing Methods 0.000 claims abstract description 3
- 238000002310 reflectometry Methods 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 20
- 238000001020 plasma etching Methods 0.000 claims description 20
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 16
- 239000000243 solution Substances 0.000 claims description 14
- 239000011259 mixed solution Substances 0.000 claims description 11
- 239000003795 chemical substances by application Substances 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 10
- 239000000654 additive Substances 0.000 claims description 9
- 230000000996 additive effect Effects 0.000 claims description 9
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 8
- 210000002268 wool Anatomy 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 239000012535 impurity Substances 0.000 claims description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 239000007864 aqueous solution Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 9
- 235000012431 wafers Nutrition 0.000 abstract description 74
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 27
- 210000004027 cell Anatomy 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 3
- 230000004075 alteration Effects 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 210000002858 crystal cell Anatomy 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a preparation method of an N-type monocrystalline silicon wafer, which comprises the following steps: selecting an N-type monocrystalline silicon wafer, and performing alkali texturing on the silicon wafer to form a pyramid-shaped anti-reflection textured surface on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer; performing secondary texturing on the antireflection textured surface; cleaning the secondary suede surface; b diffusion is carried out on the silicon chip, and a P-type layer is formed on the surface of the silicon chip; removing PN junctions at the edge of the silicon wafer; removing borosilicate glass on the front side of the silicon wafer; depositing an aluminum oxide passivation layer on the back of the silicon wafer; plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; printing silver grid lines on the front side and the back side of the silicon wafer; and (4) high-temperature rapid sintering. The preparation method can meet the requirements of silicon wafers with different thicknesses.
Description
Technical Field
The invention relates to a preparation method of a silicon wafer, in particular to a preparation method of an N-type monocrystalline silicon wafer.
Background
In recent years, the requirements of items such as leaders and supermarkets on the battery efficiency are higher and higher, and in order to further improve the market share of the monocrystalline silicon battery; the efficiency of the single crystal cell is increasing, wherein the improvement of the utilization rate of sunlight and the reduction of the reflectivity of the cell are one of the key factors for improving the efficiency of the cell. The invention further optimizes the texture surface structure on the basis of the texture surface structure of the alkali texture gold-made pyramid, reduces the reflectivity of the surface of a silicon wafer and increases the utilization rate of light.
Disclosure of Invention
The invention aims to provide a preparation method of an N-type monocrystalline silicon wafer, which can meet the requirements of silicon wafers with different thicknesses.
The above object of the present invention is achieved by the following technical solutions: a preparation method of an N-type monocrystalline silicon wafer comprises the following steps:
the method comprises the following steps: selecting an N-type monocrystalline silicon wafer, and performing alkali texturing on the silicon wafer to form a pyramid-shaped anti-reflection textured surface on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 10% -18%;
step two: performing secondary texturing on the anti-reflection textured surface, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 5% -9% after the secondary texturing;
step three: cleaning the secondary texturing surface, removing a silicon surface damage layer and impurities caused by secondary texturing, repairing a nano texturing surface formed by RIE, controlling the size of the nano texturing surface to be 300-600nm, and controlling the reflectivity of the anti-reflection texturing surface after cleaning to be 8-16% in the full-wave band of 300-1200 nm;
the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer, wherein the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer;
step four: b diffusion is carried out on the silicon chip, and a P-type layer is formed on the surface of the silicon chip;
step five: removing PN junctions at the edge of the silicon wafer;
step six: removing borosilicate glass on the front side of the silicon wafer;
step seven: depositing an aluminum oxide passivation layer on the back of the silicon wafer;
step eight: plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; the reflectivity range of the front surface of the silicon chip within the full-wave band 300-1200nm is 4% -9%;
step nine: printing silver grid lines on the front side and the back side of the silicon wafer;
step ten, high-temperature rapid sintering: and sintering the printed silicon wafer in a sintering furnace.
In the first step, a texturing agent for alkali texturing is a KOH aqueous solution with the volume ratio of 2% -3%, the temperature is 80-85 ℃, and the texturing time is 300-600 s; or the alkali wool making agent is a mixed solution of 2-3% of KOH by volume ratio, 0.5-0.7% of wool making additive by volume ratio and the balance of water.
In the second step, the second texturing is performed on the antireflection texture surface by using an RIE (reactive ion etching).
In the third step, the secondary suede surface is cleaned by adopting a BOE solution, wherein the BOE is a mixed solution of hydrofluoric acid and ammonium fluoride, the volume ratio of the hydrofluoric acid to the ammonium fluoride in the BOE solution is 1:6 or 1:3, the BOE accounts for 18% in the BOE solution, and H is higher than H2O2The volume ratio of (A) is 32%, the rest is water, and the cleaning time is 1100-1500 s.
In the fourth step, the silicon wafer is placed in a furnace tube at 800-1000 ℃ for boron diffusion, and the diffusion time is 5-50 min.
In the fifth step, the PN junction at the edge of the silicon wafer is removed by methods such as plasma etching, laser edge etching or chemical corrosion.
In the seventh step, an ALD method (ALD is atomic layer deposition) or a PECVD method (PECVD is plasma enhanced chemical vapor deposition) is adopted to deposit the aluminum oxide passivation layer on the back of the silicon wafer; the film thickness of the back side aluminum oxide passivation layer ranges from 4nm to 12 nm.
In the eighth step, the film thickness of the front silicon nitride reflecting film is 75-90 nm; the film thickness of the back silicon nitride reflecting film is 100-130 nm.
In the invention, in the thirteenth step, the sintering temperature is: the sintering time is 29-31 seconds at 750-800 ℃.
Compared with the prior art, the invention has the following remarkable beneficial effects:
in the present stage, the monocrystalline silicon wafer is generally subjected to alkali texturing to form a pyramid-shaped antireflection textured surface, the size of the textured surface is 2-5um, the reflectivity (full-wave band 300-1200nm) range is 10% -18%, the traditional monocrystalline alkali texturing technology is difficult to further optimize the reflectivity of the cell, the reflectivity is reduced, and the short-circuit current of the cell can be further improved.
Detailed Description
Example one
A preparation method of an N-type monocrystalline silicon wafer comprises the following steps:
the method comprises the following steps: selecting an N-type monocrystalline silicon wafer, and carrying out alkali texturing on the silicon wafer, wherein a texturing agent is a mixed solution of 2% by volume of KOH, 0.5% by volume of a texturing additive and the balance of water, the texturing additive is purchased directly from the market, the temperature is 80 ℃, and the texturing time is 600s, so that a pyramid-shaped antireflection textured surface is formed on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer, and the reflectivity of the antireflection textured surface in the full wave band of 300-1200nm is 10-18%;
the texturing agent in the first step can be added with no texturing additive, and at the moment, the texturing agent directly adopts 2-3% KOH aqueous solution by volume ratio.
Step two: performing secondary texturing on the anti-reflection textured surface by adopting an RIE (reactive ion etching), wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is between 5 and 9 percent after the secondary texturing;
step three: cleaning the secondary suede by adopting a BOE solution, wherein the BOE is a buffer oxide etching solution which is a mixed solution of hydrofluoric acid and ammonium fluoride, the volume ratio of the hydrofluoric acid to the ammonium fluoride in the mixed solution is 1:6, the BOE accounts for 18% in the BOE solution, and H is added2O2The volume ratio of the silicon surface anti-reflection suede is 32%, the balance is water, the cleaning time is 1100s, a silicon surface damage layer and impurities caused by plasma etching are removed, the nano suede formed by RIE is repaired, the size of the nano suede is controlled to be 300-600nm, and the reflectivity of the anti-reflection suede in the full-wave band of 300-1200nm is 8% -16% after cleaning;
the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer, wherein the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer;
step four: placing the silicon wafer in a furnace tube at 800 ℃ for boron diffusion for 50min to form a P-type layer on the surface of the silicon wafer;
step five: removing PN junctions on the edge of the silicon wafer by adopting a plasma etching method;
step six: removing borosilicate glass on the front side of the silicon wafer;
step seven: depositing an aluminum oxide passivation layer on the back of the silicon wafer by using an ALD method (ALD); the thickness of the back side aluminum oxide passivation layer is 4 nm;
step eight: plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; the film thickness of the front silicon nitride reflecting film is 75nm, and the film thickness of the back silicon nitride reflecting film is 100 nm; the reflectivity range of the front surface of the silicon chip within the full-wave band 300-1200nm is 4% -9%;
step nine: screen printing silver grid lines on the front side and the back side of the silicon wafer;
step ten, high-temperature rapid sintering: and (3) placing the printed silicon wafer into a sintering furnace for sintering, wherein the sintering temperature is as follows: the sintering time was 29 seconds at 750 ℃.
Example two
A preparation method of an N-type monocrystalline silicon wafer comprises the following steps:
the method comprises the following steps: selecting an N-type monocrystalline silicon wafer, and performing alkali texturing on the silicon wafer, wherein a texturing agent is a KOH (potassium hydroxide) aqueous solution with the volume ratio of 2.5%, the temperature is 82 ℃, and the texturing time is 450s, so that a pyramid-shaped anti-reflection textured surface is formed on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer, and the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 10-18%;
the texturing agent in the first step can also adopt a mixed solution of 2-3% of KOH by volume ratio, 0.5-0.7% of texturing additive by volume ratio and the balance of water, and the texturing additive is directly purchased from the market.
Step two: performing secondary texturing on the anti-reflection textured surface by adopting an RIE (reactive ion etching) method, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 5% -9% after the secondary texturing;
step three: cleaning the secondary suede surface by adopting a BOE solution, wherein the volume ratio of hydrofluoric acid to ammonium fluoride in the mixed solution is 1:3, the volume ratio of BOE in the BOE solution is 18%, and H is2O2The volume ratio of the silicon surface anti-reflection suede is 32%, the balance of water is used, the cleaning time is 1300s, a silicon surface damage layer and impurities caused by plasma etching are removed, the nano suede formed by RIE is repaired, the size of the nano suede is controlled to be 300-600nm, and the reflectivity of the anti-reflection suede in the full-wave band of 300-1200nm is 8% -16% after cleaning;
the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer, wherein the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer;
step four: placing the silicon wafer in a furnace tube at 900 ℃ for boron diffusion for 30min to form a P-type layer on the surface of the silicon wafer;
step five: removing PN junctions at the edge of the silicon wafer by adopting a laser edge etching method;
step six: removing borosilicate glass on the front side of the silicon wafer;
step seven: depositing an aluminum oxide passivation layer on the back of the silicon wafer by adopting a PECVD method; the film thickness of the back side aluminum oxide passivation layer is 8 nm;
step eight: plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; the film thickness of the front silicon nitride reflecting film is 82nm, and the film thickness of the back silicon nitride reflecting film is 115 nm; the reflectivity range of the front surface of the silicon chip within the full-wave band 300-1200nm is 4% -9%;
step nine: screen printing silver grid lines on the front side and the back side of the silicon wafer;
step ten, high-temperature rapid sintering: and (3) placing the printed silicon wafer into a sintering furnace for sintering, wherein the sintering temperature is as follows: 780 ℃ and the sintering time is 30 seconds.
EXAMPLE III
A preparation method of an N-type monocrystalline silicon wafer comprises the following steps:
the method comprises the following steps: selecting an N-type monocrystalline silicon wafer, and carrying out alkali texturing on the silicon wafer, wherein a texturing agent is a mixed solution of 3% of KOH (potassium hydroxide) in volume ratio, 0.7% of texturing additive in volume ratio and the balance of water, the texturing additive is purchased directly from the market, the temperature is 85 ℃, and the texturing time is 600s, so that a pyramid-shaped antireflection textured surface is formed on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer, and the reflectivity of the antireflection textured surface in the full waveband of 300-1200nm is 10-18%;
step two: performing secondary texturing on the anti-reflection textured surface by adopting an RIE (reactive ion etching) method, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 5% -9% after the secondary texturing;
step three: cleaning the secondary suede surface by adopting a BOE solution, wherein the volume ratio of hydrofluoric acid to ammonium fluoride in the mixed solution is 1:6, the volume ratio of BOE in the BOE solution is 18%, and H is2O2The volume ratio of the silicon surface anti-reflection suede is 32%, the balance of water is, the cleaning time is 1500s, a silicon surface damage layer and impurities caused by plasma etching are removed, the nano suede formed by RIE is repaired, the size of the nano suede is controlled to be 300-600nm, and the reflectivity of the anti-reflection suede in the full-wave band of 300-1200nm is 8% -16% after cleaning;
the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer, wherein the first step, the second step and the third step are carried out on the same surface of the N-type monocrystalline silicon wafer;
step four: placing the silicon wafer in a furnace tube at 1000 ℃ for boron diffusion for 5min to form a P-type layer on the surface of the silicon wafer;
step five: removing PN junctions at the edge of the silicon wafer by adopting a chemical corrosion method;
step six: removing borosilicate glass on the front side of the silicon wafer;
step seven: depositing an aluminum oxide passivation layer on the back of the silicon wafer by an ALD method; the thickness of the back side aluminum oxide passivation layer is 12 nm;
step eight: plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; the film thickness of the front silicon nitride reflecting film is 90nm, and the film thickness of the back silicon nitride reflecting film is 130 nm; the reflectivity range of the front surface of the silicon chip within the full-wave band 300-1200nm is 4% -9%;
step nine: screen printing silver grid lines on the front side and the back side of the silicon wafer;
step ten, high-temperature rapid sintering: and (3) placing the printed silicon wafer into a sintering furnace for sintering, wherein the sintering temperature is as follows: the sintering time was 29 seconds at 800 ℃.
The above-described embodiments of the present invention are not intended to limit the scope of the present invention, and the embodiments of the present invention are not limited thereto, and various other modifications, substitutions and alterations can be made to the above-described structure of the present invention without departing from the basic technical concept of the present invention as described above, according to the common technical knowledge and conventional means in the field of the present invention.
Claims (10)
1. A preparation method of an N-type monocrystalline silicon wafer comprises the following steps:
the method comprises the following steps: selecting an N-type monocrystalline silicon wafer, and performing alkali texturing on the silicon wafer to form a pyramid-shaped anti-reflection textured surface on the front and back surfaces of the substrate of the N-type monocrystalline silicon wafer, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 10% -18%;
step two: performing secondary texturing on the anti-reflection textured surface, wherein the reflectivity of the anti-reflection textured surface in the full-wave band of 300-1200nm is 5% -9% after the secondary texturing;
step three: cleaning the secondary texturing surface, removing a silicon surface damage layer and impurities caused by secondary texturing, repairing a nano texturing surface formed by RIE, controlling the size of the nano texturing surface to be 300-600nm, and controlling the reflectivity of the anti-reflection texturing surface after cleaning to be 8-16% in the full-wave band of 300-1200 nm;
step four: b diffusion is carried out on the silicon chip, and a P-type layer is formed on the surface of the silicon chip;
step five: removing PN junctions at the edge of the silicon wafer;
step six: removing borosilicate glass on the front side of the silicon wafer;
step seven: depositing an aluminum oxide passivation layer on the back of the silicon wafer;
step eight: plating silicon nitride reflecting films on the front side and the back side of the silicon wafer; the reflectivity range of the front surface of the silicon chip within the full-wave band 300-1200nm is 4% -9%;
step nine: printing silver grid lines on the front side and the back side of the silicon wafer;
step ten, high-temperature rapid sintering: and sintering the printed silicon wafer in a sintering furnace.
2. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the first step, the alkali wool making agent is 2-3% KOH aqueous solution by volume ratio, the temperature is 80-85 ℃, and the wool making time is 300-600 s; or the alkali wool making agent is a mixed solution of 2-3% of KOH by volume ratio, 0.5-0.7% of wool making additive by volume ratio and the balance of water.
3. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: and in the second step, secondary texturing is carried out on the antireflection suede surface by adopting an RIE method.
4. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the third step, the secondary suede surface is cleaned by adopting a BOE solution, wherein the BOE is a mixed solution of hydrofluoric acid and ammonium fluoride, the volume ratio of the hydrofluoric acid to the ammonium fluoride in the BOE solution is 1:6 or 1:3, the BOE accounts for 18% in the BOE solution, and H is higher than H2O2The volume ratio of (A) is 32%, the rest is water, and the cleaning time is 1100-1500 s.
5. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: and in the fourth step, the silicon wafer is placed in a furnace tube at 800-1000 ℃ for boron diffusion, wherein the diffusion time is 5-50 min.
6. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: and in the fifth step, removing the PN junction at the edge of the silicon wafer by adopting methods such as plasma etching, laser edge etching or chemical corrosion.
7. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the seventh step, an ALD method or a PECVD method is adopted to deposit an aluminum oxide passivation layer on the back of the silicon wafer; the film thickness of the back side aluminum oxide passivation layer ranges from 4nm to 12 nm.
8. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the eighth step, the film thickness of the front silicon nitride reflecting film is 75-90 nm.
9. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the eighth step, the thickness of the back silicon nitride reflecting film is 100-130 nm.
10. The method for producing an N-type single crystal silicon wafer according to claim 1, characterized in that: in the thirteenth step, the sintering temperature is as follows: the sintering time is 29-31 seconds at 750-800 ℃.
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| CN201911371929.4A CN111180550A (en) | 2019-12-27 | 2019-12-27 | Preparation method of N-type monocrystalline silicon wafer |
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