CN111158963A - Server firmware redundancy starting method and server - Google Patents
Server firmware redundancy starting method and server Download PDFInfo
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- CN111158963A CN111158963A CN201911386048.XA CN201911386048A CN111158963A CN 111158963 A CN111158963 A CN 111158963A CN 201911386048 A CN201911386048 A CN 201911386048A CN 111158963 A CN111158963 A CN 111158963A
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
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Abstract
The invention provides a server firmware redundancy starting method, which comprises the following steps: responding to system power-on, connecting and conducting a server firmware and a main flash memory to enable the firmware to read configuration information from the main flash memory for starting, and monitoring a starting signal of the firmware through a watchdog; responding to the starting failure of the firmware, the watchdog is overflowed in time-out mode, and responding to the overflow of the watchdog, the firmware is disconnected with the main flash memory and connected with the standby flash memory; the firmware resets and reads configuration information from the spare flash memory for starting. The invention can greatly improve the reliability of the single board and improve the applicability of the product.
Description
Technical Field
The present invention relates to the field of computers, and more particularly, to a server firmware redundancy starting method and a server.
Background
Current white board switches require either a bmc (baseboard Manager controller) system or an open source OPENBMC system, both of which are hardware systems on a baseboard management controller management control board. In order to ensure the reliability and stability of the system, the white board switch needs to backup the BMC (or OPENPC) system, and simultaneously considers the influence degree when the BMC system is abnormal and the power consumption and cost of the single board.
Because the BMC system is a management hardware system, and it is necessary to manage and control hardware on a board during long-time operation of the system, which is very important, the system needs to be backed up in an application of a switch or other important products, a recovery mechanism is required to be unable to hang up when an abnormality occurs in the system, a conventional hot backup system uses two BMC chips as a master and a slave, and this application power consumption is large and one more BMC leads to an increase in board cost.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method for starting a server firmware redundancy, so as to improve reliability of a board.
Based on the above object, an aspect of the embodiments of the present invention provides a method for starting redundancy of a server firmware, including the following steps:
responding to system power-on, connecting and conducting a server firmware and a main flash memory to enable the firmware to read configuration information from the main flash memory for starting, and monitoring a starting signal of the firmware through a watchdog;
responding to the starting failure of the firmware, the watchdog is overflowed in time-out mode, and responding to the overflow of the watchdog, the firmware is disconnected with the main flash memory and connected with the standby flash memory;
the firmware resets and reads configuration information from the spare flash memory for starting.
In some embodiments, the configuration information includes network configuration, user configuration, and log information.
In some embodiments, the watchdog timeout overflows in response to the firmware boot failure, and the firmware disconnecting from the primary flash memory and connecting to the spare flash memory in response to the watchdog overflow comprises:
and responding to the overflow of the watchdog, and realizing the disconnection between the firmware and the main flash memory and the connection and conduction between the firmware and the standby flash memory through an alternative device.
In some embodiments, further comprising:
after the firmware is normally started, the firmware outputs a signal to the alternative device so that the alternative device does not output the signal, and the firmware controls the gating of the main flash memory and the standby flash memory.
In some embodiments, further comprising:
after the firmware is normally started, the configuration information in the flash memory which enables the firmware to be successfully started is written into another flash memory, and the configuration information is monitored and written into the flash memory which enables the firmware to be successfully started in the running process;
the firmware synchronizes the configuration information in the flash memory which enables the firmware to start successfully to the other flash memory.
In some embodiments, the watchdog comprises a hardware watchdog and a software watchdog, wherein for the software watchdog, a timing watchdog feeding interval of the firmware is defined according to a starting time length of the firmware, and an overflow time of the watchdog is set through a counter.
In some embodiments, the server firmware includes BMC, CPLD, BIOS.
Another aspect of embodiments of the present invention provides a server comprising firmware, a primary flash memory, a spare flash memory, a watchdog device, and an alternative device, wherein,
the firmware is configured to output a watchdog signal to the watchdog device and connected to the primary flash memory and the backup flash memory to be booted from either of the primary flash memory and the backup flash memory;
the watchdog outputs an overflow signal to the alternative device in response to the firmware boot failure to cause the alternative device to switch between gating the primary flash memory and gating the spare flash memory.
In some embodiments, the firmware includes BMC, CPLD, BIOS.
In some embodiments, the firmware is configured to output a signal to the alternative device to make it no output after normal startup, and to control the gating of the main flash memory and the spare flash memory by itself.
The invention has the following beneficial technical effects: the server firmware redundancy starting method provided by the embodiment of the invention comprises two storage systems, and the watchdog chip is used for controlling whether to switch the main storage system and the standby storage system, so that the reliability of the single board can be greatly improved, the state of the single board can be reliably monitored, the power consumption and the cost of the single board are slightly increased in the normal operation process, and the applicability of the product is improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a flow chart of a method for redundant boot of server firmware according to the present invention;
FIG. 2 is a diagram of component connections for implementing BMC redundant boot according to an embodiment of the invention;
FIG. 3 is a flow diagram of a BMC redundant boot process according to an embodiment of the invention;
FIG. 4 is a flow chart illustrating a normal operation of the BMC according to the embodiment of the invention;
FIG. 5 is a flowchart illustrating a BMC implementing firmware upgrade according to an embodiment of the invention.
Detailed Description
Embodiments of the present invention are described below. However, it is to be understood that the disclosed embodiments are merely examples and that other embodiments may take various and alternative forms. The figures are not necessarily to scale; certain features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention. As one of ordinary skill in the art will appreciate, various features illustrated and described with reference to any one of the figures may be combined with features illustrated in one or more other figures to produce embodiments that are not explicitly illustrated or described. The combination of features shown provides a representative embodiment for a typical application. However, various combinations and modifications of the features consistent with the teachings of the present invention may be desired for certain specific applications or implementations.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
In view of the above object, an aspect of the embodiments of the present invention provides a method for starting redundancy of server firmware, as shown in fig. 1, including the following steps:
step S101: responding to system power-on, connecting and conducting a server firmware and a main flash memory to enable the firmware to read configuration information from the main flash memory for starting, and monitoring a starting signal of the firmware through a watchdog;
step S102: responding to the starting failure of the firmware, the watchdog is overflowed in time-out mode, and responding to the overflow of the watchdog, the firmware is disconnected with the main flash memory and connected with the standby flash memory;
step S103: the firmware resets and reads configuration information from the spare flash memory for starting.
In some embodiments, the configuration information includes network configuration, user configuration, and log information, among others. In some embodiments, the server firmware comprises a BMC, a CPLD, a BIOS, or any other server firmware that can be booted using the method of the present invention.
In some embodiments, the watchdog timeout overflows in response to the firmware boot failure, and the firmware disconnecting from the primary flash memory and connecting to the spare flash memory in response to the watchdog overflow comprises: and responding to the overflow of the watchdog, and realizing the disconnection between the firmware and the main flash memory and the connection and conduction between the firmware and the standby flash memory through an alternative device. The two-choice device receives an overflow signal of the watchdog device to select to conduct the main flash memory or the standby flash memory, wherein, for example, when the watchdog does not overflow, a signal input to the two-choice device is at a high level, and at the moment, the two-choice device gates the main flash memory to enable the firmware to be started from the main flash memory; when the firmware is failed to start, the watchdog overflows, an overflow signal input to the alternative device is in a low level, and the alternative device gates the standby flash memory at the moment so that the firmware is started from the standby flash memory.
In some embodiments, further comprising: after the firmware is normally started, the firmware outputs a signal to the alternative device so that the alternative device does not output the signal, and the firmware controls the gating of the main flash memory and the standby flash memory.
In an embodiment according to the present invention, as shown in fig. 2, after the BMC is normally started, a signal is output to the/EN terminal of the alternative device to control the alternative device to have no output, and the gating signal of the main/standby flash memory is controlled by the BMC. Wherein the boot process of the BMC may be as shown in fig. 3.
In some embodiments, further comprising: after the firmware is normally started, the configuration information in the flash memory which enables the firmware to be successfully started is flushed and written into another flash memory, and the configuration information is monitored and written into the flash memory which enables the firmware to be successfully started in the running process. In some embodiments, further comprising: the firmware synchronizes the configuration information in the flash memory which enables the firmware to start successfully to the other flash memory.
In some embodiments, the watchdog comprises a hardware watchdog and a software watchdog, wherein for the software watchdog, a timing watchdog feeding interval of the firmware is defined according to a starting time length of the firmware, and an overflow time of the watchdog is set through a counter. If the overflow time is 1.6s for a hardware implemented watchdog, such as an SP705/706 device, the firmware needs to set the dog feeding interval to be less than the 1.6 s. For the software watchdog, a timing dog feeding interval is defined in the software code by the firmware, and the maximum time for the code dog feeding can be set to 5 minutes, for example, which is specifically set according to the starting time of the corresponding firmware (i.e. if the set time is exceeded, the firmware is determined to fail to start); waiting for the completion of firmware starting, taking over by the firmware to send a dog feeding signal at regular time, when the firmware version information in the main flash memory is abnormal, the firmware loading starting fails, the code dog feeding time exceeds 5 minutes and the dog feeding is not carried out, the watchdog can overflow overtime, the watchdog WDO signal is low after the overflow, the watchdog overflows, and at the moment, the alternative device gates the standby flash memory to enable the firmware to be started from the standby flash memory.
In an embodiment according to the present invention, as shown in fig. 4, after the BMC is normally started, a signal is output to the/EN terminal of the alternative device, and the IO signal of the BMC controls the strobe signal of the flash memory. During the operation of the BMC, the log and the related configuration information are recorded in the flash memory that is successfully started, for example, when the BMC is successfully started from the main flash memory (i.e., the main flash memory), the log and the configuration information are written in the main flash memory. The BMC controls the timed gating of the spare flash to synchronize the log and configuration information from the main flash to the spare flash. At this time, if the BMC is down or the watchdog overflows if the watchdog signal cannot be sent out due to other abnormalities, the BMC is restarted according to the starting process again.
In the embodiment of the present invention, as shown in fig. 5, when the BMC performs firmware upgrade, the image file in the main flash memory is upgraded first, the upgrade is completed, the flag is set to change, and the BMC reads the upgraded image file from the main flash memory to restart the flash memory. If the restart is successful, the BMC writes the image file in the main flash memory to the standby flash memory, monitors the log and the configuration information and stores the log and the configuration information in the main flash memory. The standby flash memory is usually in a standby state, and the BMC controls the timed gating of the standby flash memory to synchronize the file information in the main flash memory to the standby flash memory. If the BMC reads the upgraded image file from the main flash memory and fails in restarting, the watchdog controls switching to enable the BMC to read the image file which is not upgraded from the standby flash memory to start, and after starting is completed, the BMC controls the non-upgraded image file in the standby flash memory to be written into the main flash memory in a flashing mode so as to achieve the purpose that the versions of the image files in the main flash memory and the standby flash memory are consistent. Then, the BMC also monitors the log and the configuration information, stores the log and the configuration information in the spare flash memory, and synchronizes the main flash memory at regular time.
Where technically feasible, the technical features listed above for the different embodiments may be combined with each other or changed, added, omitted, etc. to form further embodiments within the scope of the invention.
It can be seen from the foregoing embodiments that the server firmware redundancy starting method provided in the embodiments of the present invention includes two storage systems, and whether to switch the active/standby storage systems is controlled by the watchdog chip, so that the reliability of the board can be greatly improved, the state of the board can be reliably monitored, the power consumption and the cost of the board are rarely increased during normal operation, and the applicability of the product is improved.
In another aspect of the embodiments of the present invention, a server is provided, which includes firmware, a main flash memory, a spare flash memory, a watchdog device, and an alternative device, wherein,
the firmware is configured to output a watchdog signal to the watchdog device and connected to the primary flash memory and the backup flash memory to be booted from either of the primary flash memory and the backup flash memory;
the watchdog outputs an overflow signal to the alternative device in response to the firmware boot failure to cause the alternative device to switch between gating the primary flash memory and gating the spare flash memory.
In some embodiments, the firmware includes BMC, CPLD, BIOS.
In some embodiments, the firmware is configured to output a signal to the alternative device to make it no output after normal startup, and to control the gating of the main flash memory and the spare flash memory by itself.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes in the methods of the above embodiments may be implemented by a computer program, which may be stored in a computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like.
Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions described herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk, an optical disk, or the like.
The above-described embodiments are possible examples of implementations and are presented merely for a clear understanding of the principles of the invention. Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A server firmware redundancy starting method is characterized by comprising the following steps:
responding to system power-on, connecting and conducting a server firmware and a main flash memory to enable the firmware to read configuration information from the main flash memory for starting, and monitoring a starting signal of the firmware through a watchdog;
responding to the starting failure of the firmware, the watchdog is overflowed in time-out mode, and responding to the overflow of the watchdog, the firmware is disconnected with the main flash memory and connected with the standby flash memory;
the firmware resets and reads configuration information from the spare flash memory for starting.
2. The method of claim 1, wherein the configuration information includes network configuration, user configuration, and log information.
3. The method of claim 1, wherein the watchdog times out in response to the firmware boot failure, and wherein the firmware disconnecting from the primary flash memory and connecting to the backup flash memory in response to the watchdog running out comprises:
and responding to the overflow of the watchdog, and realizing the disconnection between the firmware and the main flash memory and the connection and conduction between the firmware and the standby flash memory through an alternative device.
4. The method of claim 3, further comprising:
after the firmware is normally started, the firmware outputs a signal to the alternative device so that the alternative device does not output the signal, and the firmware controls the gating of the main flash memory and the standby flash memory.
5. The method of claim 4, further comprising:
after the firmware is normally started, the configuration information in the flash memory which enables the firmware to be successfully started is written into another flash memory, and the configuration information is monitored and written into the flash memory which enables the firmware to be successfully started in the running process;
the firmware synchronizes the configuration information in the flash memory which enables the firmware to start successfully to the other flash memory.
6. The method of claim 1, wherein the watchdog comprises a hardware watchdog and a software watchdog, wherein for the software watchdog, a timing watchdog feeding interval of the firmware is defined according to a starting duration of the firmware, and an overflow time of the watchdog is set through a counter.
7. The method of claim 1, wherein the server firmware comprises BMC, CPLD, BIOS.
8. A server comprising firmware, a primary flash memory, a backup flash memory, a watchdog device, and an alternative device,
the firmware is configured to output a watchdog signal to the watchdog device and connected to the primary flash memory and the backup flash memory to be booted from either of the primary flash memory and the backup flash memory;
the watchdog is configured to output an overflow signal to the alternative device to cause the alternative device to switch between gating the primary flash memory and gating the spare flash memory in response to the firmware boot failure.
9. The server of claim 8, wherein the firmware comprises a BMC, a CPLD, a BIOS.
10. The server according to claim 8, wherein the firmware is configured to output a signal to the alternative device to make it no output after a normal start, and to control the gating of the main flash memory and the spare flash memory by itself.
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| CN201911386048.XA CN111158963A (en) | 2019-12-29 | 2019-12-29 | Server firmware redundancy starting method and server |
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| CN201911386048.XA CN111158963A (en) | 2019-12-29 | 2019-12-29 | Server firmware redundancy starting method and server |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112181526A (en) * | 2020-09-30 | 2021-01-05 | 锐捷网络股份有限公司 | Equipment starting method and device |
| CN115098304A (en) * | 2022-06-20 | 2022-09-23 | 中国科学院空间应用工程与技术中心 | Embedded system, electronic equipment and software running method |
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2019
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112181526A (en) * | 2020-09-30 | 2021-01-05 | 锐捷网络股份有限公司 | Equipment starting method and device |
| CN115098304A (en) * | 2022-06-20 | 2022-09-23 | 中国科学院空间应用工程与技术中心 | Embedded system, electronic equipment and software running method |
| CN115098304B (en) * | 2022-06-20 | 2022-11-29 | 中国科学院空间应用工程与技术中心 | Embedded system, electronic equipment and software running method |
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Application publication date: 20200515 |