CN111129111A - Semiconductor device, method of manufacturing the same, and integrated circuit - Google Patents
Semiconductor device, method of manufacturing the same, and integrated circuit Download PDFInfo
- Publication number
- CN111129111A CN111129111A CN201911258183.6A CN201911258183A CN111129111A CN 111129111 A CN111129111 A CN 111129111A CN 201911258183 A CN201911258183 A CN 201911258183A CN 111129111 A CN111129111 A CN 111129111A
- Authority
- CN
- China
- Prior art keywords
- layer
- epitaxial layer
- semiconductor device
- substrate
- cathode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 67
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 77
- 239000000758 substrate Substances 0.000 claims abstract description 58
- 230000007704 transition Effects 0.000 claims abstract description 48
- 239000000463 material Substances 0.000 claims abstract description 47
- 150000004767 nitrides Chemical class 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 38
- 230000006911 nucleation Effects 0.000 claims description 35
- 238000010899 nucleation Methods 0.000 claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 34
- 239000002184 metal Substances 0.000 claims description 34
- 239000000203 mixture Substances 0.000 claims description 18
- 238000002161 passivation Methods 0.000 claims description 16
- 229910052782 aluminium Inorganic materials 0.000 claims description 14
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 13
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 13
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 12
- 229910002601 GaN Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052594 sapphire Inorganic materials 0.000 claims description 10
- 239000010980 sapphire Substances 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 150000002739 metals Chemical class 0.000 claims description 7
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 150000002902 organometallic compounds Chemical class 0.000 claims description 3
- 229910001873 dinitrogen Inorganic materials 0.000 claims 1
- 238000005121 nitriding Methods 0.000 claims 1
- 230000007547 defect Effects 0.000 abstract description 7
- 235000012431 wafers Nutrition 0.000 description 19
- 239000013078 crystal Substances 0.000 description 16
- 238000006243 chemical reaction Methods 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 239000010408 film Substances 0.000 description 10
- 229910000510 noble metal Inorganic materials 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 230000033001 locomotion Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000005234 chemical deposition Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000001883 metal evaporation Methods 0.000 description 3
- 238000005036 potential barrier Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- -1 silicon carbide compound Chemical class 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000000859 sublimation Methods 0.000 description 3
- 230000008022 sublimation Effects 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
- VSCWAEJMTAWNJL-UHFFFAOYSA-K aluminium trichloride Chemical compound Cl[Al](Cl)Cl VSCWAEJMTAWNJL-UHFFFAOYSA-K 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 238000010897 surface acoustic wave method Methods 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 241000700605 Viruses Species 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000003574 free electron Substances 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 150000004681 metal hydrides Chemical class 0.000 description 1
- LGRLWUINFJPLSH-UHFFFAOYSA-N methanide Chemical compound [CH3-] LGRLWUINFJPLSH-UHFFFAOYSA-N 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 229910052755 nonmetal Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- RXMRGBVLCSYIBO-UHFFFAOYSA-M tetramethylazanium;iodide Chemical compound [I-].C[N+](C)(C)C RXMRGBVLCSYIBO-UHFFFAOYSA-M 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a semiconductor device, a manufacturing method thereof and an integrated circuit. The semiconductor device comprises a substrate, wherein a nucleating layer made of a nitride material is formed on the substrate, a transition layer is formed on the nucleating layer, an epitaxial layer is formed on the transition layer, and the epitaxial layer is made of a doped aluminum nitride material; the substrate and the epitaxial layer have different lattice constants; the transition layer is used to achieve lattice matching of the epitaxial layer and the substrate material and to reduce stress due to different thermal expansion coefficients. The semiconductor device can meet the requirements of higher temperature, higher voltage and higher power; dislocation defects, wafer warpage and cracks caused by lattice mismatch and stress are reduced or eliminated, so that the performance of the device is improved, and the yield and reliability of products are improved.
Description
Technical Field
The present invention relates to the field of semiconductor devices, and in particular, to a semiconductor device, a method for manufacturing the same, and an integrated circuit.
Background
Semiconductor devices are electronic devices that utilize the special electrical properties of semiconductor materials to perform specific functions, and can be used to generate, control, receive, convert, amplify signals, and perform energy conversion. The semiconductor device comprises a power semiconductor device, and is mainly used for high-power electronic devices in the aspects of electric energy conversion and control circuits of power equipment.
As power semiconductor devices have been developed, limitations have been shown in the fields of high frequency, high temperature and high power, and thus development and research of wide bandgap semiconductor devices have been increasingly focused on by those skilled in the art.
Disclosure of Invention
The invention aims to provide a semiconductor device based on a wide bandgap semiconductor material, a manufacturing method thereof and an integrated circuit.
The invention discloses a semiconductor device, comprising:
a substrate;
the nucleation layer is formed on the surface of the substrate and is made of a nitride material;
the transition layer is formed on the surface of the nucleation layer; and the number of the first and second groups,
the epitaxial layer is formed on the surface of the transition layer and is made of a doped aluminum nitride material;
the epitaxial layer has a lattice constant different from that of the substrate; the transition layer is used to achieve lattice matching of the epitaxial layer and the substrate material and to reduce stress due to different thermal expansion coefficients.
Optionally, the substrate is made of any one of silicon, silicon carbide, or sapphire.
Optionally, the nucleation layer material is aluminum nitride or gallium nitride.
Optionally, the transition layer is made of gallium aluminum nitride.
Optionally, the aluminum composition in the transition layer adjacent to the nucleation layer is less than the aluminum composition adjacent to the epitaxial layer.
Optionally, when the nucleation layer material is aluminum nitride, the aluminum component in the transition layer adjacent to the nucleation layer is 10% -80%; when the nucleating layer is made of gallium nitride, the aluminum component in the transition layer adjacent to the nucleating layer is 0-80%.
Optionally, the semiconductor device includes:
the anode is formed on the surface of the epitaxial layer;
the cathode is formed on the surface of the epitaxial layer;
a passivation layer covering the anode, the cathode, and the epitaxial layer except for the anode and the cathode;
the epitaxial layer is provided with a groove, and the cathode is arranged in the groove.
Optionally, the thickness interval of the substrate is 100um-1000 um; the thickness interval of the epitaxial layer is 20nm-500 nm; the thickness interval of the nucleation layer is 1nm-10 nm; the thickness interval of the transition layer is 0.3um-3 um; the depth interval of the groove is 5nm-20 nm.
The invention also discloses a manufacturing method of the semiconductor device, which comprises the following steps:
providing a substrate;
forming a nucleation layer on a substrate;
a transition layer is made of a nitride material on the nucleation layer;
an epitaxial layer is made of a doped aluminum nitride material on the transition layer;
the epitaxial layer has a lattice constant different from that of the substrate epitaxial layer; the transition layer is used to achieve lattice matching of the epitaxial layer and the substrate material and to reduce stress due to different thermal expansion coefficients.
Optionally, the epitaxial layer is prepared by an aluminum direct nitridation method, a high-nitrogen pressure solution growth method, a hydride vapor phase epitaxy growth method, a metal organic compound chemical vapor deposition method or a physical vapor transport growth method; the step of manufacturing a semiconductor device on the doped aluminum nitride epitaxial layer comprises the following steps:
forming a groove on the epitaxial layer;
forming a cathode in the groove;
forming an anode on the epitaxial layer;
covering a passivation layer on the cathode and the anode;
the passivation layer on the anode and cathode surfaces is etched to expose the anode and cathode metals. The invention also discloses an integrated circuit, which comprises a wafer and a chip, wherein the chip comprises the semiconductor device.
Compared with a semiconductor device made of gallium nitride and silicon carbide compound semiconductor materials, the power semiconductor device is made of the aluminum nitride compound semiconductor, the aluminum nitride has the forbidden bandwidth larger than that of the gallium nitride and the silicon carbide, and the forbidden bandwidth is respectively 6.2eV (aluminum nitride), 3.44eV (gallium nitride) and 3.25eV (silicon carbide), so that the aluminum nitride based semiconductor device can meet the requirements of higher temperature, higher voltage and higher power. However, the use of aluminum nitride as the epitaxial layer and the substrate causes lattice matching, and also causes defects such as dislocation, wafer warpage, and cracking due to stress caused by temperature change due to a difference in thermal expansion coefficient. The nucleation layer and the transition layer are arranged between the epitaxial layer and the substrate, the nucleation layer provides a seed layer for growth of the transition layer, the transition layer can achieve lattice adaptation of the epitaxial layer and the substrate material, and stress caused by different thermal expansion coefficients is reduced, so that the defects of dislocation, wafer warping, cracking and the like caused by lattice mismatch and different thermal expansion coefficients are reduced or eliminated, the performance of a device is improved, and the yield and reliability of products are improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1 is a schematic structural view of a semiconductor device according to an embodiment of the present invention;
fig. 2 is a schematic structural view of a semiconductor device according to another embodiment of the present invention;
fig. 3 is a schematic structural view of a semiconductor device according to another embodiment of the present invention;
fig. 4 is a schematic structural diagram of a schottky diode according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a Schottky diode cathode disposed in a groove according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of an integrated circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a method for fabricating a cathode of a Schottky diode according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of an embodiment of the present invention with an epitaxial layer grooved structure;
FIG. 9 is a schematic diagram illustrating a method for fabricating an anode of a Schottky diode according to an embodiment of the present invention;
FIG. 10 is a schematic view of a method for fabricating a passivation layer of a Schottky diode according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a schottky diode substrate thinning method according to an embodiment of the invention.
10, a semiconductor device; 11. a substrate; 12. a nucleation layer; 13. a transition layer; 14. an epitaxial layer; 15. a groove; 16. a buffer layer; 17. a cathode; 18. an anode; 19. a passivation layer; 20. carrying a slide; 30. a back metal layer; 40. an integrated circuit; 41. a wafer; 42. a chip; 50. a photomask; 60. photoresist; 61. a cathode metal film layer; 62. an anodic metal film layer; 70. a schottky diode.
Detailed Description
It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present invention may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless otherwise specified, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "plurality" means two or more. The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or combinations thereof may be present or added.
Further, terms of orientation or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, are described based on the orientation or relative positional relationship shown in the drawings, and are only for convenience of simplifying the description of the present invention, and do not indicate that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and may include, for example, fixed connections, removable connections, and integral connections; can be mechanically or electrically connected; either directly or indirectly through intervening media, or through both elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The present invention relates to the field of compound semiconductors and devices. In recent years, devices based on compound semiconductors have been rapidly developed and are increasingly widely used in the fields of illumination, optical communication, power semiconductor devices, and medium-high frequency wireless communication, and the main advantage thereof is a wider forbidden band. The forbidden band widths of the commonly used compound semiconductors are gallium arsenide 1.43eV, indium phosphide 1.35eV, silicon carbide 3.25eV, gallium nitride 3.44eV, gallium oxide 4.8eV, diamond 5.57eV, and aluminum nitride 6.2eV, respectively, as compared with the forbidden band width of silicon 1.12 eV. The wide-bandgap (the forbidden bandwidth is more than 2.3eV) semiconductor has wide application prospect in the aspects of developing high-temperature, high-frequency and high-power microwave devices, radiation-resistant devices, ultraviolet detectors, short-wave light-emitting diodes and the like, and is an electronic device urgently needed in the fields of wireless communication, national defense, new energy, automatic driving and the like. The deep ultraviolet device with the aluminum nitride as the substrate also has important application in the aspect of biomolecule induction, and can be used for a miniature high-efficiency biological virus detector and a sterilizer. In the wave band of 255-280nm, the aluminum nitride high-frequency device can be used for photoetching; from the ultraviolet 400nm waveband, the aluminum nitride based device can be used for a blue light-ultraviolet solid state laser diode, a laser and the like, and can also be applied to a high-density storage system, a satellite communication system and the like. The aluminum nitride material has the maximum energy gap and direct band gap in III-V group compound semiconductors, has excellent piezoelectric performance, and can be widely used for Surface Acoustic Wave (SAW) and Bulk Acoustic Wave (BAW) filters and high-efficiency ultraviolet light emitters. With the progress of the technical fields of aluminum nitride material growth, doping and the like, the aluminum nitride material with excellent characteristics of high thermal conductivity, high resistivity, strong breakdown field, small dielectric coefficient and the like is applied to the fields of high-temperature, high-frequency and high-power semiconductor devices.
The invention is described in detail below with reference to the figures and alternative embodiments.
As shown in fig. 1, the present embodiment discloses a semiconductor device 10, which includes a substrate 11, a nucleation layer 12 formed on the substrate, a transition layer 13 formed on the nucleation layer 12, an epitaxial layer 14 formed on the transition layer 13, and the epitaxial layer 14 made of a doped aluminum nitride material. The substrate 11 is made of any one of silicon, silicon carbide, and sapphire.
The nucleation layer 12 may also be referred to as a seed layer to provide a base layer for growth to ensure the crystal structure and quality of the subsequently grown thin film material, and in particular, the seed layer may ensure the structure and quality of the transition layer 13 and the epitaxial layer 14. The nucleation layer 12 is typically a nitride film, such as aluminum nitride (AlN), gallium nitride (GaN) or other materials, with a thickness of 1-10nm, and can be formed by metal organic chemical deposition (MOCVD) or other methods. The nucleation layer can be manufactured at a lower temperature (600-. The transition layer 13 is made of gallium aluminum nitride (Al)xGa(1-x)N) for reducing or eliminating dislocation defects, and more particularly, for reducing or eliminating dislocation defects by gradually changing the composition of the transition layer material to have a lattice constant close to or equal to that of the aluminum nitride material, thereby achieving lattice adaptation, the transition layer having a thickness of 0.3-3 um. The transition layer with changed composition can also absorb the expansion caused by heatThe difference of expansion coefficients is caused by stress caused by temperature change, thereby dislocation, wafer warpage and crack caused by the stress are achieved.
When aluminum nitride (AlN) is selected as the nucleation layer, AlxGa(1-x)The Al composition x in N gradually increases from the nucleation layer to the epitaxial layer, for example, gradually increases from 20% to 100%. When the Al component reaches 100%, the Ga component becomes zero, and the material component of the transition layer is the same as that of the epitaxial layer (AlN), so that the complete matching of crystal lattices is achieved. The starting component may be 20% or other components, such as 10% to 80% of any number.
Gallium aluminum nitride (Al) when gallium nitride (GaN) is selected as the nucleation layerxGa(1-x)N) the Al composition x gradually increases from the nucleation layer to the epitaxial layer, for example, gradually increases from 0 to 100%. When the composition of Al is zero, the composition of Ga becomes 100%, and the material composition of the transition layer is the same as that of the nucleation layer (GaN), thereby achieving perfect lattice matching. When the Al component reaches 100%, the Ga component becomes zero, and the material component of the transition layer is the same as that of the epitaxial layer (AlN), so that the complete matching of crystal lattices is achieved. The starting composition of the aluminum may be 0% or other compositions, such as any of 0 to 80%.
The composition of Al in the transition layer can be changed in various modes, and can be continuous or stepped. May be through the entire transition layer or may vary only at a certain thickness of the transition layer. The rate of change of composition may be linear or non-linear. Combinations of two or more variations are also possible.
The epitaxial layer 14 is made of n-type aluminum nitride. The thickness of the epitaxial layer is generally between 20nm and 2000nm, and further, the thickness can be controlled between 20nm and 500nm to adapt to the trend of thinning and thinning of semiconductor devices. The doping can be done by implanting oxygen or silicon atoms with a doping concentration of 1013-1021atoms/cm3In the meantime. The doping can be carried out after the aluminum nitride epitaxial layer is manufactured, and the doping can also be carried out simultaneously in the growth process of the aluminum nitride epitaxial layer. For example, in growing single crystal aluminum nitride by metal organic chemical deposition (MOCVD), silicon methide may be added to the reactionAlkane gas (SiH4), Si atoms are introduced into the AlN crystal, forming n-type aluminum nitride.
When silicon, silicon carbide or sapphire is selected as the substrate, the lattice constant of the substrate material is much different from that of aluminum nitride, resulting in lattice mismatch. The lattice constants of these materials are: AlN:3.110A, Si:5.430A, SiC:4.358A, Sapphire: 4.758a, in order to obtain high-quality aluminum nitride crystal quality, this embodiment adds a nucleation layer and a transition layer between the substrate and the epitaxial layer, which can effectively reduce or eliminate dislocation defects caused by lattice mismatch, and even if a material with the largest lattice difference with aluminum nitride, such as silicon, is used as the substrate, the substrate can be well adapted.
In particular, the composition of the transition layer can be varied such that the composition of the lower surface of the transition layer is close to that of the nucleation layer and the composition of the upper surface is close to that of the epitaxial layer, thereby more effectively reducing or eliminating dislocation defects caused by lattice mismatch.
As shown in fig. 2, the present embodiment discloses another semiconductor device 10, which includes a substrate 11, a buffer layer 16 formed on the substrate, an epitaxial layer 14 formed on the buffer layer, and the epitaxial layer 14 made of a doped aluminum nitride material. The substrate 11 is made of silicon, silicon carbide or sapphire.
The buffer layer is made of undoped high-resistance aluminum nitride and has the thickness of 0.2-3 microns.
The epitaxial layer structure is referred to the above embodiments and will not be described herein.
When aluminum nitride or gallium nitride is selected as the substrate 11, as shown in fig. 3, an epitaxial layer 14 of aluminum nitride having a thickness of 20 to 500nm and n-type doping can be directly formed on the substrate because there is no problem of lattice adaptation (lattice constant: AlN:3.110A, GaN: 3.180A).
Of course, a thin aluminum nitride buffer layer with a thickness of 5-50nm may be formed on the substrate, and then an n-type aluminum nitride epitaxial layer may be formed. The buffer layer adopts undoped or low-doped high-resistance aluminum nitride layer.
In combination with the above embodiments, the substrate may be 2, 3, 4, 6 or 8 inches in size and between 100um and 1000um thick. In order to reduce the contact resistance, the epitaxial surface of the aluminum nitride can be highly doped to form an epitaxial layer of n + type aluminum nitride.
On the basis of the four structures, the application of the concept of the present invention to semiconductor devices is further developed by taking schottky diodes as an example.
The schottky diode is a metal-semiconductor device which is made by using noble metal as an anode and an n-type semiconductor as a cathode and utilizing the rectifying property of a potential barrier formed on the contact surface of the noble metal and the n-type semiconductor. Since a large number of electrons exist in the n-type semiconductor and only a very small number of free electrons exist in the noble metal, electrons diffuse from the n-type semiconductor having a high concentration into the noble metal having a low concentration. Since there are no holes in the noble metal, there is no diffusion movement of holes from the noble metal to the n-type semiconductor. As electrons are continuously diffused from the semiconductor to the noble metal, the electron concentration on the surface of the n-type semiconductor is gradually reduced, the surface charge neutrality is destroyed, and a potential barrier is formed, wherein the direction of an electric field of the potential barrier is that the n-type semiconductor points to the noble metal. However, under the action of the electric field, electrons in the noble metal also generate drift motion from the noble metal to the n-type semiconductor, thereby weakening the electric field formed by the diffusion motion. When a space charge region with a certain width is established, electron drift motion caused by an electric field and electron diffusion motion caused by different concentrations reach relative balance, and a Schottky barrier is formed.
As shown in fig. 4, taking the semiconductor device structure shown in fig. 1 as an example for explanation, the schottky diode 70 includes a substrate 11 on which a nucleation layer 12 is formed, a transition layer 13 is formed on the nucleation layer 12, an epitaxial layer 14 is formed on the transition layer 13, and the epitaxial layer 14 is made of a doped aluminum nitride material. The anode 18 and cathode 17 of the schottky diode 70 are formed on the epitaxial layer 14, the anode 18 and cathode 17 are covered with a passivation layer 19, and the passivation layer 19 is etched on the upper surface of the corresponding anode 18 and cathode 17 so that the anode 18 and cathode 17 are electrically connected to other circuits.
The cathode is typically alloyed by a combination of several metals by high temperature annealing to reduce the electrical resistance. These metals include Ti, Al, Ni, Pt, Au or others, and may be a single metal or a combination of metals (typically 2-6), typically deposited layer by layer onto the aluminum nitride epitaxial layer by metal evaporation. For example, the metal layer may consist of 4 metal layers: ti, Al, Ti and Au, wherein the thickness ranges are respectively as follows: 2-25nm,30-300nm,20-100nm and 50-500nm, for example, Ti 25nm, Al50nm, Ti 100nm and Au 250nm can be respectively selected, and the total thickness is 450 nm. Other combinations and thicknesses of the metal layers are possible. The shape of the cathode can be circular, square, rectangular, elliptical or other shapes. The size of the cathode may be 25um to 750um, which is not particularly limited herein.
The anode is generally made of metal with high work function, such as Pt, Ni, Au and Ti. The work functions are respectively 5.65eV,5.15eV,5.1eV and 4.33eV, and the anode and the aluminum nitride epitaxial layer form Schottky contact. The anode can be composed of a layer of metal or 2-4 layers of metal, such as Pt/Au or Ni/Au, with thickness of 10-50nm and 50-250 nm. The shape of the anode can be round, square, rectangular, oval or other shapes. The size of the anode may be 10um to 500um, and is not particularly limited herein.
Further, as shown in fig. 5, the epitaxial layer 14 is provided with a groove 15 corresponding to the position of the cathode 17, the cathode 17 is partially embedded in the groove 15, and the depth of the groove 15 is between 5 and 20 nm. The size and shape of the grooves 15 may be circular, square, rectangular, elliptical or other shapes, as well as the size and shape of the aforementioned cathode. The aluminum nitride is exposed in the air and is easy to oxidize, the contact resistance between the cathode and the epitaxial layer can be increased, so that a groove is formed in the epitaxial layer, the aluminum nitride of the oxidized part can be removed, meanwhile, the contact area between the epitaxial layer and the cathode is increased through the groove, and the contact resistance between the cathode and the epitaxial layer is further reduced. The anode is in non-ohmic contact, and the requirement on contact resistance is not high as that of the cathode, so that the external layer can be provided with a groove or not at the position corresponding to the outside of the anode. Of course, the epitaxial layer may not have a recess in both the cathode and anode portions in order to simplify the manufacturing process and reduce the manufacturing cost.
As shown in fig. 6, the present embodiment discloses an integrated circuit 40. Integrated circuit 40 includes a wafer 41, wafer 41 including a plurality of chips 42. Still taking schottky diode as an example, the substrate material of wafer 41 may be any one of the materials described above: silicon, silicon carbide, sapphire, gallium nitride, aluminum nitride and the like, wherein the size of the wafer is 2-8 inches, and the thickness of the wafer is 100-1000 um. An epitaxial layer of the aluminum nitride material is grown on the substrate. The wafer 41 has a plurality of grids arranged in a matrix, each grid is a chip 42 corresponding to a schottky diode, the chip can be square or rectangular, and the side length range is 200um-5 mm. The anode 18 and the cathode 17 of the schottky diode may be arranged in parallel, or may be arranged diagonally, or may be arranged in other distribution manners, and the size of the electrodes is not limited.
The present embodiment discloses a method for manufacturing the semiconductor device, including the steps of:
forming a nucleation layer on a substrate;
forming a transition layer on the nucleation layer;
forming an epitaxial layer on the transition layer;
the substrate material is any one of silicon, silicon carbide or sapphire; the nucleating layer is made of nitride material; the transition layer is made of gallium aluminum nitride.
The aluminum nitride epitaxial layer may be formed in the following manner.
Direct nitridation of aluminum. First use of Al and N by Taylar and Lenie in 19602And preparing the AlN single crystal by a high-temperature reaction method, and successfully preparing an AlN crystal bar with the diameter of 0.5mm and the length of 30mm and an AlN single crystal sheet with the diameter of 2-3 mm. Schlessre et Al succeeded in producing AlN single-crystal chips having an area of 2 mm by vaporizing metallic Al in an atmosphere of N2 at a reaction temperature of 2100 ℃ for 2 hours.
High nitrogen pressure solution growth method (HNPSG-High nitrogen pressure solution growth). Dissolving N atoms into liquid Al at 1800-2000K, N2When the solution has a high supersaturation degree at a pressure of 2GPa, an AlN single crystal of a wurtzite structure is obtained, but an excessively high supersaturation degree leads to an excessively high growth rate, and the AlN single crystal of a hollow needle-like structure is easily obtained.
Hydride vapor phase epitaxy (HVPE-Hydride vapor phase epitaxix growth). Akasaki and the like firstly propose to prepare AlN single crystals by using an HVPE method, and the main chemical reaction equation is as follows: AlCl3(g) + NH3(g) AlN (g) +3HCl (g) reaction temperature 600-; by modifying the method, NH3 and HCl are used as reactive gases, Ar is used as a carrier gas, firstly, gaseous HCl reacts with metallic Al to generate AICl3, and then the generated AICl3 reacts with NH3 to generate AlN, wherein the main chemical reaction equation is as follows: HCl (g) + Al (l) -AlCl (g), A1Cl (g) + NH3(g) -AlN(s) + HCl (g) + H2 (g). By the above method, AlN wafers with thicknesses of 75um and 20um, 2 inches in diameter, were produced on the SiC substrate and the sapphire substrate, respectively; the HVPE method has the outstanding advantage of high growth speed which can reach 100um/h, which is about 100 times of that of the metal organic vapor deposition method and the molecular beam vapor phase epitaxy method.
Metalorganic Chemical vapor deposition (MOCVD). Metal organic chemical vapor deposition (MOVPE-Metal organic vapor Phase Epitaxy), which is an advanced technique for vapor Phase epitaxial growth by organometallic thermal decomposition, is mainly used for vapor Phase growth of compound semiconductor (III-V, II-vi compound) films. The A1N film is prepared by feeding a vapor of a metal organic compound (e.g., trimethylaluminum) and a gaseous non-metal hydride (NH3) into a reaction chamber using hydrogen gas, and then heating to decompose the compound. The overall reaction is as follows: al (CH3)3+ NH3 ═ AIN +3CH 4. Al (CH3)3 is trimethylaluminum, also known as TMAI. The advantages of this method are: (1) the thickness of the synthesized film at the atomic level, namely the novel nano material film, can be controlled. (2) Can be prepared into a large-area uniform film, and is a typical technology which is easy to industrialize. (3) The pure material growth technology does not use a liquid container and a low-temperature growth technology, so that the pollution source is minimized, and the material purity is improved by one order of magnitude compared with other semiconductor material growth technologies. The drawback of this method is the lack of a technique for real-time in situ detection of the growth process. .
Physical Vapor Transport Growth (PVT-Physical Vapor Transport Growth). The PVT method, also known as Sublimation recondensation (Sublimation recondensation), is the most successful method for growing AlN single crystals. The reaction process is as follows: the AlN powder is heated and sublimated at the bottom of the crucible with high temperature to become gas-phase AlN or Al and N2; however, the device is not suitable for use in a kitchenThen, the gas phase is conveyed to the top of a crucible with lower temperature, and N is added2Recrystallizing in the atmosphere to generate AlN single crystal. The temperature during the reaction is such that the sublimation temperature of AlN is about 1800 deg.C, but in order to obtain a larger growth rate: (>200um/h) and high quality AlN single crystal, the reaction temperature must be higher than 2100 c but lower than 2500 c because the vapor pressure of Al reaches 1 atmosphere.
The nucleation layer is typically formed by metal organic chemical deposition (MOCVD), or other methods described above.
The method for manufacturing the semiconductor device of the present invention is further described below by taking a schottky diode as an example.
As shown in fig. 7, first, a photoresist is coated on the epitaxial layer; then, aligning and exposing by adopting a photomask; after the development is finished, metal deposition is carried out to form a cathode metal film layer 61; and finally, forming a cathode structure by adopting the steps of metal stripping, photoresist removal, cleaning and annealing. The cathode metal layer is typically alloyed by a combination of several metals by high temperature annealing to reduce resistance. The high temperature anneal is performed in a Rapid Thermal Annealing (RTA) furnace, typically at a temperature between 700 ℃ and 900 ℃, typically 800 ℃, in an argon or nitrogen atmosphere for a time between 30 seconds and 90 seconds in order to form an ohmic contact to reduce resistance.
Further, as shown in fig. 8, before the cathode is fabricated, a groove 15 may be etched on the surface of the epitaxial layer 14 of aluminum nitride, and then an electrode may be fabricated on the groove 15. The depth of the groove is between 5 and 20 nm. The size and shape of the groove are the same as those of the cathode, and can be circular, square, rectangular, elliptical or other shapes. Finally, the cathode structure shown in fig. 5 is formed by the steps of metal stripping, photoresist removal, cleaning and annealing.
After the cathode is formed, the formation of the anode on the epitaxial layer is continued.
As shown in fig. 9, the anode is fabricated as follows: first, a photoresist 60 is coated on the epitaxial layer 14 and the cathode; then, the photomask 50 is used for alignment and exposure; after the development is finished, metal deposition is carried out to form an anode metal film layer 62; and finally, forming the anode 18 by adopting the steps of metal stripping, photoresist removal, cleaning and annealing, wherein the anode is usually prepared by depositing the metal on the surface of the aluminum nitride epitaxial layer by layer through metal evaporation.
As shown in fig. 10, after the fabrication of the anode 18 and the cathode 17, a passivation layer 19 is formed thereon to protect the device. The passivation layer 19 may be silicon oxide, silicon nitride or aluminum oxide. The present embodiment is exemplified by silicon nitride. Silicon nitride is typically produced by Plasma Enhanced Chemical Vapor Deposition (PECVD) to a thickness of 20nm to 300 nm. After the passivation layer 19 is laid, etching the passivation layer, and firstly coating photoresist 60 on the passivation layer; then, the photomask 50 is used for alignment and exposure; then developing and removing photoresist; the passivation layers of the anode 18 and cathode regions 17 are etched to finally form the complete schottky diode.
As shown in fig. 11, after the schottky diode is manufactured, if the thickness of the substrate 11 is large, the substrate needs to be thinned. The thinning process comprises the following steps: wafer bonding, thinning/polishing, debonding and wafer cleaning. The wafer bonding is carried out in a special bonding device, and a carrier 20 is bonded with the anode 18 and the cathode 17 of the schottky diode, wherein the carrier 20 can be made of sapphire materials. The thinning is performed in a grinding apparatus, and the thickness of the substrate after thinning is between 50 and 250 um. After thinning, a back metal layer 30 is formed on the substrate; the back side metal layer 30 is typically comprised of one or more metals, such as Ti, TiW, Ni, Ag, Al, Au, and the like. Wherein Ti and TiW are usually used as adhesion layers to prevent the metal from peeling off from the wafer substrate, and the thickness is between 50-500A. The back metal layer 30 is typically deposited layer by layer on the substrate 11 of the wafer by metal evaporation or sputtering. After wafer debonding, the carrier 20 is separated from the schottky diode. After wafer de-bonding and cleaning are completed, the chip is tested, cut, and packaged, which will not be described in detail herein.
It should be noted that, the limitations of the steps involved in the present disclosure are not considered to limit the order of the steps without affecting the implementation of the specific embodiments, and the steps written in the foregoing may be executed first, or executed later, or even executed simultaneously, and as long as the present disclosure can be implemented, all should be considered to belong to the protection scope of the present disclosure.
The foregoing is a more detailed description of the invention in connection with specific alternative embodiments, and the practice of the invention should not be construed as limited to those descriptions. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A semiconductor device, comprising
A substrate;
the nucleation layer is formed on the surface of the substrate and is made of a nitride material;
the transition layer is formed on the surface of the nucleation layer; and the number of the first and second groups,
the epitaxial layer is formed on the surface of the transition layer and is made of a doped aluminum nitride material;
the epitaxial layer has a lattice constant different from that of the substrate; the transition layer is used to achieve lattice matching of the epitaxial layer and the substrate material and to reduce stress due to different thermal expansion coefficients.
2. A semiconductor device according to claim 1, wherein the substrate is made of any one of silicon, silicon carbide, and sapphire.
3. A semiconductor device according to claim 1, wherein the nucleation layer material is aluminum nitride or gallium nitride.
4. The semiconductor device according to claim 1, wherein the transition layer is made of gallium aluminum nitride.
5. A semiconductor device according to claim 4, wherein said transition layer has a composition of aluminum adjacent said intermediate layer that is less than a composition of aluminum adjacent said epitaxial layer.
6. A semiconductor device according to claim 1, wherein the semiconductor device comprises:
the anode is formed on the surface of the epitaxial layer;
the cathode is formed on the surface of the epitaxial layer;
a passivation layer covering the anode, the cathode, and the epitaxial layer except for the anode and the cathode;
the epitaxial layer is provided with a groove, and the cathode is arranged in the groove.
7. A semiconductor device according to claim 6, wherein the substrate has a thickness in the range of 100um to 1000 um; the thickness interval of the epitaxial layer is 20nm-500 nm; the thickness interval of the nucleation layer is 1nm-10 nm; the thickness interval of the transition layer is 0.3um-3 um; the depth interval of the groove is 5nm-20 nm.
8. A method for manufacturing a semiconductor device includes the steps of:
providing a substrate;
forming a nucleation layer on a substrate;
a transition layer is made of a nitride material on the nucleation layer;
an epitaxial layer is made of a doped aluminum nitride material on the transition layer;
the epitaxial layer has a lattice constant different from that of the substrate; the transition layer is used to achieve lattice matching of the epitaxial layer and the substrate material and to reduce stress due to different thermal expansion coefficients.
9. The method for manufacturing a semiconductor device according to claim 8, wherein the epitaxial layer is formed by an aluminum direct nitriding method, a high-nitrogen gas pressure solution growth method, a hydride vapor phase epitaxy growth method, a metal organic compound chemical vapor deposition method, or a physical vapor transport growth method; the step of manufacturing a semiconductor device on the doped aluminum nitride epitaxial layer comprises the following steps:
forming a groove on the epitaxial layer;
forming a cathode in the groove;
forming an anode on the epitaxial layer;
covering a passivation layer on the cathode and the anode;
the passivation layer on the anode and cathode surfaces is etched to expose the anode and cathode metals.
10. An integrated circuit comprising a wafer and a chip, wherein the chip comprises a semiconductor device according to any one of claims 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911258183.6A CN111129111A (en) | 2019-12-10 | 2019-12-10 | Semiconductor device, method of manufacturing the same, and integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911258183.6A CN111129111A (en) | 2019-12-10 | 2019-12-10 | Semiconductor device, method of manufacturing the same, and integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111129111A true CN111129111A (en) | 2020-05-08 |
Family
ID=70498053
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911258183.6A Pending CN111129111A (en) | 2019-12-10 | 2019-12-10 | Semiconductor device, method of manufacturing the same, and integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111129111A (en) |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101345192A (en) * | 2008-07-07 | 2009-01-14 | 中国电子科技集团公司第十三研究所 | Method for growing AlN and AlGaN on InAlN buffer layer |
| CN102456721A (en) * | 2010-10-17 | 2012-05-16 | 金木子 | Gallium nitride-based chip with ceramic substrate and manufacturing method |
| CN102828251A (en) * | 2012-09-10 | 2012-12-19 | 中国科学院半导体研究所 | Method for preparing aluminum nitride single crystal material |
| CN102969341A (en) * | 2012-11-09 | 2013-03-13 | 中国电子科技集团公司第五十五研究所 | Nitride high electronic mobility transistor extension structure of component gradually-changed ALyGal-yN buffer layer |
| US20130240895A1 (en) * | 2012-03-16 | 2013-09-19 | Jen-Inn Chyi | Semiconductor element having high breakdown voltage |
| CN103531612A (en) * | 2012-07-02 | 2014-01-22 | 三星电子株式会社 | Semiconductor device |
| US20140264454A1 (en) * | 2013-03-15 | 2014-09-18 | Semiconductor Components Industries, Llc | Ohmic contact structure for semiconductor device and method |
| US20160293399A1 (en) * | 2015-04-03 | 2016-10-06 | Hermes-Epitek Corp. | Semiconductor multilayer structure and fabrication method thereof |
| CN106816363A (en) * | 2017-01-12 | 2017-06-09 | 西安电子科技大学 | Based on m faces Al2O3Semi-polarity AlN films of graph substrate and preparation method thereof |
| CN106816504A (en) * | 2017-01-12 | 2017-06-09 | 西安电子科技大学 | Semi-polarity AlN films based on m faces SiC substrate and preparation method thereof |
| CN108417627A (en) * | 2018-02-11 | 2018-08-17 | 中国科学院苏州纳米技术与纳米仿生研究所南昌研究院 | A method of being used to prepare GaN base high-frequency microwave device |
| CN110379854A (en) * | 2019-07-26 | 2019-10-25 | 同辉电子科技股份有限公司 | A kind of epitaxy of gallium nitride technology suitable for power device |
| CN110504299A (en) * | 2019-08-20 | 2019-11-26 | 西安电子科技大学 | GaN groove anode Schottky diode preparation method based on graphical regrowth |
| CN110534431A (en) * | 2019-08-20 | 2019-12-03 | 西安电子科技大学 | GaN groove anode Schottky diode preparation method based on regrowth and ion implanting |
-
2019
- 2019-12-10 CN CN201911258183.6A patent/CN111129111A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101345192A (en) * | 2008-07-07 | 2009-01-14 | 中国电子科技集团公司第十三研究所 | Method for growing AlN and AlGaN on InAlN buffer layer |
| CN102456721A (en) * | 2010-10-17 | 2012-05-16 | 金木子 | Gallium nitride-based chip with ceramic substrate and manufacturing method |
| US20130240895A1 (en) * | 2012-03-16 | 2013-09-19 | Jen-Inn Chyi | Semiconductor element having high breakdown voltage |
| CN103531612A (en) * | 2012-07-02 | 2014-01-22 | 三星电子株式会社 | Semiconductor device |
| CN102828251A (en) * | 2012-09-10 | 2012-12-19 | 中国科学院半导体研究所 | Method for preparing aluminum nitride single crystal material |
| CN102969341A (en) * | 2012-11-09 | 2013-03-13 | 中国电子科技集团公司第五十五研究所 | Nitride high electronic mobility transistor extension structure of component gradually-changed ALyGal-yN buffer layer |
| US20140264454A1 (en) * | 2013-03-15 | 2014-09-18 | Semiconductor Components Industries, Llc | Ohmic contact structure for semiconductor device and method |
| US20160293399A1 (en) * | 2015-04-03 | 2016-10-06 | Hermes-Epitek Corp. | Semiconductor multilayer structure and fabrication method thereof |
| CN106816363A (en) * | 2017-01-12 | 2017-06-09 | 西安电子科技大学 | Based on m faces Al2O3Semi-polarity AlN films of graph substrate and preparation method thereof |
| CN106816504A (en) * | 2017-01-12 | 2017-06-09 | 西安电子科技大学 | Semi-polarity AlN films based on m faces SiC substrate and preparation method thereof |
| CN108417627A (en) * | 2018-02-11 | 2018-08-17 | 中国科学院苏州纳米技术与纳米仿生研究所南昌研究院 | A method of being used to prepare GaN base high-frequency microwave device |
| CN110379854A (en) * | 2019-07-26 | 2019-10-25 | 同辉电子科技股份有限公司 | A kind of epitaxy of gallium nitride technology suitable for power device |
| CN110504299A (en) * | 2019-08-20 | 2019-11-26 | 西安电子科技大学 | GaN groove anode Schottky diode preparation method based on graphical regrowth |
| CN110534431A (en) * | 2019-08-20 | 2019-12-03 | 西安电子科技大学 | GaN groove anode Schottky diode preparation method based on regrowth and ion implanting |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10134848B2 (en) | Semiconductor device having a graphene layer, and method of manufacturing thereof | |
| EP1873817B1 (en) | Substrate having thin film of GaN joined thereon and method of fabricating the same | |
| CN109671612B (en) | Gallium oxide semiconductor structure and preparation method thereof | |
| US6943376B2 (en) | Electrode for p-type SiC | |
| EP2820173B1 (en) | Template for gallium-nitride-on-diamond wafer deposition | |
| US5239188A (en) | Gallium nitride base semiconductor device | |
| US6660084B1 (en) | Sic single crystal and method for growing the same | |
| CN111540684A (en) | Microelectronic device of diamond-based heterogeneous integrated gallium nitride thin film and transistor and preparation method thereof | |
| US20040094756A1 (en) | Method for fabricating light-emitting diode using nanosize nitride semiconductor multiple quantum wells | |
| EP4223912A1 (en) | Epitaxial wafer for ultraviolet light emitting elements, method for producing metal bonded susbtrate for ultraviolet light emitting elements, method for producing ultraviolet light emitting element, and method for producing ultraviolet light emitting element array | |
| JP5412093B2 (en) | Semiconductor wafer manufacturing method and semiconductor device manufacturing method | |
| KR20190133232A (en) | Vertical Gallium Nitride Schottky Diodes | |
| JP5564799B2 (en) | Method for fabricating gallium nitride based semiconductor electronic device | |
| EP4187576A1 (en) | Heteroepitaxial structure with a diamond heat sink | |
| WO2023100540A1 (en) | Nitride semiconductor substrate and method for producing same | |
| KR102037589B1 (en) | Semiconductor Structure for improvement of surface roughness and methods for production thereof | |
| CN111129111A (en) | Semiconductor device, method of manufacturing the same, and integrated circuit | |
| JP2000281499A (en) | Preparation of gallium nitride single crystal | |
| JPWO2018055838A1 (en) | Semiconductor device manufacturing method and semiconductor substrate | |
| CN114335169A (en) | Gallium nitride Schottky barrier diode and manufacturing method thereof | |
| WO2023119916A1 (en) | Nitride semiconductor substrate and method for manufacturing nitride semiconductor substrate | |
| WO2023063278A1 (en) | Nitride semiconductor substrate and method for producing same | |
| US20230022774A1 (en) | Manufacturing method for semiconductor element, and semiconductor device | |
| JP2002299277A (en) | Manufacturing method for thin-film structural unit | |
| JP2023092416A (en) | Nitride semiconductor substrate and method for manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200508 |