CN111124776A - CPU power supply transient test method, system, terminal and storage medium - Google Patents
CPU power supply transient test method, system, terminal and storage medium Download PDFInfo
- Publication number
- CN111124776A CN111124776A CN201911194993.XA CN201911194993A CN111124776A CN 111124776 A CN111124776 A CN 111124776A CN 201911194993 A CN201911194993 A CN 201911194993A CN 111124776 A CN111124776 A CN 111124776A
- Authority
- CN
- China
- Prior art keywords
- frequency
- sampling
- power supply
- signal
- limit value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010998 test method Methods 0.000 title claims abstract description 11
- 230000001052 transient effect Effects 0.000 title claims abstract description 11
- 238000005070 sampling Methods 0.000 claims abstract description 86
- 238000012360 testing method Methods 0.000 claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 33
- 230000006870 function Effects 0.000 claims description 19
- 230000008676 import Effects 0.000 claims description 8
- 238000004364 calculation method Methods 0.000 claims description 6
- 230000001174 ascending effect Effects 0.000 claims description 4
- 238000004590 computer program Methods 0.000 claims description 3
- 238000012545 processing Methods 0.000 abstract description 10
- 230000008569 process Effects 0.000 abstract description 7
- 238000012216 screening Methods 0.000 abstract description 4
- 238000012546 transfer Methods 0.000 description 10
- 238000004891 communication Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000006467 substitution reaction Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2247—Verification or detection of system hardware configuration
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention provides a CPU power supply transient test method, a system, a terminal and a storage medium, comprising the following steps: dividing a frequency interval by using a logarithmic function and setting a sampling number corresponding to the frequency interval by using an upward rounding function; calculating the sampling frequency of the sampling points in the frequency interval according to the sampling number; setting the adopted frequencies as the power supply signal frequencies output by the test power supply in sequence; and collecting the reading signal of the oscilloscope to the power supply signal and outputting the information of the reading signal. According to the invention, the frequency intervals are divided, and the exclusive sampling quantity is set for each frequency interval, so that the sampling points in the sampling intervals of different frequency bands are uniformly distributed, and an accurate test result is obtained. In addition, the test result is subjected to comparison processing, drawing processing and screening processing with set frequency, so that the time is saved for test personnel to process the test result data, and the test efficiency is improved.
Description
Technical Field
The invention relates to the technical field of server testing, in particular to a method, a system, a terminal and a storage medium for testing a CPU power supply transient.
Background
Among the various components of the server, the power supply is responsible for supplying the energy required for the operation of each part, and plays a very important role. For the power circuit parameters of the server, intel sets strict design requirements and test specifications to ensure that the power supply can meet the requirements when the server operates. Downstream manufacturers need to design and test the power supply circuit of the server motherboard according to the specification issued by intel, wherein the power supply test mode of the CPU and the Memory is the most complicated.
Transient tests are the fast response of power supply circuits to load current changes and are an important parameter of power supplies. Py and 3d doldown _ v4.py programs issued by intel to manipulate GEN5_ VR _ Test _ Tool to perform transient testing of CPU power supplies under Whitley platforms. Wherein, 3D is modified 3D.py, and the maximum value and the minimum value of the transient load current are reset at high frequency.
The existing Transient test has the following defects:
1) py, 3d, and 3d, did down _ v4.py, the number of sampling frequency points is too mechanically selected. The original program divides each sampling interval by using [ initial frequency, initial frequency x 10] as a basis, and then equally divides the sampling. For example, the 3D.py program collects n frequency points in the intervals [1,10] kHz, (10,100] kHz, (100,1000] kHz, and the 3 D.Down _ V4.py program collects n frequency points in the intervals [0.35,3.5] kHz, (3.5,35] kHz, (35,350] kHz, and (350,1000] kHz, resulting in denser sampling points in the low frequency interval and sparser sampling points in the high frequency interval, and the 3D.py program lacks sampling in the interval [0.35,1] kHz, and the 3D.py program selects frequency values that do not conform to the decimal thinking convention of dividing by 1,10, 100, 1000.
2) The set value and the output value have a deviation. In the program-generated exception data, a load Frequency value (Frequency)/Duty ratio (Duty)/rising and falling edge time (RiseTime) displayed by an oscilloscope Measure value of Gen5 VR TestTool is selected as an output value, but the output value has an error from a set value. For example, two adjacent set frequencies are 200kHz and 225kHz, and when the read frequency is 210kHz, the frequency is not a set value, and it is not possible to determine which set value the output value corresponds to from a single piece of data. As another example, at high frequencies, the RiseTime may change. The above deviations all affect the setting of subsequent measurements.
3) The test result is in a data form, and the change trend of the voltage value in the whole frequency and duty ratio interval cannot be visually seen. And a test engineer is required to screen the corresponding load setting with the highest/lowest voltage from the test result for further analysis, which is time-consuming and labor-consuming.
Disclosure of Invention
In view of the above-mentioned deficiencies of the prior art, the present invention provides a CPU power transfer test method, system, terminal and storage medium to solve the above-mentioned technical problems.
In a first aspect, the present invention provides a CPU power transfer test method, including:
dividing a frequency interval by using a logarithmic function and setting a sampling number corresponding to the frequency interval by using an upward rounding function;
calculating the sampling frequency of the sampling points in the frequency interval according to the sampling number;
setting the adopted frequencies as the power supply signal frequencies output by the test power supply in sequence;
and collecting the reading signal of the oscilloscope to the power supply signal and outputting the information of the reading signal.
Further, the dividing the frequency interval by using a logarithmic function includes:
calculating a lower limit value of a frequency interval by using a formula f ═ ceil (log10(fL)), and calculating an upper limit value of the frequency interval by using a formula fH ^ 10^ f, wherein fL is the lower limit value, fH is the upper limit value, and f is a variable taking an integer;
and (4) forming a frequency interval by using the lower limit value and the upper limit value under the same variable f.
Further, the outputting the read signal information includes:
importing a sampling point frequency to which a read signal information mark belongs into an express file, wherein the read signal information comprises a read voltage value, a read frequency value, a read duty ratio and a Rise Time;
and respectively arranging the read signal information in the Excle file in an ascending order and a descending order according to the voltage value.
Further, the method further comprises:
acquiring power signal setting information corresponding to sampling frequency, wherein the power signal setting information comprises set voltage, set current and set duty ratio;
and simultaneously importing the read signal information and the power signal setting information under the same sampling frequency into an Excle file.
Further, the method further comprises:
and generating a three-dimensional curved surface graph according to the read information.
In a second aspect, the present invention provides a CPU power transfer test system, including:
the interval setting unit is configured to divide a frequency interval by using a logarithmic function and set a sampling number corresponding to the frequency interval by using an upward rounding function;
the sampling calculation unit is configured to calculate the sampling frequency of the sampling points in the frequency interval according to the sampling number;
the power supply setting unit is configured for sequentially setting the adoption frequency as a power supply signal frequency output by the test power supply;
and the information output unit is configured for acquiring a reading signal of the oscilloscope on the power supply signal and outputting the information of the reading signal.
Further, the section setting unit includes:
the boundary calculation module is configured to calculate a lower limit value of a frequency interval by using a formula f ═ ceil (log10(fL)), and calculate an upper limit value of the frequency interval by using a formula fH ^ 10 f, wherein fL is the lower limit value, fH is the upper limit value, and f is a variable taking an integer;
and the interval determining module is configured to combine the lower limit value and the upper limit value under the same variable f into a frequency interval.
Further, the system further comprises:
the device comprises a preset acquisition module, a sampling module and a control module, wherein the preset acquisition module is configured to acquire power signal setting information corresponding to sampling frequency, and the power signal setting information comprises set voltage, set current and set duty ratio;
and the comparison import module is configured to import the read signal information and the power signal setting information under the same sampling frequency into an express file at the same time.
In a third aspect, a terminal is provided, including:
a processor, a memory, wherein,
the memory is used for storing a computer program which,
the processor is used for calling and running the computer program from the memory so as to make the terminal execute the method of the terminal.
In a fourth aspect, a computer storage medium is provided having stored therein instructions that, when executed on a computer, cause the computer to perform the method of the above aspects.
The beneficial effect of the invention is that,
according to the CPU power transfer test method, the system, the terminal and the storage medium, the frequency intervals are divided, and the exclusive sampling quantity is set for each frequency interval, so that the sampling points of each frequency band are uniformly distributed in the sampling intervals, and accurate test results are obtained. In addition, the test result is subjected to comparison processing, drawing processing and screening processing with set frequency, so that the time is saved for test personnel to process the test result data, and the test efficiency is improved.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention.
Fig. 2 is a flow chart of sample point sampling frequency determination for a method of one embodiment of the present invention.
FIG. 3 is a schematic block diagram of a system of one embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention. The execution main body in fig. 1 may be a CPU power transfer test system.
As shown in fig. 1, the method 100 includes:
In order to facilitate understanding of the present invention, the CPU power transfer test method provided by the present invention is further described below by using the principle of the CPU power transfer test method of the present invention and combining the process of performing transfer test on a CPU power in the embodiment.
Specifically, the CPU power supply transient test method comprises the following steps:
s1, as shown in fig. 2, the frequency interval is divided by a logarithmic function and the number of samples corresponding to the frequency interval is set by an upward rounding function.
In a sampling point selection link, firstly, interval division is carried out on the whole frequency range according to a test frequency range required by a test, and the interval division method comprises the following steps: the newly added variable f is ceil (log10(fL)), where fL is the lower limit of the frequency per interval. For example, in the [0.35,1000] kHz range, f can be 0,1, 2, 3; the fH is 10^ f, which is the upper limit value of each interval frequency and correspondingly takes the values of 1kHz,10kHz,100kHz and 1000 kHz; and setting the sampling number of each interval to be 0, s,2 s,4 s, wherein s is a positive integer which is set by a user and is larger than 1. In practice, in the [0.35,1] kHz range, the sampling point is chosen to be 0.35kHz,1 kHz. Therefore, this embodiment divides the interval into [0.35,1] kHz, (1,10] kHz, (10,100] kHz, (100,1000] kHz) with the number of sampling points being 2, s,2 × s,4 × s in this order.
And S2, calculating the sampling frequency of the sampling points in the frequency interval according to the sampling number.
When testing, it needs to set each parameter of power signal output by CPU power supply, and after reading, it resets the power signal. The power supply signal parameters comprise a voltage value, a frequency value and a duty ratio, and the parameters of the power supply signal output by the CPU power supply each time are fixed values.
Calculating the sampling frequency of the sampling points in each frequency band interval, wherein the specific method is that the frequency difference of the frequency intervals is divided by the sampling number to obtain the frequency difference between the sampling points in the intervals, the first sampling point selects the minimum frequency of the interval, the second sampling point frequency is the sum of the minimum frequency and the frequency difference, and so on, and the sampling frequency sequence of the cost interval is generated. The sampling points in other intervals are selected by the same method.
And S3, sequentially setting the adopted frequencies as the power supply signal frequencies output by the test power supply.
The sampling frequency of a sampling point is set as a power supply signal output by a CPU power supply when a test is executed, different loads are mounted for the power supply in the process of outputting the power supply signal, and the power supply signal is read by using an oscilloscope, so that the read signals of the power supply signal under different loads are obtained, and the influence of load change on the power supply is tested.
And testing the CPU power supply by using the method under different sampling point sampling frequencies to obtain different reading signals, wherein the different reading signals are used for summarizing and analyzing.
And S4, collecting the reading signal of the oscilloscope to the power supply signal and outputting the information of the reading signal.
Collecting reading signal information of the CPU power supply under each sampling point, wherein the reading signal information comprises a voltage value, a frequency value, a duty ratio and the actual RiseTime of the sampling point, and importing the reading signal information of all the sampling points into an Excle file. On the basis of the original program, a sequencing code is added, data in the Excle are sequenced in descending order of the max value of the voltage and in ascending order of the min value of the voltage respectively, and the first 10 groups of data of two series are directly displayed for a tester to select.
In another preferred embodiment of the method according to this embodiment, in the output exception data code, data of the set frequency value/set duty ratio value/actual Rise Time corresponding to the sampling point is added (for the setting of the CPU power signal, a primary power pull Test corresponds to a set of set value and output value, the output value is a read value obtained by an oscilloscope in Gen5 VR Test Tool, and a primary CPU power transfer Test requires multiple power pulls, that is, a power pull, i.e., a power electrical signal output process.
When outputting a piece of power signal reading signal information exception data, increasing the data of the corresponding set frequency value/set duty ratio value/actual Rise Time.
In this embodiment, a surface () drawing function is added on the basis of the original program, the frequency and the duty ratio are used as X-axis and Y-axis data of a three-dimensional coordinate system, and the measured voltage max/min value is used as Z-axis data to draw a curved surface map.
As shown in fig. 3, the system 300 includes:
an interval setting unit 310 configured to divide a frequency interval by a logarithmic function and set a sampling number corresponding to the frequency interval by an rounding-up function;
a sampling calculation unit 320 configured to calculate sampling frequencies of sampling points in the frequency interval according to the sampling numbers;
a power setting unit 330 configured to set the sampling frequencies in sequence as power signal frequencies output by the test power;
and the information output unit 340 is configured to acquire a read signal of the oscilloscope for the power supply signal and output read signal information.
Optionally, as an embodiment of the present invention, the interval setting unit includes:
the boundary calculation module is configured to calculate a lower limit value of a frequency interval by using a formula f ═ ceil (log10(fL)), and calculate an upper limit value of the frequency interval by using a formula fH ^ 10 f, wherein fL is the lower limit value, fH is the upper limit value, and f is a variable taking an integer;
and the interval determining module is configured to combine the lower limit value and the upper limit value under the same variable f into a frequency interval.
Optionally, as an embodiment of the present invention, the information output unit includes:
the information import module is configured to import an Excle file after marking the sampling point frequency to which the read signal information belongs, wherein the read signal information comprises a read voltage value, a read frequency value, a read duty ratio and a Rise Time;
and the voltage screening module is configured for respectively carrying out ascending and descending arrangement on the read signal information in the Excle file according to voltage values.
Optionally, as an embodiment of the present invention, the system further includes:
the device comprises a preset acquisition module, a sampling module and a control module, wherein the preset acquisition module is configured to acquire power signal setting information corresponding to sampling frequency, and the power signal setting information comprises set voltage, set current and set duty ratio;
and the comparison import module is configured to import the read signal information and the power signal setting information under the same sampling frequency into an express file at the same time.
Optionally, as an embodiment of the present invention, the system further includes:
and the drawing unit is configured to generate a three-dimensional curved surface graph according to the read information.
Fig. 4 is a schematic structural diagram of a terminal system 400 according to an embodiment of the present invention, where the terminal system 400 may be used to execute the CPU power transfer test method according to the embodiment of the present invention.
The terminal system 400 may include: a processor 410, a memory 420, and a communication unit 430. The components communicate via one or more buses, and those skilled in the art will appreciate that the architecture of the servers shown in the figures is not intended to be limiting, and may be a bus architecture, a star architecture, a combination of more or less components than those shown, or a different arrangement of components.
The memory 420 may be used for storing instructions executed by the processor 410, and the memory 420 may be implemented by any type of volatile or non-volatile storage terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The executable instructions in memory 420, when executed by processor 410, enable terminal 400 to perform some or all of the steps in the method embodiments described below.
The processor 410 is a control center of the storage terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and performs various functions of the electronic terminal and/or processes data by operating or executing software programs and/or modules stored in the memory 420 and calling data stored in the memory. The processor may be composed of an Integrated Circuit (IC), for example, a single packaged IC, or a plurality of packaged ICs connected with the same or different functions. For example, the processor 410 may include only a Central Processing Unit (CPU). In the embodiment of the present invention, the CPU may be a single operation core, or may include multiple operation cores.
A communication unit 430, configured to establish a communication channel so that the storage terminal can communicate with other terminals. And receiving user data sent by other terminals or sending the user data to other terminals.
The present invention also provides a computer storage medium, wherein the computer storage medium may store a program, and the program may include some or all of the steps in the embodiments provided by the present invention when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM) or a Random Access Memory (RAM).
Therefore, the invention divides the frequency intervals and sets the exclusive sampling number for each frequency interval, thereby enabling the sampling points of each frequency range interval to be uniformly distributed and further obtaining the accurate test result. In addition, the test result is compared with the set frequency, is subjected to drawing processing and screening processing, time is saved for a tester to process the test result data, test efficiency is improved, the technical effect achieved by the embodiment can be shown in the description above, and details are not repeated here.
Those skilled in the art will readily appreciate that the techniques of the embodiments of the present invention may be implemented as software plus a required general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present invention may be embodied in the form of a software product, where the computer software product is stored in a storage medium, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, and the storage medium can store program codes, and includes instructions for enabling a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, and the like) to perform all or part of the steps of the method in the embodiments of the present invention.
The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.
In the embodiments provided in the present invention, it should be understood that the disclosed system and method can be implemented in other ways. For example, the above-described system embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, systems or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A CPU power supply transient test method is characterized by comprising the following steps:
dividing a frequency interval by using a logarithmic function and setting a sampling number corresponding to the frequency interval by using an upward rounding function;
calculating the sampling frequency of the sampling points in the frequency interval according to the sampling number;
setting the adopted frequencies as the power supply signal frequencies output by the test power supply in sequence;
and collecting the reading signal of the oscilloscope to the power supply signal and outputting the information of the reading signal.
2. The method of claim 1, wherein the dividing the frequency bins by a logarithmic function comprises:
calculating a lower limit value of a frequency interval by using a formula f ═ ceil (log10(fL)), and calculating an upper limit value of the frequency interval by using a formula fH ^ 10^ f, wherein fL is the lower limit value, fH is the upper limit value, and f is a variable taking an integer;
and (4) forming a frequency interval by using the lower limit value and the upper limit value under the same variable f.
3. The method of claim 1, wherein outputting read signal information comprises:
importing a sampling point frequency to which a read signal information mark belongs into an express file, wherein the read signal information comprises a read voltage value, a read frequency value, a read duty ratio and a Rise Time;
and respectively arranging the read signal information in the Excle file in an ascending order and a descending order according to the voltage value.
4. The method of claim 2, further comprising:
acquiring power signal setting information corresponding to sampling frequency, wherein the power signal setting information comprises set voltage, set current and set duty ratio;
and simultaneously importing the read signal information and the power signal setting information under the same sampling frequency into an Excle file.
5. The method of claim 1, further comprising:
and generating a three-dimensional curved surface graph according to the read information.
6. A CPU power supply transient test system is characterized by comprising:
the interval setting unit is configured to divide a frequency interval by using a logarithmic function and set a sampling number corresponding to the frequency interval by using an upward rounding function;
the sampling calculation unit is configured to calculate the sampling frequency of the sampling points in the frequency interval according to the sampling number;
the power supply setting unit is configured for sequentially setting the adoption frequency as a power supply signal frequency output by the test power supply;
and the information output unit is configured for acquiring a reading signal of the oscilloscope on the power supply signal and outputting the information of the reading signal.
7. The system according to claim 6, wherein the section setting unit includes:
the boundary calculation module is configured to calculate a lower limit value of a frequency interval by using a formula f ═ ceil (log10(fL)), and calculate an upper limit value of the frequency interval by using a formula fH ^ 10 f, wherein fL is the lower limit value, fH is the upper limit value, and f is a variable taking an integer;
and the interval determining module is configured to combine the lower limit value and the upper limit value under the same variable f into a frequency interval.
8. The system of claim 6, further comprising:
the device comprises a preset acquisition module, a sampling module and a control module, wherein the preset acquisition module is configured to acquire power signal setting information corresponding to sampling frequency, and the power signal setting information comprises set voltage, set current and set duty ratio;
and the comparison import module is configured to import the read signal information and the power signal setting information under the same sampling frequency into an express file at the same time.
9. A terminal, comprising:
a processor;
a memory for storing instructions for execution by the processor;
wherein the processor is configured to perform the method of any one of claims 1-5.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911194993.XA CN111124776B (en) | 2019-11-28 | 2019-11-28 | CPU power supply transient test method, system, terminal and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911194993.XA CN111124776B (en) | 2019-11-28 | 2019-11-28 | CPU power supply transient test method, system, terminal and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111124776A true CN111124776A (en) | 2020-05-08 |
| CN111124776B CN111124776B (en) | 2023-01-10 |
Family
ID=70496993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911194993.XA Active CN111124776B (en) | 2019-11-28 | 2019-11-28 | CPU power supply transient test method, system, terminal and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111124776B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116501235A (en) * | 2023-06-29 | 2023-07-28 | 珠海妙存科技有限公司 | Sampling point determining method, system, device and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105868064A (en) * | 2016-04-15 | 2016-08-17 | 浪潮电子信息产业股份有限公司 | Method for automatically testing memory power supply of server |
| CN109885438A (en) * | 2019-02-27 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of FPGA method for testing reliability, system, terminal and storage medium |
-
2019
- 2019-11-28 CN CN201911194993.XA patent/CN111124776B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105868064A (en) * | 2016-04-15 | 2016-08-17 | 浪潮电子信息产业股份有限公司 | Method for automatically testing memory power supply of server |
| CN109885438A (en) * | 2019-02-27 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of FPGA method for testing reliability, system, terminal and storage medium |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116501235A (en) * | 2023-06-29 | 2023-07-28 | 珠海妙存科技有限公司 | Sampling point determining method, system, device and storage medium |
| CN116501235B (en) * | 2023-06-29 | 2024-02-23 | 珠海妙存科技有限公司 | Sampling point determining method, system, device and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111124776B (en) | 2023-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103855045B (en) | The method for repairing and regulating of chip parameter on wafer | |
| CN110244185A (en) | A kind of multi-source harmonic contributions division methods, terminal device and storage medium | |
| CN111124776B (en) | CPU power supply transient test method, system, terminal and storage medium | |
| CN110149249A (en) | A kind of vector network analyzer test function extension system and method | |
| CN109426655A (en) | Data analysing method, device, electronic equipment and computer readable storage medium | |
| CN112964952A (en) | Server test system | |
| CN114167132B (en) | Power consumption detection method and device of wireless terminal, electronic equipment and storage medium | |
| CN108549009A (en) | Solve the not dull method and system of VR power-off sequentials test POWERGOOD signals | |
| CN113447840B (en) | Lithium ion battery sorting method and device | |
| CN103140767B (en) | High throughput semiconductor device testing | |
| Czaja | A diagnosis method of analog parts of mixed-signal systems controlled by microcontrollers | |
| CN115796210B (en) | Sample detection method and related equipment | |
| CN204731379U (en) | A kind of SOC measuring equipment | |
| CN109975607B (en) | Power distribution station area capacity identification method and device, storage medium and electronic equipment | |
| CN108761187B (en) | Substrate current testing method and system and terminal equipment | |
| CN111127223A (en) | Insurance product testing method and device and storage medium | |
| CN113449422B (en) | Method, device, equipment and storage medium for processing test data | |
| CN112905475B (en) | Software testing platform based on computer | |
| CN108196211A (en) | A kind of number table automatic verification system | |
| CN108269004B (en) | Product life analysis method and terminal equipment | |
| CN113296043A (en) | Online analysis method, device and equipment for voltage transformer errors and storage medium | |
| CN115796472B (en) | Energy metering processing method and device, electronic equipment and readable storage medium | |
| CN113839690B (en) | Power line carrier simulation operation test method and device | |
| CN111258912B (en) | Page testing method, device, terminal and storage medium | |
| Sanudo et al. | Alternative Methodology to Evaluate the Performance of PQ monitors |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |