CN111082829B - Signal processing device, radio remote unit and base station - Google Patents
Signal processing device, radio remote unit and base station Download PDFInfo
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- CN111082829B CN111082829B CN201911355457.3A CN201911355457A CN111082829B CN 111082829 B CN111082829 B CN 111082829B CN 201911355457 A CN201911355457 A CN 201911355457A CN 111082829 B CN111082829 B CN 111082829B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/391—Modelling the propagation channel
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/155—Ground-based stations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
- H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion
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Abstract
The application discloses a signal processing device, a radio remote unit and a base station. Wherein, a signal processing apparatus comprises: the peak clipping processing module outputs a first peak clipping signal to the first predistortion module, and the first predistortion module outputs a first predistortion signal; and the output end of the second predistortion module is coupled with the input end of the first peak elimination processing module and outputs a second predistortion signal to the first peak elimination processing module.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a signal processing apparatus, a radio remote unit, and a base station.
Background
In a data transmission scenario such as a base station, a communication device needs to perform signal pre-distortion and crest factor elimination processing. A common non-linear processing method in a communication device is that a predistortion processing link is after crest factor elimination processing. The corresponding structure of the non-linear processing mode is not flexible enough.
Disclosure of Invention
According to an aspect of the present application, there is provided a signal processing apparatus including:
the peak clipping processing module outputs a first peak clipping signal to the first predistortion module, and the first predistortion module outputs a first predistortion signal;
and the output end of the second predistortion module is coupled with the input end of the first peak elimination processing module and outputs a second predistortion signal to the first peak elimination processing module.
In some embodiments, the signal processing apparatus further comprises: and the input end of the power amplifier is coupled with the output end of the first predistortion module and outputs a power amplification signal.
In some embodiments, the signal processing apparatus further comprises: and the input end of the second peak eliminating processing module is used for receiving a baseband signal, and the output end of the second peak eliminating processing module is coupled with the second predistortion module and outputs a second peak eliminating processing signal to the second predistortion module.
In some embodiments, the signal processing apparatus further comprises: a signal processing module, an input end of which is coupled to an output end of the power amplifier, and is configured to output a feedback signal, where the feedback signal is a ratio of the power amplified signal to a gain of the power amplifier;
the second post-reverse processing module is used for receiving the feedback signal, performing reverse pre-distortion processing on the feedback signal and outputting a second reverse processing signal;
a second adder, configured to output a second signal, where the second signal is a difference between the second inverse processed signal and the first peak clipping signal;
and the second trainer is used for training the coefficient of the second predistortion module according to the second signal to obtain a second training result and outputting the second training result to the second predistortion module and the second post-reverse processing module.
In some embodiments, the signal processing apparatus further comprises: the first post-reverse processing module is used for receiving the second reverse processing signal and performing reverse pre-distortion processing on the second reverse processing signal to obtain a first reverse processing signal;
a first adder configured to output a first signal, where the first signal is a difference between the first inverse processed signal and the first pre-distorted signal;
and the first trainer is used for training the coefficient of the first post-reverse processing module according to the first signal to obtain a first training result and outputting the first training result to the first post-reverse processing module.
In some embodiments, the first post-inversion processing module is further configured to: outputting the first training result to the first predistortion module.
In some embodiments, the first predistortion module and the second predistortion module are set to different operating frequencies.
In some embodiments, the first predistortion module and the second predistortion module are arranged as different predistortion models.
In some embodiments, the second predistortion module performs a first predistortion operation and the first predistortion module performs a second predistortion operation.
According to an aspect of the present application, there is provided a radio remote device including a signal processing device according to an embodiment of the present application.
According to an aspect of the present application, there is provided a base station, comprising: a baseband; a radio remote unit; and an antenna.
In summary, the signal processing apparatus according to the embodiment of the present application may cascade the first peak reduction processing module CFR1 and the first predistortion module PD1 with the second predistortion module PD2, and make the first peak reduction processing module CFR1 between the first predistortion module PD1 and the second predistortion module PD 2. Here, the signal processing apparatus may perform a predistortion process on the signal through two stages of predistortion modules (i.e., PD1 and PD 2). Thus, the signal processing device of the embodiment of the application can flexibly set the number of the predistortion modules and the positions of the predistortion modules relative to the peak clipping processing modules according to the actual signal processing requirements, so that the signal can be flexibly subjected to nonlinear processing. In addition, the signal processing device can set the working frequency and the model of each predistortion module according to the requirement, so that the signal processing device can be applied to different scenes with predistortion requirements, namely the application range of the signal processing device is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.
FIG. 1 shows a schematic diagram of a signal processing apparatus according to some embodiments of the present application;
FIG. 2 shows a schematic diagram of a signal processing apparatus according to some embodiments of the present application;
FIG. 3 shows a schematic diagram of a signal processing apparatus according to some embodiments of the present application;
fig. 4 illustrates a schematic diagram of a remote radio device according to some embodiments of the present application;
fig. 5 illustrates a schematic diagram of a base station in accordance with some embodiments of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In some application scenarios, a Radio Remote Unit (RRU) may perform predistortion processing on a signal by using a Predistortion (PD) module, and perform crest factor cancellation on the signal by using a peak clipping processing module (CFR). The remote radio unit usually employs a peak clipping module and a predistortion module, and the peak clipping module is located before the predistortion module.
Fig. 1 shows a schematic diagram of a signal processing apparatus according to some embodiments of the present application. The signal processing apparatus in fig. 1 can be applied to, for example, a radio remote apparatus (i.e., a radio remote unit), but is not limited thereto.
As shown in fig. 1, the signal processing apparatus 10 may include a second predistortion module PD 2. The signal processing apparatus 10 may include a first peak reduction processing module CFR1 and a first predistortion module PD1 in cascade. The first peak clipping module CFR1 outputs a first peak clipping signal y1 to the first predistortion module PD1, which outputs a first predistortion signal x 1.
In addition, the signal processing apparatus 10 may further include a second predistortion module PD 2. The second predistortion module PD2 may receive the signal BB from baseband, for example. An output of the second predistortion module PD2 is coupled to an input of the first peak reduction processing module CFR1 and outputs a second predistortion signal x2 to the first peak reduction processing module. Also illustrated are the first predistortion module PD1 and the second predistortion module PD2
In summary, the signal processing apparatus according to the embodiment of the present application may cascade the first peak reduction processing module CFR1 and the first predistortion module PD1 with the second predistortion module PD2, and make the first peak reduction processing module CFR1 between the first predistortion module PD1 and the second predistortion module PD 2. Here, the signal processing apparatus may perform a predistortion process on the signal through two stages of predistortion modules (i.e., PD1 and PD 2). Therefore, the signal processing device of the embodiment of the application can flexibly set the number of the predistortion modules and the position of the predistortion modules relative to the peak clipping processing module according to the actual signal processing requirement, thereby flexibly carrying out nonlinear processing on the signal. In addition, the signal processing device can set the working frequency and the model of each predistortion module according to the requirement, so that the signal processing device can be applied to different scenes with predistortion requirements, namely the application range of the signal processing device is improved. For example, the operating frequency and model of each predistortion module may be the same. For another example, the operating frequencies of the predistortion modules may be different, or the models may be different, or both the operating frequencies and the models may be different.
In addition, the signal processing apparatus performs predistortion processing on the signal through two stages of predistortion modules, for example, the second predistortion module PD2 performs a first predistortion operation, and the first predistortion module PD1 performs a second predistortion operation. Thus, the signal processing apparatus can improve the linearity correction performance for the signal. For example, in the scenes of broadband, multi-carrier, high power and the like, the signal processing device of the application can meet the linear correction requirement on the signal.
In some embodiments, the signal processing apparatus further comprises a power amplifier PA, an input of which is coupled to an output of the first predistortion module PD 1. The power amplifier PA may output a power amplified signal s 1.
Fig. 2 illustrates a schematic diagram of a signal processing apparatus according to some embodiments of the present application. The signal processing apparatus in fig. 2 is further added with a second peak-eliminating processing module CFR2 on the basis of fig. 1. The input of the second peak canceling module CFR2 may receive the baseband signal BB. An output of the second peak reduction processing module CFR2 is coupled to the second predistortion module PD2 and outputs a second peak reduction processed signal y2 to the second predistortion module PD 2.
In summary, the signal processing apparatus may perform the crest factor reduction processing on the signal through the first peak clipping processing module CFR1 and the second peak clipping processing module CFR 2. For example, the second peak reduction processing module CFR2 may perform the first wavelet reduction processing, and the first peak reduction processing module CFR1 may perform the second wavelet reduction processing. Here, the signal processing apparatus may reduce the performance requirement of the first peak clipping processing module CFR1 through the second peak clipping processing module CFR 2. In addition, the second peak clipping processing module CFR2 can set the frequency and power consumption as required, thereby improving the flexibility of clipping the crest factor. The signal processing device of the application can flexibly set the number and the positions of the peak clipping processing modules (such as CFR1 and CFR2) and the predistortion modules (such as PD1 and PD2), thereby improving the flexibility of linear correction. It should be noted that the number of the peak clipping processing modules and the number of the predistortion modules in the present application are not limited to the number shown in fig. 2, and more peak clipping processing modules and more predistortion modules may be added according to needs. For example, CFR1 and CFR2 may also be disposed between PD1 and PD2, or before PD1 and PD2, but are not limited thereto.
Fig. 3 shows a schematic diagram of a signal processing apparatus according to some embodiments of the present application. The signal processing apparatus 10 in fig. 3 adds correlation modules for training the coefficients of the first predistortion module PD1 and the coefficients of the second predistortion module PD2 to the basis of fig. 2.
As shown in fig. 3, the signal processing apparatus 10 may further include a signal processing module D1, a second Post-inversion processing module P2 (may also be referred to as Post-inversion 2), a second adder a2, a second trainer L2 (may also be referred to as Learning2), a first Post-inversion processing module P1 (may also be referred to as Post-inversion 1), a first adder a1, and a first trainer L1 (may also be referred to as Learning 1).
An input of the signal processing module D1 is coupled to an output of the power amplifier PA for outputting the feedback signal z. The feedback signal z is the ratio of the power amplified signal s1 to the gain of the power amplifier PA. For example, the gain of the power amplifier PA is G, where z/s1 is 1/G.
The second post-inversion processing module P2 is used for receiving the feedback signal z, performing inverse pre-distortion processing on the feedback signal z, and outputting a second inverse processed signal z 2.
The second adder a2 is used to output a second signal e 2. The second signal e2 is the difference between the second inverted processed signal z2 and the first peak clipping signal y 1. That is, e2 ═ z2-y 1.
The second trainer L2 is configured to train the coefficients of the second predistortion module PD2 according to the second signal e2 to obtain a second training result, and output the second training result to the second predistortion module PD2 and the second post-inversion processing module P2. Here, the second predistortion module PD2 may implement various desired predistortion processing algorithms. Here, the coefficients of the second predistortion module PD2 are coefficients related to a predistortion processing algorithm. The second trainer L2 may reduce the subsequent second signal (i.e., reduce the difference between z2 and y1) by training the coefficients of the second predistortion module PD2, thereby improving the predistortion accuracy of the second predistortion module PD 2.
The first post-inversion processing module P1 is configured to receive the second inverted processed signal z2 and perform inverse pre-distortion processing on the second inverted processed signal z2 to obtain a first inverted processed signal z 1.
The first adder a1 is used to output a first signal e 1. The first signal e1 is the difference between the first inverse processed signal z1 and the first pre-distorted signal x 1. That is, e1 ═ z1-x 1.
The first trainer L1 is configured to train the coefficients of the first post-inversion processing module P1 according to the first signal e1 to obtain a first training result, and output the first training result to the first post-inversion processing module P1. The coefficients of the first post-inverse processing module P1 are the coefficients of the predistortion algorithm implemented by P1. In addition, the first post-inverse processing module P1 may output the first training result to the first predistortion module PD 1. Thus, the first predistortion module PD1 may use the first training result as coefficients of the first predistortion module PD 1. The coefficients of the first predistortion module PD1 are the coefficients of the predistortion algorithm implemented by the first predistortion module PD 1.
In summary, the first trainer L1 may reduce e1 (i.e. reduce the difference between z1 and x1) by an indirect training method (i.e. taking the training result of P1 as the latest coefficient of PD1), thereby improving the predistortion accuracy of the first predistortion module PD 1.
Fig. 4 illustrates a schematic diagram of a remote radio device according to some embodiments of the present application. As shown in fig. 4, the radio remote unit 20 may also be referred to as a Radio Remote Unit (RRU), and includes the signal processing apparatus 10 shown in fig. 2.
Fig. 5 illustrates a schematic diagram of a base station in accordance with some embodiments of the present application. As shown in fig. 5, the base station 100 may include a baseband 30, a radio remote unit 20, and an antenna 40. The baseband 30 may provide a baseband signal BB to the remote radio unit 20. The radio remote unit 20 may generate a radio frequency signal to be transmitted according to the baseband signal. The antenna 40 may radiate radio frequency signals to the outside.
The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements and the like that are made within the spirit and principle of the present application should be included in the scope of the present application.
Claims (8)
1. A signal processing apparatus, characterized by comprising:
a first peak clipping processing module (CFR1) and a first pre-distortion module (PD1) in cascade, wherein the first peak clipping processing module (CFR1) outputs a first peak clipping signal (y1) to the first pre-distortion module (PD1), and the first pre-distortion module (PD1) outputs a first pre-distortion signal (x 1);
a second predistortion module (PD2) having an output coupled to an input of the first peak reduction processing module (CFR1) and outputting a second predistortion signal (x2) to the first peak reduction processing module (CFR 1);
a Power Amplifier (PA) having an input coupled to an output of the first predistortion module (PD1) outputting a power amplified signal (s 1);
a signal processing module (D1) having an input coupled to the output of the Power Amplifier (PA) for outputting a feedback signal (z) which is the ratio of the power amplified signal (s1) and the gain (G) of the power amplifier;
a second post-inversion processing module (P2) for receiving the feedback signal (z) and performing an inverse pre-distortion processing on the feedback signal (z) to output a second inverse processed signal (z 2);
a second adder (a2) for outputting a second signal (e2), the second signal (e2) being the difference of the second inversely processed signal (z2) and the first peak clipping signal (y 1);
a second trainer (L2) for training the coefficients of the second predistortion module (PD2) according to the second signal (e2) to obtain a second training result, and outputting the second training result to the second predistortion module (PD2) and the second post-inversion processing module (P2).
2. The signal processing apparatus of claim 1, further comprising:
a second peak reduction processing module (CFR2) having an input for receiving a baseband signal (BB) and an output coupled to the second pre-distortion module (PD2) and outputting a second peak reduction processed signal (y2) to the second pre-distortion module (PD 2).
3. The signal processing apparatus of claim 1, further comprising:
a first post-inversion processing module (P1) for receiving the second inverted processed signal (z2) and performing an inverse pre-distortion processing on the second inverted processed signal (z2) to obtain a first inverted processed signal (z 1);
a first adder (a1) for outputting a first signal (e1), the first signal (e1) being a difference of the first inverse processed signal (z1) and the first pre-distorted signal (x 1);
a first trainer (L1) for training coefficients of the first post-inversion processing module (P1) according to the first signal (e1) to obtain a first training result, and outputting the first training result to the first post-inversion processing module (P1).
4. The signal processing apparatus of claim 3, wherein the first post-inversion processing module (P1) is further configured to: outputting the first training result to the first pre-distortion module (PD 1).
5. The signal processing apparatus of claim 1, wherein the first predistortion module (PD1) and the second predistortion module (PD2) are set to different operating frequencies.
6. The signal processing apparatus of claim 1, wherein the first predistortion module (PD1) and the second predistortion module (PD2) are arranged as different predistortion models.
7. A radio remote unit comprising a signal processing apparatus according to any one of claims 1 to 6.
8. A base station, comprising: a baseband; the remote radio frequency device of claim 7; and an antenna.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| CN201911355457.3A CN111082829B (en) | 2019-12-25 | 2019-12-25 | Signal processing device, radio remote unit and base station |
| PCT/KR2020/017587 WO2021132928A1 (en) | 2019-12-25 | 2020-12-04 | Signal processing apparatus, remote radio apparatus, and base station |
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| CN201911355457.3A CN111082829B (en) | 2019-12-25 | 2019-12-25 | Signal processing device, radio remote unit and base station |
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| CN111082829B true CN111082829B (en) | 2021-09-17 |
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| US20220393709A1 (en) * | 2021-05-10 | 2022-12-08 | Qualcomm Incorporated | Signaling of information for non-linearity model |
| US11888670B1 (en) * | 2022-07-20 | 2024-01-30 | Qualcomm Incorporated | Over the air reliable digital pre-distortion |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101056288A (en) * | 2007-06-14 | 2007-10-17 | 中兴通讯股份有限公司 | Pre-distortion model device and signal pre-distortion processing device, system and method |
| CN101267187A (en) * | 2008-05-07 | 2008-09-17 | 北京北方烽火科技有限公司 | A self-adapted pre-distortion method and system for broadband linear power amplifier |
| CN101478514A (en) * | 2009-01-08 | 2009-07-08 | 福建邮科通信技术有限公司 | Method for implementing digital power pre-distortion |
| CN101834816A (en) * | 2010-03-26 | 2010-09-15 | 京信通信***（中国）有限公司 | Self-adaptive equalization device based on radio frequency remote device |
| CN108631794A (en) * | 2018-04-09 | 2018-10-09 | 京信通信***（中国）有限公司 | The control method and system of digital pre-distortion block output signal |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7259630B2 (en) * | 2003-07-23 | 2007-08-21 | Andrew Corporation | Elimination of peak clipping and improved efficiency for RF power amplifiers with a predistorter |
| US7822146B2 (en) * | 2006-12-01 | 2010-10-26 | Texas Instruments Incorporated | System and method for digitally correcting a non-linear element |
| US7839951B2 (en) * | 2007-04-05 | 2010-11-23 | Microelectronics Technology Inc. | Dynamic crest factor reduction system |
| US8599961B2 (en) * | 2010-10-14 | 2013-12-03 | KATREIN-Werke KG | Crest factor reduction method and circuit for a multi-carrier signal |
| US8855174B2 (en) * | 2012-08-10 | 2014-10-07 | Alcatel Lucent | Frequency agile multiband transmitter using a radio frequency digital to analog converter |
| US9509350B1 (en) * | 2015-06-11 | 2016-11-29 | Infineon Technologies Ag | Devices and methods for adaptive crest factor reduction in dynamic predistortion |
| WO2019014422A1 (en) * | 2017-07-12 | 2019-01-17 | Nanosemi, Inc. | Monitoring systems and methods for radios implemented with digital predistortion |
-
2019
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- 2020-12-04 WO PCT/KR2020/017587 patent/WO2021132928A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101056288A (en) * | 2007-06-14 | 2007-10-17 | 中兴通讯股份有限公司 | Pre-distortion model device and signal pre-distortion processing device, system and method |
| CN101267187A (en) * | 2008-05-07 | 2008-09-17 | 北京北方烽火科技有限公司 | A self-adapted pre-distortion method and system for broadband linear power amplifier |
| CN101478514A (en) * | 2009-01-08 | 2009-07-08 | 福建邮科通信技术有限公司 | Method for implementing digital power pre-distortion |
| CN101834816A (en) * | 2010-03-26 | 2010-09-15 | 京信通信***（中国）有限公司 | Self-adaptive equalization device based on radio frequency remote device |
| CN108631794A (en) * | 2018-04-09 | 2018-10-09 | 京信通信***（中国）有限公司 | The control method and system of digital pre-distortion block output signal |
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| CN111082829A (en) | 2020-04-28 |
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