CN111082767A - Amplifying circuit capable of configuring signal gain - Google Patents
Amplifying circuit capable of configuring signal gain Download PDFInfo
- Publication number
- CN111082767A CN111082767A CN202010205251.9A CN202010205251A CN111082767A CN 111082767 A CN111082767 A CN 111082767A CN 202010205251 A CN202010205251 A CN 202010205251A CN 111082767 A CN111082767 A CN 111082767A
- Authority
- CN
- China
- Prior art keywords
- switch
- input
- negative
- capacitor module
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention relates to an amplifying circuit capable of configuring signal gain, which is characterized in that an innovative architecture design is adopted, two sets of schemes are constructed through different combinations among an input side switch group, an output side switch group, an input capacitor module, a feedback capacitor module and an operational amplifier (OPA), and flexible and diverse gain configuration modes are obtained by respectively aiming at the input capacitor module and the feedback capacitor module in application and combining the OPA through setting of different signals and mutual constraint relation among the signals, so that high-precision amplification operation on weak signals is realized, meanwhile, the low-noise characteristic of the amplifying circuit is considered, and the accuracy of practical noise reduction amplification application is ensured.
Description
Technical Field
The invention relates to an amplifying circuit capable of configuring signal gain, and belongs to the technical field of electronic circuits.
Background
In many signal measurement fields, a situation of weak signals may be encountered, and the weak signals are not easily processed by a signal Acquisition (ADC) and a processing system (MCU/DSP, etc.), so that a signal gain amplification circuit is often required to be used before the ADC signal acquisition to amplify the weak signals, and the amplification factor may be from 2 times to hundreds of times. Meanwhile, the amplifier circuit is generally required to have low noise characteristics. However, the gain amplifier circuit in the prior art is unstable in practical application, often cannot give consideration to noise reduction and amplification at the same time, and the practical application and the design target are different.
Disclosure of Invention
The technical problem to be solved by the invention is to provide an amplifying circuit capable of configuring signal gain, which can amplify weak signals in a gain configuration mode, and simultaneously give consideration to the low noise characteristic of the amplifying circuit, thereby ensuring the accuracy of the practical noise reduction amplification application.
The invention adopts the following technical scheme for solving the technical problems: the invention designs an amplifying circuit capable of configuring signal gain, which comprises a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch S5, a switch S6, a switch S7, an operational amplifier OPA, a positive input capacitor module, a negative input capacitor module, a positive feedback capacitor module and a negative feedback capacitor module; wherein, the switch S0, the switch S1, the switch S2 and the switch S3 form an input side switch group, and the switch S4, the switch S5, the switch S6 and the switch S7 form an output side switch group; the positive input capacitor module and the negative input capacitor module are identical in structure, and the positive feedback capacitor module and the negative feedback capacitor module are identical in structure;
the first scheme is as follows: a positive input end INP and a negative input end INN of the amplifying circuit are respectively butted with a positive input capacitance module and a negative input capacitance module through an input side switch group, and then the positive input capacitance module and the negative input capacitance module are sequentially connected in series with a first structure constructed by an operational amplifier OPA and two feedback capacitance modules, an output side switch group to a positive output end OUTP and a negative output end OUTN of the amplifying circuit through the two input capacitance modules;
or the scheme II: the positive input end INP and the negative input end INN of the amplifying circuit are firstly respectively butted with the positive input capacitance module and the negative input capacitance module, and then the two input capacitance modules are sequentially connected in series with the input side switch group, the second structure constructed by the operational amplifier OPA and the two feedback capacitance modules, and the output side switch group to the positive output end OUTP and the negative output end OUTN of the amplifying circuit.
As a preferred technical solution of the present invention, the first solution includes the following:
the positive input end INP of the amplifying circuit is commonly butted with the input end of the positive input capacitance module through a switch S0 and the negative input end INN through a switch S2, and the positive input end INP of the amplifying circuit is commonly butted with the input end of the negative input capacitance module through a switch S1 and the negative input end INN through a switch S3;
the output end of the forward input capacitor module is respectively butted with the input end of the forward feedback capacitor module and the positive input end of the operational amplifier OPA; the output end of the positive feedback capacitance module is butted with the negative output end of the operational amplifier OPA, the butted end is butted with the negative output end OUTN of the amplifying circuit through a switch S4, and the butted end is butted with the positive output end OUTP of the amplifying circuit through a switch S6;
the output end of the negative input capacitor module is respectively butted with the input end of the negative feedback capacitor module and the negative input end of the operational amplifier OPA; the output terminal of the negative feedback capacitor module is connected to the positive output terminal of the operational amplifier OPA, and the connection terminal is connected to the negative output terminal OUTN of the amplifying circuit through the switch S5, and the connection terminal is connected to the positive output terminal OUTP of the amplifying circuit through the switch S7.
As a preferred technical solution of the present invention, the second solution includes the following:
a positive input end INP of the amplifying circuit is butted with an input end of the positive input capacitor module, and a negative input end INN of the amplifying circuit is butted with an input end of the negative input capacitor module;
the output end of the forward input capacitor module is connected with the input end of the forward feedback capacitor module, and the output end of the forward input capacitor module is connected with the positive input end of the operational amplifier OPA through a switch S0 and connected with the negative input end of the operational amplifier OPA through a switch S2; the output end of the negative input capacitor module is butted with the input end of the negative feedback capacitor module, and the output end of the negative input capacitor module is butted with the positive input end of the operational amplifier OPA through a switch S1 and the negative input end of the operational amplifier OPA through a switch S3;
the output end of the positive feedback capacitance module is connected with a negative output end OUTN of the amplifying circuit, and the negative output end OUTN of the amplifying circuit is connected with a negative output end of the operational amplifier OPA through a switch S4 and connected with a positive output end of the operational amplifier OPA through a switch S6; the output terminal of the negative feedback capacitance module is connected to the positive output terminal OUTP of the amplifying circuit, and the positive output terminal OUTP of the amplifying circuit is connected to the negative output terminal of the operational amplifier OPA through the switch S5 and connected to the positive output terminal of the operational amplifier OPA through the switch S7.
As a preferred technical scheme of the invention: the positive input capacitor module and the negative input capacitor module respectively comprise N sub-input capacitor assemblies, and N is an integer not less than 1; each sub-input capacitor assembly in the positive input capacitor module corresponds to each sub-input capacitor assembly in the negative input capacitor module one by one; each sub-input capacitor assembly in the forward input capacitor module respectively comprises a forward input capacitor CIP, the forward input capacitors CIP are connected in parallel, one end of the parallel structure is used as the input end of the forward input capacitor module, and the other end of the parallel structure is used as the output end of the forward input capacitor module;
each sub-input capacitor assembly in the negative input capacitor module respectively comprises a negative input capacitor CIN, the negative input capacitors CIN are connected in parallel, one end of the parallel structure is used as the input end of the negative input capacitor module, and the other end of the parallel structure is used as the output end of the negative input capacitor module.
As a preferred technical scheme of the invention: each sub-input capacitor assembly in the forward input capacitor module further comprises a switch S10 and a switch S11 respectively, wherein in each sub-input capacitor assembly, the switch S10 is connected with the corresponding forward input capacitor CIP in series, and the connection position between the switch S3526 and the corresponding forward input capacitor CIP is connected with a direct-current voltage VDC through a switch S11; one end of the switch S10 of each sub-input capacitor assembly, which faces away from the connected forward input capacitor CIP, is connected with each other to form the input end of the forward input capacitor module, and one end of the forward input capacitor CIP of each sub-input capacitor assembly, which faces away from the connected switch S10, is connected with each other to form the output end of the forward input capacitor module;
each sub-input capacitor assembly in the negative input capacitor module further comprises a switch S12 and a switch S13, wherein in each sub-input capacitor assembly, the switch S12 is connected in series with the corresponding negative input capacitor CIN, and the connection position between the switch S3526 and the corresponding negative input capacitor CIN is butted with a direct-current voltage VDC through a switch S13; the ends of the switches S12 of the sub-input capacitance elements facing away from the connected negative input capacitance CIN are connected to each other to form the input end of the negative input capacitance module, and the ends of the negative input capacitance CIN of the sub-input capacitance elements facing away from the connected switches S12 are connected to each other to form the output end of the negative input capacitance module.
As a preferred technical scheme of the invention: the switch S10 in each sub-input capacitor module in the positive input capacitor module and the switch S12 in the corresponding sub-input capacitor module in the negative input capacitor module receive the same signal G for control, the switch S11 in each sub-input capacitor module in the positive input capacitor module and the switch S13 in the corresponding sub-input capacitor module in the negative input capacitor module receive the same signal GB for control, and the signal G and the signal GB for the same sub-input capacitor module are in an inverse relationship with each other.
As a preferred technical scheme of the invention: the positive feedback capacitance module comprises a switch S8 and M sub-feedback capacitance components, the negative feedback capacitance module comprises a switch S9 and M sub-feedback capacitance components, and M is an integer not less than 1; each sub-feedback capacitor assembly in the positive feedback capacitor module corresponds to each sub-feedback capacitor assembly in the negative feedback capacitor module one by one;
each sub-feedback capacitor component in the forward feedback capacitor module respectively comprises a forward cross-over capacitor CFP, a switch S8 and each forward cross-over capacitor CFP are connected in parallel, one end of the parallel structure is used as the input end of the forward feedback capacitor module, and the other end of the parallel structure is used as the output end of the forward feedback capacitor module;
each sub-feedback capacitor assembly in the negative feedback capacitor module respectively comprises a negative cross-over capacitor CFN, the switch S9 and each negative cross-over capacitor CFN are connected in parallel, one end of the parallel structure is used as an input end of the negative feedback capacitor module, and the other end of the parallel structure is used as an output end of the negative feedback capacitor module.
As a preferred technical scheme of the invention: each sub-feedback capacitor assembly in the forward feedback capacitor module further comprises a switch S14 and a switch S15, wherein in each sub-feedback capacitor assembly, the switch S14 is connected in series with the corresponding forward cross-over capacitor CFP, and the connection position between the switch S3526 and the corresponding forward cross-over capacitor CFP is butted with a direct-current voltage VDC through a switch S15; one end of the forward cross-over capacitor CFP of each sub-feedback capacitor assembly, which is back to the connected switch S14, and one end of the switch S8 are connected to each other to form an input end of the forward feedback capacitor module, and one end of the switch S14 of each sub-feedback capacitor assembly, which is back to the connected forward cross-over capacitor CFP, and the other end of the switch S8 are connected to each other to form an output end of the forward feedback capacitor module;
each sub-feedback capacitor assembly in the negative feedback capacitor module further comprises a switch S16 and a switch S17, wherein in each sub-feedback capacitor assembly, the switch S16 is connected in series with the corresponding negative cross-over capacitor CFN, and the connection position between the switch S3526 and the corresponding negative cross-over capacitor CFN is butted with a direct-current voltage VDC through a switch S17; one end of the negative cross-over capacitor CFN of each sub-feedback capacitor assembly, which is opposite to the connected switch S16, and one end of the switch S9 are connected to each other to form an input end of the negative feedback capacitor module, and one end of the switch S16 of each sub-feedback capacitor assembly, which is opposite to the connected negative cross-over capacitor CFN, and the other end of the switch S9 are connected to each other to form an output end of the negative feedback capacitor module.
As a preferred technical scheme of the invention: the switch S14 in each sub-feedback capacitor module in the positive feedback capacitor module and the switch S16 in the corresponding sub-feedback capacitor module in the negative feedback capacitor module respectively receive the same signal GF for control, the switch S15 in each sub-feedback capacitor module in the positive feedback capacitor module and the switch S17 in the corresponding sub-feedback capacitor module in the negative feedback capacitor module respectively receive the same signal GFB for control, and the signal GF and the signal GFB for the same sub-feedback capacitor module are in an inverse relation to each other.
As a preferred technical scheme of the invention: the switch S0, the switch S3, the switch S4 and the switch S7 are all controlled by receiving a clock signal CKC1, the switch S1, the switch S2, the switch S5 and the switch S6 are all controlled by receiving a clock signal CKC2, and the clock signal CKC1 and the clock signal CKC2 are opposite in phase and do not overlap with each other.
Compared with the prior art, the amplifying circuit capable of configuring the signal gain has the following technical effects by adopting the technical scheme:
the invention designs an amplifying circuit capable of configuring signal gain, innovatively constructs two schemes by different combinations among an input side switch group, an output side switch group, an input capacitor module, a feedback capacitor module and an operational amplifier OPA, and obtains flexible and diverse gain configuration modes by respectively aiming at the input capacitor module and the feedback capacitor module during application and combining the operational amplifier OPA through setting of different signals and mutual constraint relation among the signals, thereby realizing high-precision amplification operation on weak signals, simultaneously considering the low noise characteristic of the amplifying circuit and ensuring the accuracy of practical noise reduction and amplification application.
Drawings
FIG. 1 is a circuit diagram of an embodiment of an amplifying circuit with configurable signal gain according to the present invention;
FIG. 2 is a schematic circuit diagram of a second embodiment of an amplifying circuit with configurable signal gain according to the present invention;
FIG. 3 is a schematic diagram of the arrangement between the clock signal CKC1 and the clock signal CKC2 according to an embodiment of the present invention.
Detailed Description
The following description will explain embodiments of the present invention in further detail with reference to the accompanying drawings.
The invention designs an amplifying circuit capable of configuring signal gain, which comprises a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch S5, a switch S6, a switch S7, an operational amplifier OPA, a positive input capacitor module, a negative input capacitor module, a positive feedback capacitor module and a negative feedback capacitor module in practical application; wherein, the switch S0, the switch S1, the switch S2 and the switch S3 form an input side switch group, and the switch S4, the switch S5, the switch S6 and the switch S7 form an output side switch group; the positive input capacitor module and the negative input capacitor module are identical in structure, and the positive feedback capacitor module and the negative feedback capacitor module are identical in structure.
The operational amplifier OPA has a differential input function and a differential output function, and specifically has 2 positive/negative input terminals and 2 positive/negative output terminals. In practical application, the structure of the differential operational amplifier has no special requirements, and any structure of differential input and differential output is feasible.
Based on the introduced modules and components, the invention specifically designs two sets of circuit schemes, which are respectively as follows.
The first scheme is as follows: the positive input end INP and the negative input end INN of the amplifying circuit are respectively butted with the positive input capacitance module and the negative input capacitance module through the input side switch group, and then the first structure constructed by the operational amplifier OPA and the two feedback capacitance modules, the output side switch group are sequentially connected in series through the two input capacitance modules to the positive output end OUTP and the negative output end OUTN of the amplifying circuit.
In practical application of the first solution, as shown in fig. 1, the positive input end INP of the amplifying circuit is connected to the input end of the positive input capacitor module through the switch S0, and the negative input end INN is connected to the input end of the negative input capacitor module through the switch S2, and the positive input end INP of the amplifying circuit is connected to the input end of the negative input capacitor module through the switch S1, and the negative input end INN is connected to the input end of the negative input capacitor module through the switch S3.
The output end of the forward input capacitor module is respectively butted with the input end of the forward feedback capacitor module and the positive input end of the operational amplifier OPA; the output terminal of the positive feedback capacitor module is connected to the negative output terminal of the operational amplifier OPA, and the connection terminal is connected to the negative output terminal OUTN of the amplifying circuit through the switch S4, and the connection terminal is connected to the positive output terminal OUTP of the amplifying circuit through the switch S6.
The output end of the negative input capacitor module is respectively butted with the input end of the negative feedback capacitor module and the negative input end of the operational amplifier OPA; the output terminal of the negative feedback capacitor module is connected to the positive output terminal of the operational amplifier OPA, and the connection terminal is connected to the negative output terminal OUTN of the amplifying circuit through the switch S5, and the connection terminal is connected to the positive output terminal OUTP of the amplifying circuit through the switch S7.
Scheme II: the positive input end INP and the negative input end INN of the amplifying circuit are firstly respectively butted with the positive input capacitance module and the negative input capacitance module, and then the two input capacitance modules are sequentially connected in series with the input side switch group, the second structure constructed by the operational amplifier OPA and the two feedback capacitance modules, and the output side switch group to the positive output end OUTP and the negative output end OUTN of the amplifying circuit.
In practical application, as shown in fig. 2, the positive input end INP of the amplifying circuit is connected to the input end of the positive input capacitor module, and the negative input end INN of the amplifying circuit is connected to the input end of the negative input capacitor module.
The output end of the forward input capacitor module is connected with the input end of the forward feedback capacitor module, and the output end of the forward input capacitor module is connected with the positive input end of the operational amplifier OPA through a switch S0 and connected with the negative input end of the operational amplifier OPA through a switch S2; the output terminal of the negative input capacitor module is connected to the input terminal of the negative feedback capacitor module, and the output terminal of the negative input capacitor module is connected to the positive input terminal of the operational amplifier OPA through the switch S1 and connected to the negative input terminal of the operational amplifier OPA through the switch S3.
The output end of the positive feedback capacitance module is connected with a negative output end OUTN of the amplifying circuit, and the negative output end OUTN of the amplifying circuit is connected with a negative output end of the operational amplifier OPA through a switch S4 and connected with a positive output end of the operational amplifier OPA through a switch S6; the output terminal of the negative feedback capacitance module is connected to the positive output terminal OUTP of the amplifying circuit, and the positive output terminal OUTP of the amplifying circuit is connected to the negative output terminal of the operational amplifier OPA through the switch S5 and connected to the positive output terminal of the operational amplifier OPA through the switch S7.
In practical applications, the switch S0, the switch S3, the switch S4, and the switch S7 all receive the clock signal CKC1 for control, the switch S1, the switch S2, the switch S5, and the switch S6 all receive the clock signal CKC2 for control, and the clock signal CKC1 and the clock signal CKC2 are in opposite phases and do not overlap with each other, as shown in fig. 3, and in practical applications, the clock frequencies therein may be configured to different values, so that part of the low-frequency noise is eliminated through the input-side switch group and the output-side switch group.
In practical application, the first and second schemes designed by the above technical scheme can realize noise reduction and amplification of an input signal, and meanwhile, the invention further designs a positive input capacitance module, a negative input capacitance module, a positive feedback capacitance module and a negative feedback capacitance module, which are as follows.
Firstly, a positive input capacitance module and a negative input capacitance module are provided, wherein the positive input capacitance module and the negative input capacitance module respectively comprise N sub-input capacitance components, and N is an integer not less than 1; and each sub-input capacitor assembly in the positive input capacitor module and each sub-input capacitor assembly in the negative input capacitor module correspond to each other one by one.
Each sub-input capacitor component in the forward input capacitor module respectively comprises a forward input capacitor CIP, a switch S10 and a switch S11, namely as shown in FIG. 1 and FIG. 2, the forward input capacitor module comprises a forward input capacitor CIP <1> -a forward input capacitor CIP < N >, a switch S10<1> -a switch S10< N >, and a switch S11<1> -a switch S11< N >; in each sub-input capacitor assembly, the switch S10 is connected in series with the corresponding forward input capacitor CIP, and the connection position between the two is connected with the direct-current voltage VDC through the switch S11; the ends of the switches S10 of the sub-input capacitor modules facing away from the connected forward input capacitor CIP are connected to each other to form the input end of the forward input capacitor module, and the ends of the switches S10 of the sub-input capacitor modules facing away from the connected forward input capacitor CIP are connected to each other to form the output end of the forward input capacitor module.
Each sub-input capacitor assembly in the negative input capacitor module respectively comprises a negative input capacitor CIN, a switch S12 and a switch S13, namely as shown in FIG. 1 and FIG. 2, the negative input capacitor module comprises a negative input capacitor CIN <1> -a negative input capacitor CIN < N >, a switch S12<1> -a switch S12< N >, a switch S13<1> -a switch S13< N >; in each sub-input capacitor assembly, a switch S12 is connected in series with a corresponding negative input capacitor CIN, and the connection position between the two is connected with a direct-current voltage VDC through a switch S13; the ends of the switches S12 of the sub-input capacitance elements facing away from the connected negative input capacitance CIN are connected to each other to form the input end of the negative input capacitance module, and the ends of the negative input capacitance CIN of the sub-input capacitance elements facing away from the connected switches S12 are connected to each other to form the output end of the negative input capacitance module.
In practical applications of the positive input capacitor module and the negative input capacitor module, based on the one-to-one correspondence relationship between each sub-input capacitor element in the positive input capacitor module and each sub-input capacitor element in the negative input capacitor module, the switch S10 in each sub-input capacitor element in the positive input capacitor module and the switch S12 in the corresponding sub-input capacitor element in the negative input capacitor module receive the same signal G for control, the switch S11 in each sub-input capacitor element in the positive input capacitor module and the switch S13 in the corresponding sub-input capacitor element in the negative input capacitor module receive the same signal GB for control, and the signal G and the signal GB for the same sub-input capacitor element are in an inverse correlation relationship with each other.
As shown in fig. 1 and fig. 2, the positive input capacitance module and the negative input capacitance module, i.e., the switches S10<1> -S10 < N > and S12<1> -S12 < N >, are in one-to-one correspondence with each other according to sequence numbers, and are respectively controlled by signals G <1> -signal G < N > based on the same sequence number, i.e., signal G <1> is simultaneously used for controlling the switches S10<1> and S12<1>, and so on until signal G < N > is simultaneously used for controlling the switches S10< N > and S12< N >; meanwhile, the switches S11<1> -S11 < N > and the switches S13<1> -S13 < N > are in one-to-one correspondence with each other according to sequence numbers and are respectively controlled by signals GB <1> -signals GB < N > based on the same sequence numbers, namely the signals GB <1> are simultaneously used for controlling the switches S11<1> and S13<1>, and so on until the signals GB < N > are simultaneously used for controlling the switches S11< N > and S13< N >.
The signals G <1> -G < N > and GB <1> -GB < N >, which have the same sequence number, are inversely related, i.e. if the signal G < N > is 0 (representing that the control switch S10< N > and the switch S12< N > are closed), the signal GB < N > is 1 (representing that the control switch S11< N > and the switch S13< N > are open), and vice versa. In the practical application, the signals G <1> -G < N > and the signals GB <1> -GB < N > are used for controlling the sizes of the capacitors connected to the positive input capacitor module and the negative input capacitor module so as to determine the amplification factor of the amplifying circuit. Such as signal G < N > being 1, represents the coupling of a positive input capacitance CIP < N > and a negative input capacitance CIN < N > into the signal path, participating in the amplification of the signal. On the contrary, the signal G < N > is 0, which means that one end of the positive input capacitor CIP < N > and one end of the negative input capacitor CIN < N > are respectively connected to the dc voltage VDC and do not participate in the signal amplification.
As described above, the switches S10-S13 are used for selecting the number of capacitors participating in the signal amplification; the number of the connected capacitors can be fixed, the switches S10-S13 can be omitted, and the switch S10/the switch S12 are directly connected.
Then, a positive feedback capacitance module and a negative feedback capacitance module are arranged, wherein the positive feedback capacitance module comprises a switch S8 and M sub-feedback capacitance components, the negative feedback capacitance module comprises a switch S9 and M sub-feedback capacitance components, and M is an integer not less than 1; each sub-feedback capacitor assembly in the positive feedback capacitor module corresponds to each sub-feedback capacitor assembly in the negative feedback capacitor module one by one.
Each sub-feedback capacitor component in the forward feedback capacitor module respectively comprises a forward cross-over capacitor CFP, a switch S14 and a switch S15, namely as shown in fig. 1 and fig. 2, namely, the forward feedback capacitor module comprises a forward cross-over capacitor CFP <1> -a forward cross-over capacitor CFP < M >, a switch S14<1> -a switch S14< M >, and a switch S15<1> -a switch S15< M >; in each sub-feedback capacitor assembly, the switch S14 is connected in series with the corresponding forward cross-over capacitor CFP, and the connection position between the two is connected with the direct-current voltage VDC through the switch S15; one end of the forward cross-over capacitor CFP of each sub-feedback capacitor module, which is opposite to the connected switch S14, and one end of the switch S8 are connected to each other to form an input end of the forward feedback capacitor module, and one end of the switch S14 of each sub-feedback capacitor module, which is opposite to the connected forward cross-over capacitor CFP, and the other end of the switch S8 are connected to each other to form an output end of the forward feedback capacitor module.
Each sub-feedback capacitor component in the negative feedback capacitor module respectively comprises a negative cross-over capacitor CFN, a switch S16 and a switch S17, namely as shown in fig. 1 and fig. 2, namely the negative feedback capacitor module comprises a negative cross-over capacitor CFN <1> -a negative cross-over capacitor CFN < M >, a switch S16<1> -a switch S16< M >, and a switch S17<1> -a switch S17< M >; in each sub-feedback capacitor assembly, a switch S16 is connected in series with a corresponding negative cross-over capacitor CFN, and the connection position between the two is connected with a direct-current voltage VDC through a switch S17; one end of the negative cross-over capacitor CFN of each sub-feedback capacitor assembly, which is opposite to the connected switch S16, and one end of the switch S9 are connected to each other to form an input end of the negative feedback capacitor module, and one end of the switch S16 of each sub-feedback capacitor assembly, which is opposite to the connected negative cross-over capacitor CFN, and the other end of the switch S9 are connected to each other to form an output end of the negative feedback capacitor module.
In practical applications of the positive feedback capacitor module and the negative feedback capacitor module, the switch S8 and the switch S9 are respectively controlled by a CHAR signal, and are used for pre-charging the capacitors in the positive feedback capacitor module and the negative feedback capacitor module. In addition, based on the one-to-one correspondence relationship between each sub-feedback capacitor element in the positive feedback capacitor module and each sub-feedback capacitor element in the negative feedback capacitor module, the switch S14 in each sub-feedback capacitor element in the positive feedback capacitor module and the switch S16 in the corresponding sub-feedback capacitor element in the negative feedback capacitor module receive the same signal GF for control, the switch S15 in each sub-feedback capacitor element in the positive feedback capacitor module and the switch S17 in the corresponding sub-feedback capacitor element in the negative feedback capacitor module receive the same signal GFB for control, and the signal GF and the signal GFB for the same sub-feedback capacitor element are in an inverse correlation relationship with each other.
As shown in fig. 1 and 2, in the positive feedback capacitor module and the negative feedback capacitor module, i.e., between the switch S14<1> -the switch S14< M > and the switch S16<1> -the switch S16< M >, the signals GF <1> -the signals GF < M > are in one-to-one correspondence with each other according to the sequence numbers, and the signals GF <1> -the signals GF < M > are respectively controlled based on the same sequence numbers, i.e., the signals GF <1> are simultaneously used for controlling the switches S14<1> and the switch S16<1>, and so on until the signals GF < M > are simultaneously used for controlling the switches S14< M > and the switches S16< M >; meanwhile, the switches S15<1> -S15 < M > and S17<1> -S17 < M > are in one-to-one correspondence with each other according to sequence numbers and are respectively controlled by signals GFB <1> -signal GFB < M > based on the same sequence numbers, namely the signals GFB <1> are simultaneously used for controlling the switches S15<1> and S17<1>, and so on until the signals GFB < M > are simultaneously used for controlling the switches S15< M > and S17< M >.
The signals GF <1> -GF < M > and GFB <1> -GFB < M > have the same sequence number, i.e. if GF < M > is 0 (representing that the control switch S14< M > and the switch S16< M > are closed), the signal GFB < M > is 1 (representing that the control switch S15< M > and the switch S17< M > are open), and vice versa. In the practical application, the signals GF <1> -GF < M > and the signals GFB <1> -GFB < M > are used for controlling the sizes of the feedback capacitors of the positive feedback capacitor module and the negative feedback capacitor module so as to determine the amplification factor of the amplifying circuit.
Such as signal GF < M > being 1, represents the positive crossover capacitance CFP < M > and the negative crossover capacitance CFN < M > being coupled into the signal path and participating in the amplification of the signal. On the contrary, the signal GF < M > is 0, which means that one end of the positive cross-over capacitor CFP < M > and one end of the negative cross-over capacitor CFN < M > are respectively connected to the dc voltage VDC and do not participate in the signal amplification.
As described above, the switches S14-S17 are used for selecting the number of capacitors participating in the signal amplification; the number of the connected capacitors can be fixed, the switches S14-S17 can be omitted, and the switch S14/the switch S16 are directly connected.
In practical application, if the capacitance values of the input capacitors and the cross-over capacitors are consistent, the amplification factor G of the whole amplification circuit is equal to the ratio of the number of the input capacitors in all the accessed amplification circuits to the number of the cross-over capacitors in all the accessed amplification circuits.
If the capacitance values of the input capacitors are not consistent with the capacitance values of the bridging capacitors, the amplification factor G of the whole amplifying circuit is equal to the ratio of the total capacitance values of the input capacitors in all the connected amplifying circuits to the total capacitance values of the bridging capacitors in all the connected amplifying circuits.
The technical scheme is that the amplifying circuit capable of configuring the signal gain is designed, an innovative architecture design is adopted, two schemes are constructed through different combinations among the input side switch group, the output side switch group, the input capacitor module, the feedback capacitor module and the operational amplifier OPA, the flexible and various gain configuration modes are obtained by combining the operational amplifier OPA and different signal setting and mutual constraint relations among signals aiming at the input capacitor module and the feedback capacitor module respectively during application, and the accuracy of the practical noise reduction and amplification application is ensured.
The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (10)
1. An amplifying circuit capable of configuring signal gain, characterized by: the circuit comprises a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch S5, a switch S6, a switch S7, an operational amplifier OPA, a positive input capacitance module, a negative input capacitance module, a positive feedback capacitance module and a negative feedback capacitance module; wherein, the switch S0, the switch S1, the switch S2 and the switch S3 form an input side switch group, and the switch S4, the switch S5, the switch S6 and the switch S7 form an output side switch group; the positive input capacitor module and the negative input capacitor module are identical in structure, and the positive feedback capacitor module and the negative feedback capacitor module are identical in structure;
the first scheme is as follows: a positive input end INP and a negative input end INN of the amplifying circuit are respectively butted with a positive input capacitance module and a negative input capacitance module through an input side switch group, and then the positive input capacitance module and the negative input capacitance module are sequentially connected in series with a first structure constructed by an operational amplifier OPA and two feedback capacitance modules, an output side switch group to a positive output end OUTP and a negative output end OUTN of the amplifying circuit through the two input capacitance modules;
or the scheme II: the positive input end INP and the negative input end INN of the amplifying circuit are firstly respectively butted with the positive input capacitance module and the negative input capacitance module, and then the two input capacitance modules are sequentially connected in series with the input side switch group, the second structure constructed by the operational amplifier OPA and the two feedback capacitance modules, and the output side switch group to the positive output end OUTP and the negative output end OUTN of the amplifying circuit.
2. The signal gain configurable amplifier circuit according to claim 1, wherein said first scheme comprises the following steps:
the positive input end INP of the amplifying circuit is commonly butted with the input end of the positive input capacitance module through a switch S0 and the negative input end INN through a switch S2, and the positive input end INP of the amplifying circuit is commonly butted with the input end of the negative input capacitance module through a switch S1 and the negative input end INN through a switch S3;
the output end of the forward input capacitor module is respectively butted with the input end of the forward feedback capacitor module and the positive input end of the operational amplifier OPA; the output end of the positive feedback capacitance module is butted with the negative output end of the operational amplifier OPA, the butted end is butted with the negative output end OUTN of the amplifying circuit through a switch S4, and the butted end is butted with the positive output end OUTP of the amplifying circuit through a switch S6;
the output end of the negative input capacitor module is respectively butted with the input end of the negative feedback capacitor module and the negative input end of the operational amplifier OPA; the output terminal of the negative feedback capacitor module is connected to the positive output terminal of the operational amplifier OPA, and the connection terminal is connected to the negative output terminal OUTN of the amplifying circuit through the switch S5, and the connection terminal is connected to the positive output terminal OUTP of the amplifying circuit through the switch S7.
3. The signal gain configurable amplifier circuit according to claim 1, wherein said scheme two comprises the following:
a positive input end INP of the amplifying circuit is butted with an input end of the positive input capacitor module, and a negative input end INN of the amplifying circuit is butted with an input end of the negative input capacitor module;
the output end of the forward input capacitor module is connected with the input end of the forward feedback capacitor module, and the output end of the forward input capacitor module is connected with the positive input end of the operational amplifier OPA through a switch S0 and connected with the negative input end of the operational amplifier OPA through a switch S2; the output end of the negative input capacitor module is butted with the input end of the negative feedback capacitor module, and the output end of the negative input capacitor module is butted with the positive input end of the operational amplifier OPA through a switch S1 and the negative input end of the operational amplifier OPA through a switch S3;
the output end of the positive feedback capacitance module is connected with a negative output end OUTN of the amplifying circuit, and the negative output end OUTN of the amplifying circuit is connected with a negative output end of the operational amplifier OPA through a switch S4 and connected with a positive output end of the operational amplifier OPA through a switch S6; the output terminal of the negative feedback capacitance module is connected to the positive output terminal OUTP of the amplifying circuit, and the positive output terminal OUTP of the amplifying circuit is connected to the negative output terminal of the operational amplifier OPA through the switch S5 and connected to the positive output terminal of the operational amplifier OPA through the switch S7.
4. A configurable signal gain amplifier circuit as claimed in any one of claims 1 to 3, wherein: the positive input capacitor module and the negative input capacitor module respectively comprise N sub-input capacitor assemblies, and N is an integer not less than 1; each sub-input capacitor assembly in the positive input capacitor module corresponds to each sub-input capacitor assembly in the negative input capacitor module one by one; each sub-input capacitor assembly in the forward input capacitor module respectively comprises a forward input capacitor CIP, the forward input capacitors CIP are connected in parallel, one end of the parallel structure is used as the input end of the forward input capacitor module, and the other end of the parallel structure is used as the output end of the forward input capacitor module;
each sub-input capacitor assembly in the negative input capacitor module respectively comprises a negative input capacitor CIN, the negative input capacitors CIN are connected in parallel, one end of the parallel structure is used as the input end of the negative input capacitor module, and the other end of the parallel structure is used as the output end of the negative input capacitor module.
5. The signal gain configurable amplifier circuit according to claim 4, wherein: each sub-input capacitor assembly in the forward input capacitor module further comprises a switch S10 and a switch S11 respectively, wherein in each sub-input capacitor assembly, the switch S10 is connected with the corresponding forward input capacitor CIP in series, and the connection position between the switch S3526 and the corresponding forward input capacitor CIP is connected with a direct-current voltage VDC through a switch S11; one end of the switch S10 of each sub-input capacitor assembly, which faces away from the connected forward input capacitor CIP, is connected with each other to form the input end of the forward input capacitor module, and one end of the forward input capacitor CIP of each sub-input capacitor assembly, which faces away from the connected switch S10, is connected with each other to form the output end of the forward input capacitor module;
each sub-input capacitor assembly in the negative input capacitor module further comprises a switch S12 and a switch S13, wherein in each sub-input capacitor assembly, the switch S12 is connected in series with the corresponding negative input capacitor CIN, and the connection position between the switch S3526 and the corresponding negative input capacitor CIN is butted with a direct-current voltage VDC through a switch S13; the ends of the switches S12 of the sub-input capacitance elements facing away from the connected negative input capacitance CIN are connected to each other to form the input end of the negative input capacitance module, and the ends of the negative input capacitance CIN of the sub-input capacitance elements facing away from the connected switches S12 are connected to each other to form the output end of the negative input capacitance module.
6. The signal gain configurable amplifier circuit according to claim 5, wherein: the switch S10 in each sub-input capacitor module in the positive input capacitor module and the switch S12 in the corresponding sub-input capacitor module in the negative input capacitor module receive the same signal G for control, the switch S11 in each sub-input capacitor module in the positive input capacitor module and the switch S13 in the corresponding sub-input capacitor module in the negative input capacitor module receive the same signal GB for control, and the signal G and the signal GB for the same sub-input capacitor module are in an inverse relationship with each other.
7. A configurable signal gain amplifier circuit as claimed in any one of claims 1 to 3, wherein: the positive feedback capacitance module comprises a switch S8 and M sub-feedback capacitance components, the negative feedback capacitance module comprises a switch S9 and M sub-feedback capacitance components, and M is an integer not less than 1; each sub-feedback capacitor assembly in the positive feedback capacitor module corresponds to each sub-feedback capacitor assembly in the negative feedback capacitor module one by one;
each sub-feedback capacitor component in the forward feedback capacitor module respectively comprises a forward cross-over capacitor CFP, a switch S8 and each forward cross-over capacitor CFP are connected in parallel, one end of the parallel structure is used as the input end of the forward feedback capacitor module, and the other end of the parallel structure is used as the output end of the forward feedback capacitor module;
each sub-feedback capacitor assembly in the negative feedback capacitor module respectively comprises a negative cross-over capacitor CFN, the switch S9 and each negative cross-over capacitor CFN are connected in parallel, one end of the parallel structure is used as an input end of the negative feedback capacitor module, and the other end of the parallel structure is used as an output end of the negative feedback capacitor module.
8. The signal gain configurable amplifier circuit according to claim 7, wherein: each sub-feedback capacitor assembly in the forward feedback capacitor module further comprises a switch S14 and a switch S15, wherein in each sub-feedback capacitor assembly, the switch S14 is connected in series with the corresponding forward cross-over capacitor CFP, and the connection position between the switch S3526 and the corresponding forward cross-over capacitor CFP is butted with a direct-current voltage VDC through a switch S15; one end of the forward cross-over capacitor CFP of each sub-feedback capacitor assembly, which is back to the connected switch S14, and one end of the switch S8 are connected to each other to form an input end of the forward feedback capacitor module, and one end of the switch S14 of each sub-feedback capacitor assembly, which is back to the connected forward cross-over capacitor CFP, and the other end of the switch S8 are connected to each other to form an output end of the forward feedback capacitor module;
each sub-feedback capacitor assembly in the negative feedback capacitor module further comprises a switch S16 and a switch S17, wherein in each sub-feedback capacitor assembly, the switch S16 is connected in series with the corresponding negative cross-over capacitor CFN, and the connection position between the switch S3526 and the corresponding negative cross-over capacitor CFN is butted with a direct-current voltage VDC through a switch S17; one end of the negative cross-over capacitor CFN of each sub-feedback capacitor assembly, which is opposite to the connected switch S16, and one end of the switch S9 are connected to each other to form an input end of the negative feedback capacitor module, and one end of the switch S16 of each sub-feedback capacitor assembly, which is opposite to the connected negative cross-over capacitor CFN, and the other end of the switch S9 are connected to each other to form an output end of the negative feedback capacitor module.
9. The signal gain configurable amplifier circuit according to claim 8, wherein: the switch S14 in each sub-feedback capacitor module in the positive feedback capacitor module and the switch S16 in the corresponding sub-feedback capacitor module in the negative feedback capacitor module respectively receive the same signal GF for control, the switch S15 in each sub-feedback capacitor module in the positive feedback capacitor module and the switch S17 in the corresponding sub-feedback capacitor module in the negative feedback capacitor module respectively receive the same signal GFB for control, and the signal GF and the signal GFB for the same sub-feedback capacitor module are in an inverse relation to each other.
10. A configurable signal gain amplifier circuit as claimed in any one of claims 1 to 3, wherein: the switch S0, the switch S3, the switch S4 and the switch S7 are all controlled by receiving a clock signal CKC1, the switch S1, the switch S2, the switch S5 and the switch S6 are all controlled by receiving a clock signal CKC2, and the clock signal CKC1 and the clock signal CKC2 are opposite in phase and do not overlap with each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010205251.9A CN111082767B (en) | 2020-03-23 | 2020-03-23 | Amplifying circuit capable of configuring signal gain |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010205251.9A CN111082767B (en) | 2020-03-23 | 2020-03-23 | Amplifying circuit capable of configuring signal gain |
Publications (2)
Publication Number | Publication Date |
---|---|
CN111082767A true CN111082767A (en) | 2020-04-28 |
CN111082767B CN111082767B (en) | 2020-07-24 |
Family
ID=70324666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010205251.9A Active CN111082767B (en) | 2020-03-23 | 2020-03-23 | Amplifying circuit capable of configuring signal gain |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111082767B (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1399410A (en) * | 2001-06-18 | 2003-02-26 | 三洋电机株式会社 | A/D converter circuit |
CN101814920A (en) * | 2010-05-05 | 2010-08-25 | 余浩 | Analog-digital converter with sample hold and MDAC (Multiplying Digital-to-Analog Conversion) sharing capacitance and operational amplifier in time sharing way |
CN203984362U (en) * | 2014-04-26 | 2014-12-03 | 长沙云腾微电子有限公司 | A kind of programmable gain amplifier |
CN107809249A (en) * | 2016-09-09 | 2018-03-16 | 亚德诺半导体集团 | The condenser type gain amplifying circuit of fast and stable |
-
2020
- 2020-03-23 CN CN202010205251.9A patent/CN111082767B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1399410A (en) * | 2001-06-18 | 2003-02-26 | 三洋电机株式会社 | A/D converter circuit |
CN101814920A (en) * | 2010-05-05 | 2010-08-25 | 余浩 | Analog-digital converter with sample hold and MDAC (Multiplying Digital-to-Analog Conversion) sharing capacitance and operational amplifier in time sharing way |
CN203984362U (en) * | 2014-04-26 | 2014-12-03 | 长沙云腾微电子有限公司 | A kind of programmable gain amplifier |
CN107809249A (en) * | 2016-09-09 | 2018-03-16 | 亚德诺半导体集团 | The condenser type gain amplifying circuit of fast and stable |
Also Published As
Publication number | Publication date |
---|---|
CN111082767B (en) | 2020-07-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100888031B1 (en) | Ratio-independent switched capacitor amplifier with precision gain of two and operation method thereof | |
US6674322B2 (en) | Amplifier circuit with offset compensation | |
US6476671B1 (en) | Ping-pong amplifier with auto-zeroing and chopping | |
US20130293294A1 (en) | Programmable gain amplifier with amplifier common mode sampling system | |
US6573785B1 (en) | Method, apparatus, and system for common mode feedback circuit using switched capacitors | |
CN111446935A (en) | Differential signal amplifying circuit, digital isolator and digital receiver | |
US6498530B1 (en) | Auto-zeroed ping-pong amplifier with low transient switching | |
US7795959B2 (en) | Switched-capacitor circuit having switch-less feedback path | |
CN111295837B (en) | Capacitively Coupled Chopper Amplifier | |
EP2064812B1 (en) | Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit | |
CN102386862B (en) | There is operational amplifier and the method thereof of overdriving circuit | |
US20140210547A1 (en) | Operational amplifier circuit | |
US7961042B2 (en) | Amplifier circuit and magnetic sensor | |
EP1315290B1 (en) | Pseudo-differential amplifier and analog-to-digital converter using the same | |
CN111082767B (en) | Amplifying circuit capable of configuring signal gain | |
US6727749B1 (en) | Switched capacitor summing system and method | |
EP0744829A1 (en) | A high-pass filter, particularly for cancelling out the offset in a chain of amplifiers | |
US20230188105A1 (en) | Analog signal processing circuit and method for eliminating dc offset voltage | |
US20230336135A1 (en) | Semiconductor circuit | |
US7518439B1 (en) | High precision gain amplifier without precision passive components | |
US20160211873A1 (en) | Wireless receiver with high linearity | |
CN114844479B (en) | Capacitive programmable amplifier | |
US20170353166A1 (en) | Amplifier circuit and multipath nested miller amplifier circuit | |
JP2014150477A (en) | Semiconductor device | |
CN115021687B (en) | Operational amplifier and electronic system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |