CN111063661A - Flip chip packaging method - Google Patents
Flip chip packaging method Download PDFInfo
- Publication number
- CN111063661A CN111063661A CN201911292355.1A CN201911292355A CN111063661A CN 111063661 A CN111063661 A CN 111063661A CN 201911292355 A CN201911292355 A CN 201911292355A CN 111063661 A CN111063661 A CN 111063661A
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- flip chip
- conductive resin
- packaging
- glue
- metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Abstract
The invention discloses a flip chip packaging method, which comprises the following steps: mounting the flip chip and the surface mounting device on the surface of a packaging substrate; bottom filling glue on the bottom of the flip chip to prevent short circuit; performing integral glue filling on the surface mounting device to prevent short circuit; the flip chip, the surface mount device, and the package substrate are integrally encapsulated by using a conductive resin adhesive containing a metal component or an alloy component. According to the invention, by changing the colloid material of the sealing glue, the traditional non-conductive resin black glue is replaced by the conductive resin glue containing metal or alloy components, so that the EMI electromagnetic shielding metal sputtering process step is removed, the shielding grounding function can be realized without the EMI metal sputtering process, and the effect of reducing the cost investment is achieved. In addition, the thickness of the chip packaged by the process is thinner, the size of a heat dissipation element which does not need to be mounted is smaller, and the effect of reducing the packaging size is achieved.
Description
Technical Field
The invention relates to the technical field of chip packaging, in particular to a flip chip packaging method.
Background
Packaging is a technique for packaging integrated circuits with an insulating plastic or ceramic material. Taking a CPU as an example, the volume and appearance actually seen are not the size and appearance of a real CPU core, but are the products of packaged components such as the CPU core. Packaging techniques are necessary and critical for the chip. Because the chip must be isolated from the outside to prevent the electrical performance degradation caused by the corrosion of the chip circuit by impurities in the air. On the other hand, the packaged chip is more convenient to mount and transport. The quality of the packaging technology is also of great importance since it directly affects the performance of the chip itself and the design and manufacture of the PCB (printed circuit board) to which it is connected.
At present, the conventional flip chip packaging process generally includes: firstly, an SMD (surface mounted device) and a Flipchip are mounted on the surface of a substrate, then Underfill is carried out on the bottom of the Flipchip, the FLipchip and the SMD are sealed by non-conductive resin black glue, and finally the surface and the periphery of the product are wrapped by metal by using an EMI (electromagnetic shielding) metal sputtering process to achieve the purposes of electromagnetic shielding and grounding. However, the EMI metal sputtering process is complex and very expensive, and the EMI sputtering equipment needs to be invested in tens of millions of dollars. In addition, the package size of such a packaging process is large.
Disclosure of Invention
In view of the above, there is a need to provide a flip chip packaging method that can simplify the process flow, reduce the cost, and reduce the package size.
A flip chip packaging method, the method comprising:
mounting the flip chip and the surface mounting device on the surface of a packaging substrate;
bottom filling glue on the bottom of the flip chip to prevent short circuit;
performing integral glue filling on the surface mounting device to prevent short circuit;
the flip chip, the surface mount device, and the package substrate are integrally encapsulated by using a conductive resin adhesive containing a metal component or an alloy component.
In one embodiment, before the step of mounting the flip chip and the surface mount device on the surface of the package substrate, the method further includes:
and designing a grounding PAD at the edge of the packaging substrate.
In one embodiment, the step of integrally encapsulating the flip chip, the surface mount device, and the package substrate by using a conductive resin adhesive containing a metal component or an alloy component further includes:
and cutting the packaged chip into single products.
In one embodiment, the step of integrally molding the flip chip, the surface mount device, and the package substrate by using a conductive resin adhesive containing a metal component or an alloy component further includes:
and the flip chip, the surface mounting device and the packaging substrate are integrally sealed by using an electric and heat conducting resin adhesive containing metal components or alloy components.
In one embodiment, the components of the electrically and thermally conductive resin adhesive include: epoxy resin, a hardener, a metal filler, a catalyst, a coupling agent and a parting agent.
According to the flip chip packaging method provided by the invention, the colloid material of the sealing glue is changed, and the traditional non-conductive resin black glue is replaced by the conductive resin glue containing metal or alloy components, so that the EMI electromagnetic shielding metal sputtering process step is removed, the shielding grounding function can be realized without the EMI metal sputtering process, and the effect of reducing the cost input is achieved. In addition, the thickness of the chip packaged by the process is thinner, the size of a heat dissipation element which does not need to be mounted is smaller, and the effect of reducing the packaging size is achieved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a flip chip package structure in the prior art;
FIG. 2 is a schematic structural diagram of a flip chip package structure according to an embodiment;
FIG. 3 is a flow chart illustrating a flip chip packaging method according to an embodiment;
fig. 4 is a flow chart illustrating a flip chip packaging method in another embodiment.
Detailed Description
The technical solutions in the embodiments will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, wherein like reference numerals represent like elements in the drawings.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the embodiments of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the invention. As used in the description of embodiments of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
In the prior art, as shown in fig. 1, the flip chip packaging process generally includes the following four steps:
in a first step, an SMD (surface mounted device) (12) and a Flipchip (13) are mounted on a surface of a substrate (11).
In the second step, Underfill (14) is applied to the bottom of Flipchip (13).
And thirdly, sealing the FLipchip (13) and the SMD (12) by using a non-conductive resin black glue (15).
Fourthly, using EMI (electromagnetic shielding) (16) metal sputtering technology to wrap the surface and the periphery of the product with metal so as to achieve the purposes of electromagnetic shielding and grounding. In addition, many heat-sensitive chips require heat dissipation components such as heat dissipation blocks to be mounted on the front or back of the product, which further increases the size of the product.
Based on this, the invention provides a novel flip chip packaging method, aiming at simplifying the process flow, reducing the cost and reducing the packaging size.
In one embodiment, as shown in fig. 3, there is provided a flip chip packaging method, the method comprising:
302, mounting the flip chip and the surface mount device on the surface of a packaging substrate;
step 304, performing bottom filling glue on the bottom of the flip chip to prevent short circuit;
step 306, performing integral glue filling on the surface mounting device to prevent short circuit;
step 308, the flip chip, the surface mount device, and the package substrate are integrally encapsulated by using a conductive resin adhesive containing a metal component or an alloy component.
Specifically, in the flip chip packaging method provided by this embodiment, the resin adhesive containing metal or alloy components and having a conductive function is used to replace the conventional non-conductive resin black adhesive in the sealing process, and the electromagnetic shielding purpose is achieved after baking and curing. In addition, the novel resin adhesive containing metal or alloy components and having the electric conduction and heat conduction functions can be used for replacing the traditional non-electric conduction resin black adhesive, and the purposes of heat dissipation and the like can be achieved after baking and curing.
The thickness of the packaging body can be reduced by the process provided by the invention, so that the purposes of light weight, thinness, shortness and smallness are achieved, and the thickness is reduced by more than 30um compared with the thickness of the traditional sealing glue and EMI sputtering process. The process method does not need an EMI electromagnetic shielding metal sputtering process, reduces the cost investment of equipment and auxiliary materials, simplifies the process flow and shortens the production time of the product period.
In the embodiment, the colloid material of the sealing glue is changed, and the traditional non-conductive resin black glue is replaced by the conductive resin glue containing metal or alloy components, so that the EMI electromagnetic shielding metal sputtering process step is removed, the shielding grounding function can be realized without the EMI metal sputtering process, and the effect of reducing the cost investment is achieved. In addition, the thickness of the chip packaged by the process is thinner, the size of a heat dissipation element which does not need to be mounted is smaller, and the effect of reducing the packaging size is achieved.
In one embodiment, as shown in fig. 4, there is provided a flip chip packaging method, the method comprising:
step 402, designing a grounding PAD at the edge of the packaging substrate;
step 404, attaching the flip chip and the surface mount device to the surface of the packaging substrate;
step 406, performing bottom filling glue on the bottom of the flip chip to prevent short circuit;
step 408, performing integral glue filling on the surface mounting device to prevent short circuit;
step 410, integrally sealing the flip chip, the surface mount device and the package substrate with a conductive resin adhesive containing a metal component or an alloy component;
at step 412, the packaged chips are cut into individual products.
Specifically, with reference to fig. 2, the packaging process provided in this embodiment specifically includes:
1. and a grounding PAD (21) is designed at the edge of the substrate.
2. The SMD (12) and the Flipchip (13) are mounted through furnace soldering to the substrate (11).
3. The Flipchip (13) is underfilled with the Underfill (14) while the SMD (12) components are entirely wrapped with the Underfill (14) to prevent them from shorting with the next conductive resin paste.
4. The product is entirely encapsulated with a conductive resin paste (22) containing a metal component.
5. Cut into individual products.
In this embodiment, the conventional non-conductive resin black paste is replaced with a conductive resin paste containing metal or alloy components, so that the EMI metal sputtering process step is eliminated, and the shielding and grounding function can be realized.
In one embodiment, the step of integrally molding the flip chip, the surface mount device, and the package substrate by using the conductive resin paste containing the metal component or the alloy component further includes:
and the flip chip, the surface mounting device and the packaging substrate are integrally sealed by using an electric and heat conducting resin adhesive containing metal components or alloy components.
In one embodiment, the components of the electrically and thermally conductive resin paste include: epoxy resin, a hardener, a metal filler, a catalyst, a coupling agent and a parting agent.
Specifically, in the present embodiment, the whole sealing compound uses an electrically and thermally conductive resin adhesive, which can be various commercially available resin adhesives with electrically and thermally conductive functions. In a specific embodiment, the components of the electrically and thermally conductive resin adhesive include: epoxy resin, a hardener, a metal filler, a catalyst, a coupling agent, a mold release agent and the like. Therefore, on the basis of realizing the shielding grounding function, the radiating function is additionally added, a radiating element does not need to be pasted, the packaging size is reduced, and the thickness is thinner.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
While the invention has been described with reference to specific embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (5)
1. A flip chip packaging method, the method comprising:
mounting the flip chip and the surface mounting device on the surface of a packaging substrate;
bottom filling glue on the bottom of the flip chip to prevent short circuit;
performing integral glue filling on the surface mounting device to prevent short circuit;
the flip chip, the surface mount device, and the package substrate are integrally encapsulated by using a conductive resin adhesive containing a metal component or an alloy component.
2. The flip chip packaging method of claim 1, further comprising, prior to the step of mounting the flip chip and the surface mount device on the surface of the package substrate:
and designing a grounding PAD at the edge of the packaging substrate.
3. The flip chip packaging method of claim 1, further comprising, after the step of integrally molding the flip chip, the surface mount device, and the package substrate by using a conductive resin paste containing a metal component or an alloy component:
and cutting the packaged chip into single products.
4. The flip chip packaging method of any one of claims 1 to 3, wherein the step of integrally encapsulating the flip chip, the surface mount device, and the package substrate by using a conductive resin paste containing a metal component or an alloy component further comprises:
and the flip chip, the surface mounting device and the packaging substrate are integrally sealed by using an electric and heat conducting resin adhesive containing metal components or alloy components.
5. The flip chip packaging method of claim 4, wherein the electrically and thermally conductive resin paste comprises: epoxy resin, a hardener, a metal filler, a catalyst, a coupling agent and a parting agent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911292355.1A CN111063661A (en) | 2019-12-16 | 2019-12-16 | Flip chip packaging method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911292355.1A CN111063661A (en) | 2019-12-16 | 2019-12-16 | Flip chip packaging method |
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| CN111063661A true CN111063661A (en) | 2020-04-24 |
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| CN201911292355.1A Pending CN111063661A (en) | 2019-12-16 | 2019-12-16 | Flip chip packaging method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111916358A (en) * | 2020-08-20 | 2020-11-10 | 鑫金微半导体(深圳)有限公司 | Novel packaging method of ultra-thin power device |
| CN114242654A (en) * | 2022-02-23 | 2022-03-25 | 威海嘉瑞光电科技股份有限公司 | Leadless magnetic packaging structure and manufacturing method thereof |
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Application publication date: 20200424 |