CN111061512A - Method, device and equipment for processing branch instruction and storage medium - Google Patents
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Abstract
The invention discloses a branch instruction processing method, which comprises the following steps: when a branch instruction is obtained, obtaining the current context information of the branch instruction; inquiring prestored context information corresponding to the branch instruction; judging whether the current context information is consistent with the pre-stored context information; and if the branch instruction is consistent with the pre-stored jump address, acquiring the pre-stored jump address corresponding to the branch instruction so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address. The invention also discloses a branch instruction processing device, equipment and a storage medium. The invention can prevent the problem of executing the instruction according to the wrong branch program after being attacked.
Description
Technical Field
The present invention relates to the field of computers, and in particular, to a method, an apparatus, a device, and a storage medium for processing branch instructions.
Background
Branch Prediction (Branch Prediction) is an advanced data processing method from the P5 era, which solves the problem of pipeline failure caused by processing Branch instructions (if-then-else), and the processor can predict the proceeding direction of program branches to increase the operation speed. The current branch prediction mode generally performs instruction fetching and instruction execution operations directly according to the target jump address predicted by the branch predictor. While an attacker may cause code that predicts execution to read secure data by operating the branch predictor, during which the data read at the time of prediction may change the processor micro-architectural state, such as by reading the secure data into a cache, although the results of the incorrect branch prediction are not committed, an attack known as a ghost (spectrum) attack. Predicted execution by the current processor may execute hundreds of instructions ahead of time so that the attacker has sufficient time to implement a Spectre attack based on the wrong processor microarchitectural state change. According to the manner of attacker-induced branch prediction, spectra attacks can be divided into two categories: inducing the error attack of the conditional branch jump direction prediction and inducing the error attack of the indirect jump branch target address prediction. The attack makes the processor always predict the branch condition to be true by continuously providing the value meeting the condition of the jump statement, thereby making the processor execute according to the path predicted by mistake, or makes the processor execute the indirect branch jump repeatedly in the same address space or different address spaces, thereby inducing the prediction of the indirect jump branch target address, and making the processor carry out instruction fetching operation according to the indirect jump branch target address predicted by mistake.
Therefore, the conventional processing method for the branch instruction has the problem that the instruction is easily attacked and the instruction execution is performed according to the wrong branch program.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide a branch instruction processing method, a branch instruction processing device, branch instruction processing equipment and a storage medium, and aims to solve the technical problem that the branch instruction processing method is easy to attack and executes instructions according to wrong branch programs.
In order to achieve the above object, the present invention provides a method for processing branch instructions, including: when a branch instruction is obtained, obtaining the current context information of the branch instruction; inquiring prestored context information corresponding to the branch instruction; judging whether the current context information is consistent with the pre-stored context information; and if the branch instruction is consistent with the pre-stored jump address, acquiring the pre-stored jump address corresponding to the branch instruction so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address.
Optionally, the step of obtaining the current context information of the branch instruction specifically includes: inquiring a stack corresponding to the basic block where the branch instruction is located, and acquiring a stack top pointer; acquiring the thread number of the thread where the branch instruction is located and the process number of the process to which the thread belongs; and taking the stack top pointer, the thread number and the process number as current context information.
Optionally, the step of using the stack top pointer, the thread number, and the process number as current context information specifically includes: and taking the stack top pointer, the thread number and the process number as input information, calculating the input information by utilizing a hash algorithm to obtain a corresponding hash value, and taking the hash value as current context information.
Optionally, the step of querying pre-stored context information corresponding to the branch instruction specifically includes: inquiring a branch target buffer and a return address stack corresponding to a basic block where the branch instruction is located, and reading pre-stored context information corresponding to the branch instruction from the branch target buffer or the return address stack; wherein, the record items in the branch target buffer and the return address stack are both used for recording the pre-stored jump address and the pre-stored context information corresponding to the executed branch instruction in the basic block; the step of obtaining the pre-stored jump address corresponding to the branch instruction specifically includes: and inquiring the branch target buffer and the return address stack according to the branch instruction, and reading a pre-stored jump address corresponding to the branch instruction from the branch target buffer.
Optionally, after the step of determining whether the current context information is consistent with the pre-stored context information, the method for processing the branch instruction further includes: and if the actual jump addresses are inconsistent, reading the actual jump address corresponding to the branch instruction from the address register so as to execute the instruction in the actual jump address.
Optionally, after the step of reading the actual jump address corresponding to the branch instruction from the address register to execute the instruction from the actual jump address if the actual jump address is not consistent with the actual jump address, the method for processing the branch instruction further includes: and updating the pre-stored jump address to the actual jump address, and updating the pre-stored context information to the current context information.
Optionally, if the actual jump address is not consistent with the actual jump address, reading the actual jump address corresponding to the branch instruction from an address register to execute the instruction in the actual jump address, where the step specifically includes: if not, reading an actual jump address corresponding to the branch instruction from an address register; clearing the instructions in the instruction pre-fetching queue; and reading the instruction to be executed in the actual jump address, and writing the instruction to be executed into the instruction pre-fetching queue to execute the instruction to be executed in the instruction pre-fetching queue.
In order to achieve the above object, the present invention also provides a branch instruction processing apparatus, including: the first obtaining module is used for obtaining the current context information of the branch instruction when the branch instruction is obtained; the query module is used for querying the pre-stored context information corresponding to the branch instruction; the judging module is used for judging whether the current context information is consistent with the pre-stored context information; and the second obtaining module is used for obtaining the pre-stored jump address corresponding to the branch instruction if the branch instruction is consistent with the pre-stored jump address so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address.
Further, to achieve the above object, the present invention also provides a branch instruction processing apparatus including: the processor is used for processing the branch instructions, and the processor is used for processing the branch instructions, wherein the processor is used for executing the branch instructions.
In order to achieve the above object, the present invention further provides a storage medium having a stored program of branch instructions, which when executed by a processor implements the steps of the method of processing branch instructions as described above.
According to the branch instruction processing method, the branch instruction processing device, the branch instruction processing equipment and the branch instruction processing storage medium, when a branch instruction is obtained, current context information of the branch instruction is obtained, pre-stored context information corresponding to the branch instruction is inquired, whether the current context information is consistent with the pre-stored context information or not is judged, if so, a pre-stored jump address corresponding to the branch instruction is obtained, and a pre-fetch instruction pre-fetched from the pre-stored jump address is executed; before instruction fetching is carried out according to the pre-stored jump address, whether the current context information is consistent with the pre-stored context information or not is judged, and when the current context information is consistent with the pre-stored context information, namely the predicted pre-stored jump instruction corresponding to the branch instruction is judged not to be maliciously attacked to cause prediction errors, the pre-stored jump address corresponding to the branch instruction is obtained again to execute the pre-fetch instruction pre-fetched from the pre-stored jump address, so that the problem that instruction execution is carried out according to an incorrect branch program after the instruction fetching is attacked is solved.
Drawings
Fig. 1 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a method of processing branch instructions according to an embodiment of the present invention;
FIG. 3a is a block diagram of an exemplary code for a method of processing branch instructions according to an embodiment of the present invention;
FIG. 3b is a diagram illustrating a structure of a program stack corresponding to the code example of FIG. 3 a;
FIG. 3c is a diagram illustrating a return address stack corresponding to the code example of FIG. 3 a;
FIG. 4 is a block diagram of a branch target buffer according to an embodiment of the present invention;
FIG. 5 is a detailed flowchart of "get current context information for the branch instruction" based on the step of FIG. 2;
FIG. 6 is a flowchart based on steps after step S206 of FIG. 2;
fig. 7 is a flowchart based on steps after step S602 of fig. 6;
fig. 8 is a detailed flowchart based on step S602 of fig. 6;
FIG. 9 is a block diagram of an embodiment of a branch instruction processing apparatus according to the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The hardware operating environment of the embodiment of the invention can be a terminal or a server. The server may be implemented by a server cluster formed by a plurality of servers. The present embodiment takes a hardware operating environment as an example for explanation.
As shown in fig. 1, fig. 1 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present invention.
The terminal of the embodiment of the invention can be a PC, and can also be a mobile terminal device with a display function, such as a smart phone, a tablet computer, an electronic book reader, an MP3(Moving Picture Experts Group Audio Layer III, dynamic video Experts compress standard Audio Layer 3) player, an MP4(Moving Picture Experts Group Audio Layer IV, dynamic video Experts compress standard Audio Layer 4) player, a portable computer, and the like.
As shown in fig. 1, the terminal may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, a communication bus 1002. Wherein a communication bus 1002 is used to enable connective communication between these components. The user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface). The memory 1005 may be a high-speed RAM memory or a non-volatile memory (e.g., a magnetic disk memory). The memory 1005 may alternatively be a storage device separate from the processor 1001.
Optionally, the terminal may further include a camera, a Radio Frequency (RF) circuit, a sensor, an audio circuit, a WiFi module, and the like. Such as light sensors, motion sensors, and other sensors. Specifically, the light sensor may include an ambient light sensor that may adjust the brightness of the display screen according to the brightness of ambient light, and a proximity sensor that may turn off the display screen and/or the backlight when the mobile terminal is moved to the ear. As one of the motion sensors, the gravity acceleration sensor can detect the magnitude of acceleration in each direction (generally, three axes), detect the magnitude and direction of gravity when the mobile terminal is stationary, and can be used for applications (such as horizontal and vertical screen switching, related games, magnetometer attitude calibration), vibration recognition related functions (such as pedometer and tapping) and the like for recognizing the attitude of the mobile terminal; of course, the mobile terminal may also be configured with other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, and an infrared sensor, which are not described herein again.
Those skilled in the art will appreciate that the terminal structure shown in fig. 1 is not intended to be limiting and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a memory 1005, which is a kind of computer storage medium, may include therein an operating system, a network communication module, a user interface module, and a handler of a branch instruction.
In the terminal shown in fig. 1, the network interface 1004 is mainly used for connecting to a backend server and performing data communication with the backend server; the user interface 1003 is mainly used for connecting a client (user side) and performing data communication with the client; and the processor 1001 may be configured to call a handler of a branch instruction stored in the memory 1005 and perform the following operations: when a branch instruction is obtained, obtaining the current context information of the branch instruction; inquiring prestored context information corresponding to the branch instruction; judging whether the current context information is consistent with the pre-stored context information; and if the branch instruction is consistent with the pre-stored jump address, acquiring the pre-stored jump address corresponding to the branch instruction so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address.
Optionally, the step of obtaining the current context information of the branch instruction specifically includes: inquiring a stack corresponding to the basic block where the branch instruction is located, and acquiring a stack top pointer; acquiring the thread number of the thread where the branch instruction is located and the process number of the process to which the thread belongs; and taking the stack top pointer, the thread number and the process number as current context information.
Optionally, the step of using the stack top pointer, the thread number, and the process number as current context information specifically includes: and taking the stack top pointer, the thread number and the process number as input information, calculating the input information by utilizing a hash algorithm to obtain a corresponding hash value, and taking the hash value as current context information.
Optionally, the step of querying pre-stored context information corresponding to the branch instruction specifically includes: inquiring a branch target buffer and a return address stack corresponding to a basic block where the branch instruction is located, and reading pre-stored context information corresponding to the branch instruction from the branch target buffer or the return address stack; wherein, the record items in the branch target buffer and the return address stack are both used for recording the pre-stored jump address and the pre-stored context information corresponding to the executed branch instruction in the basic block; the step of obtaining the pre-stored jump address corresponding to the branch instruction specifically includes: and inquiring the branch target buffer and the return address stack according to the branch instruction, and reading a pre-stored jump address corresponding to the branch instruction from the branch target buffer.
Optionally, after the step of determining whether the current context information is consistent with the pre-stored context information, the method for processing the branch instruction further includes: and if the actual jump addresses are inconsistent, reading the actual jump address corresponding to the branch instruction from the address register so as to execute the instruction in the actual jump address.
Optionally, after the step of reading the actual jump address corresponding to the branch instruction from the address register to execute the instruction from the actual jump address if the actual jump address is not consistent with the actual jump address, the method for processing the branch instruction further includes: and updating the pre-stored jump address to the actual jump address, and updating the pre-stored context information to the current context information.
Optionally, if the actual jump address is not consistent with the actual jump address, reading the actual jump address corresponding to the branch instruction from an address register to execute the instruction in the actual jump address, where the step specifically includes: if not, reading an actual jump address corresponding to the branch instruction from an address register; clearing the instructions in the instruction pre-fetching queue; and reading the instruction to be executed in the actual jump address, and writing the instruction to be executed into the instruction pre-fetching queue to execute the instruction to be executed in the instruction pre-fetching queue.
Referring to fig. 2, an embodiment of a method for processing a branch instruction includes the following steps:
step S202, when a branch instruction is obtained, obtaining the current context information of the branch instruction;
it should be noted that the branch instruction (if-then-else) may be, but is not limited to, a function call instruction, a conditional instruction, a return instruction, and the like. The context information includes, but is not limited to, a stack top pointer of a stack corresponding to a basic block where the branch instruction is located, a thread number of a thread where the branch instruction is located, a process number of a process to which the thread belongs, and the like. Specifically, the terminal queries the block number of the basic block where the branch instruction is located, queries the corresponding stack according to the block number, and obtains the top pointer. Further, the terminal obtains the thread number of the thread where the branch instruction is located and the process number of the process to which the thread number belongs.
Step S204, inquiring prestored context information corresponding to the branch instruction;
wherein the pre-stored context information is pre-stored locally. In one embodiment, the pre-stored context information may be stored in a Branch Target Buffer (BTB) or a Return Address Stack (RAS). In this embodiment, the pre-stored context information corresponding to the first type of branch instruction is stored in the RAS. The pre-stored context information corresponding to the second type of branch instruction is stored in the BTB. Wherein the first type of branch instruction may be, but is not limited to, a function call instruction, wherein the function call instruction includes a function return instruction. The second type of branch instruction may be, but is not limited to, a conditional jump instruction, such as an if, then, else, or the like instruction. Furthermore, the RAS and the BTB also store a pre-stored jump address corresponding to the branch instruction.
The operation of the RAS is explained below by a specific example.
Fig. 3a shows a section of a code example, fig. 3b is a schematic structural diagram of a program stack corresponding to the code example shown in fig. 3a, and fig. 3 is a schematic structural diagram of a return address stack corresponding to the code example shown in fig. 3 a.
It should be noted that, in this embodiment, in order to support multiple layers of function nesting, the RAS 330 is implemented by a stack structure. When the code instance 310 calls the function F1 through a function call instruction (i.e., call instruction) 311, the next instruction address of the function call instruction 311 is the return address called by the function F1, i.e., 0x 00006210. The return address is held by the function call instruction 311 at position 323 of the stack frame 321 of the function F1, while the return address is also held at position 331 of the RAS 330. When the function F1 returns, the function return instruction is detected by the RAS 330, and the return address of the function F1 is predicted by the RAS 330. The function call instruction 311 is a branch instruction, and the return address "0 x 00006210" is a pre-stored jump address corresponding to the branch instruction. When the function call instruction 312 calls the function F2, the next instruction address of the function call instruction 312 is the return address called by the function F2, i.e., 0x 00008250. The return address is saved by the function call instruction 312 at location 324 of the stack frame 322 of the function F2, while the return address is also saved at location 332 of the RAS 330. When the function F2 returns, the function return instruction is detected by the RAS 330, and the return address of the function F2 is predicted by the RAS 330. The function call instruction 312 is a branch instruction, and the return address "0 x 00008250" is a pre-stored jump address corresponding to the branch instruction.
The working principle of BTB is illustrated below by a specific example.
Figure 4 shows a schematic diagram of an example of a BTB. The BTB stores the entries in the form of a table in this embodiment. The BTB includes entries such as an instruction address 410, a pre-stored jump address 420, and pre-stored context information 430. The instruction address 410 is an index entry, and when the terminal needs to obtain the current context information corresponding to the branch instruction, the terminal queries the BTB by using the instruction address of the branch instruction as an index to obtain the pre-stored context information 430 corresponding to the instruction address. In one embodiment, the BTB further includes a prediction bit 440. The prediction bit is used to predict whether the branch instruction will jump. The prediction bit may be represented by a character, and for example, if the prediction bit is "1", it represents that the instruction corresponding to the predicted instruction address is a jump, and if the prediction bit is "0", it represents that the instruction corresponding to the predicted instruction address is not a jump.
In one embodiment, the step S204 specifically includes: inquiring a branch target buffer and a return address stack corresponding to a basic block where the branch instruction is located, and reading pre-stored context information corresponding to the branch instruction from the branch target buffer or the return address stack; and recording entries in the branch target buffer and the return address stack are used for recording a pre-stored jump address and pre-stored context information corresponding to the executed branch instruction in the basic block.
Specifically, the terminal queries a block number of a basic block where the branch instruction is located, further queries a branch target buffer corresponding to the block number according to the block number, and reads pre-stored context information from the branch target buffer if the pre-stored context information corresponding to the branch instruction is stored in the branch target buffer. If the branch instruction does not exist in the branch target buffer, the terminal inquires a return address stack corresponding to the branch instruction, and reads the pre-stored context information from the return address stack.
Step S206, judging whether the current context information is consistent with the pre-stored context information;
it should be noted that the terminal compares the current context information with the pre-stored context information. Specifically, if the context information is a set consisting of a stack top pointer, a thread number and a process number, the terminal compares the stack top pointer in the current context information with a stack top pointer in pre-stored context information, the thread number in the current context information with a thread number in the pre-stored context information, and the process number in the current context information with a process number in the pre-stored context information one by one, and when all the three are consistent, it is determined that the current context information is consistent with the pre-stored context information, otherwise, it is determined that the current context information is inconsistent with the pre-stored context information.
And step S208, if the branch instruction is consistent with the pre-stored jump address, acquiring the pre-stored jump address corresponding to the branch instruction so as to execute the pre-fetch instruction pre-fetched from the pre-stored jump address.
Further, if the current context information is consistent with the pre-stored context information, the terminal acquires the pre-stored jump address corresponding to the branch instruction, and executes the pre-fetch instruction pre-fetched from the pre-stored jump address. In this embodiment, the pre-stored jump address is associated with the branch instruction and stored locally, for example, in a branch target buffer or in a return address stack.
It should be noted that instructions are stored in a register pointed by a pre-stored jump address, and when executing a control flow instruction, the terminal prefetches the instructions from the register pointed by the pre-stored jump address and writes the instructions into an instruction prefetching queue, so that when executing a branch instruction, the terminal can directly execute the instructions in the instruction prefetching queue without further querying and reading the jump address corresponding to the branch instruction, and fetch the instructions from the jump address for execution, thereby ensuring efficient execution of the instructions.
In one embodiment, the step S208 specifically includes: and inquiring the branch target buffer and the return address stack according to the branch instruction, and reading a pre-stored jump address corresponding to the branch instruction from the branch target buffer.
In this embodiment, if the pre-stored context information corresponding to the branch instruction queried in step S204 is stored in the branch target buffer, the terminal reads the pre-stored jump address corresponding to the branch instruction from the branch target buffer; if the pre-stored context information corresponding to the branch instruction queried in step S204 is stored in the return address stack, the terminal reads the pre-stored jump address corresponding to the branch instruction from the return address stack.
In this embodiment, when a branch instruction is obtained, obtaining current context information of the branch instruction, querying pre-stored context information corresponding to the branch instruction, determining whether the current context information is consistent with the pre-stored context information, and if so, obtaining a pre-stored jump address corresponding to the branch instruction to execute a pre-fetch instruction pre-fetched from the pre-stored jump address; before instruction fetching is carried out according to the pre-stored jump address, whether the current context information is consistent with the pre-stored context information or not is judged, and when the current context information is consistent with the pre-stored context information, namely the predicted pre-stored jump instruction corresponding to the branch instruction is judged not to be maliciously attacked to cause prediction errors, the pre-stored jump address corresponding to the branch instruction is obtained again to execute the pre-fetch instruction pre-fetched from the pre-stored jump address, so that the problem that instruction execution is carried out according to an incorrect branch program after the instruction fetching is attacked is solved.
In one embodiment, referring to fig. 5, the step of obtaining the current context information of the branch instruction in step S202 specifically includes:
step S502, inquiring a stack corresponding to the basic block where the branch instruction is located, and acquiring a stack top pointer;
it will be appreciated that the current program in which the branch instruction is located is the basic block in which the branch instruction is currently located. When the terminal acquires the branch instruction, the terminal needs to acquire the current context information of the branch instruction. In this embodiment, the current context information includes a set including a stack top pointer of a stack corresponding to a basic block where the branch instruction is located, a thread number of a thread where the branch instruction is located, a process number of a process to which the thread belongs, and the like. Specifically, the terminal firstly queries the stack corresponding to the basic block where the branch instruction is located, and obtains the stack top pointer of the stack.
Step S504, obtain the thread number of the thread where the said branch instruction locates, and the process number of the process that the said thread belongs to;
further, the terminal acquires the thread number of the thread in which the branch instruction is located. Specifically, the terminal obtains the thread name of the thread where the branch instruction is located, and obtains the corresponding thread number by using the getid function according to the thread name. Wherein the thread name and the thread number are stored in a database in a correlated manner. Further, the terminal queries the process number of the process of the thread according to the thread number.
Step S506, using the stack top pointer, the thread number, and the process number as current context information.
Further, the terminal takes the acquired stack top pointer, the acquired thread number and the acquired process number as current context information, and thus, the current context information of the branch instruction is acquired.
In one embodiment, the step S506 specifically includes: and taking the stack top pointer, the thread number and the process number as input information, calculating the input information by utilizing a hash algorithm to obtain a corresponding hash value, and taking the hash value as current context information.
It should be noted that the hash is to convert an input (also called pre-mapped pre-image) of an arbitrary length into an output of a fixed length by a hash algorithm, and the output is a hash value. This transformation is a kind of compression mapping, i.e. the space of hash values is usually much smaller than the space of the input. Briefly, a hash is a function that compresses a message of arbitrary length to a message digest of some fixed length. The hash algorithm may convert a data into a flag that is closely related to each byte of the source data. The hash algorithm used in this embodiment may be, but is not limited to, a multiplicative hash algorithm, a Fibonacci (Fibonacci) hash algorithm, or other custom hash algorithms. In this embodiment, the terminal uses the stack top pointer, the thread number, and the process number corresponding to the branch instruction as input information, calculates the input information by using a hash algorithm to obtain a corresponding hash value, and uses the hash value as current context information.
In this embodiment, the stack top pointer, the thread number, and the process number are calculated by using a hash algorithm, and the calculated hash value is used as the current context information, so that the storage space of the current context information can be reduced, thereby reducing the processor cost for storing the current context information.
In one embodiment, referring to fig. 6, after step S206, the method for processing the branch instruction further includes: step S602, if the actual jump addresses are not consistent, the actual jump address corresponding to the branch instruction is read from the address register, so as to execute the instruction in the actual jump address.
It should be noted that the address register stores an instruction address corresponding to the branch instruction and an actual jump address to be jumped by the branch instruction. And the terminal takes the instruction address as an index, queries an address register and acquires a corresponding actual jump address. Furthermore, after the terminal acquires the actual jump address of the branch instruction, the terminal jumps to the actual jump address to perform instruction fetching operation, and executes the fetched instruction after the instruction is fetched at the actual jump address.
In one embodiment, referring to fig. 7, after step S602, the method for processing the branch instruction further includes: step S702, updating the pre-stored jump address to the actual jump address, and updating the pre-stored context information to the current context information.
In this embodiment, the terminal updates the locally stored pre-stored jump address to the actual jump address, and updates the pre-stored context information to the current context information. Specifically, if the instruction address corresponding to the branch instruction is stored in the RAS, the terminal changes the pre-stored jump address corresponding to the branch instruction in the RAS to the actual jump address, and changes the pre-stored context information to the current context information. If the instruction address corresponding to the branch instruction is stored in the BTB, the terminal changes the pre-stored jump address corresponding to the branch instruction in the BTB into the actual jump address and changes the pre-stored context information into the current context information.
It should be noted that the terminal may execute step S702 after reading the actual jump address, or may execute step S702 after executing the instruction fetched from the external actual jump address.
In one embodiment, referring to fig. 8, the step S602 specifically includes:
step S802, if the branch instruction is inconsistent with the actual jump address corresponding to the branch instruction, reading the actual jump address corresponding to the branch instruction from an address register;
step S804, clearing the instruction in the instruction pre-fetching queue;
the instruction pre-fetching queue comprises pre-fetching instructions in a current program pipeline, if the current context information is inconsistent with the pre-stored context information, the prediction of branch failure is represented, the instructions which are taken out from the pre-stored jump addresses in advance need to be cleared from the instruction pre-fetching queue, the actual jump addresses are re-taken, and the instructions are filled in the instruction pre-fetching queue, so that the terminal executes the instructions in the instruction pre-fetching queue.
Step S806, reading the instruction to be executed in the actual jump address, and writing the instruction to be fetched into the instruction prefetch queue to execute the instruction to be executed in the instruction prefetch queue.
Furthermore, the terminal reads the instruction to be executed in the actual jump address, and writes the instruction to be fetched into the instruction pre-fetching queue, so that the terminal executes the instruction to be executed in the instruction pre-fetching queue.
In this embodiment, if the current context information is inconsistent with the pre-stored context information, that is, when the predicted pre-stored jump instruction corresponding to the branch instruction may be maliciously attacked to cause a prediction error, the actual jump address corresponding to the branch instruction is directly read from the address register to execute the instruction in the actual jump address, thereby ensuring correct execution of the current program where the branch instruction is located.
Referring to fig. 9, an embodiment of a branch instruction processing apparatus comprises:
a first obtaining module 910, configured to obtain current context information of a branch instruction when the branch instruction is obtained;
the query module 920 is configured to query pre-stored context information corresponding to the branch instruction;
a determining module 930, configured to determine whether the current context information is consistent with the pre-stored context information;
a second obtaining module 940, configured to obtain the pre-stored jump address corresponding to the branch instruction if the branch instruction is consistent with the pre-stored jump address, so as to execute a pre-fetch instruction pre-fetched from the pre-stored jump address.
In this embodiment, when a branch instruction is obtained, obtaining current context information of the branch instruction, querying pre-stored context information corresponding to the branch instruction, determining whether the current context information is consistent with the pre-stored context information, and if so, obtaining a pre-stored jump address corresponding to the branch instruction to execute a pre-fetch instruction pre-fetched from the pre-stored jump address; before instruction fetching is carried out according to the pre-stored jump address, whether the current context information is consistent with the pre-stored context information or not is judged, and when the current context information is consistent with the pre-stored context information, namely the predicted pre-stored jump instruction corresponding to the branch instruction is judged not to be maliciously attacked to cause prediction errors, the pre-stored jump address corresponding to the branch instruction is obtained again to execute the pre-fetch instruction pre-fetched from the pre-stored jump address, so that the problem that instruction execution is carried out according to an incorrect branch program after the instruction fetching is attacked is solved.
Optionally, the first obtaining module 910 is further configured to query a stack corresponding to the basic block where the branch instruction is located, and obtain a stack top pointer; acquiring the thread number of the thread where the branch instruction is located and the process number of the process to which the thread belongs; and taking the stack top pointer, the thread number and the process number as current context information.
Optionally, the first obtaining module 910 is further configured to use the stack top pointer, the thread number, and the process number as input information, calculate the input information by using a hash algorithm, obtain a corresponding hash value, and use the hash value as current context information.
Optionally, the querying module 920 is further configured to query a branch target buffer and a return address stack corresponding to the basic block where the branch instruction is located, and read pre-stored context information corresponding to the branch instruction from the branch target buffer or the return address stack; wherein, the record items in the branch target buffer and the return address stack are both used for recording the pre-stored jump address and the pre-stored context information corresponding to the executed branch instruction in the basic block; the second obtaining module 940 is further configured to query the branch target buffer and the return address stack according to the branch instruction, and read a pre-stored jump address corresponding to the branch instruction from the branch target buffer.
Optionally, the apparatus for processing the branch instruction further comprises: and the address fetching module is used for reading the actual jump address corresponding to the branch instruction from the address register if the actual jump address is inconsistent with the actual jump address so as to execute the instruction in the actual jump address.
Optionally, the apparatus for processing the branch instruction further comprises: and the updating module is used for updating the pre-stored jump address into the actual jump address and updating the pre-stored context information into the current context information.
Optionally, the address fetching module is further configured to, if the actual jump address is inconsistent with the actual jump address corresponding to the branch instruction, read the actual jump address from the address register; clearing the instructions in the instruction pre-fetching queue; and reading the instruction to be executed in the actual jump address, and writing the instruction to be executed into the instruction pre-fetching queue to execute the instruction to be executed in the instruction pre-fetching queue.
In addition, an embodiment of the present invention further provides a branch instruction processing device, where the branch instruction processing device includes: the processor is configured to execute the branch instruction processing method embodiment according to the instruction processing method embodiment, and the processor is configured to execute the branch instruction processing method embodiment according to the instruction processing method embodiment.
Furthermore, an embodiment of the present invention further provides a storage medium, where a processing program of a branch instruction is stored, and the processing program of the branch instruction, when executed by a processor, implements the steps of the embodiment of the processing method of the branch instruction as described above.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for processing branch instructions, the method comprising the steps of:
when a branch instruction is obtained, obtaining the current context information of the branch instruction;
inquiring prestored context information corresponding to the branch instruction;
judging whether the current context information is consistent with the pre-stored context information;
and if the branch instruction is consistent with the pre-stored jump address, acquiring the pre-stored jump address corresponding to the branch instruction so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address.
2. The method for processing a branch instruction according to claim 1, wherein said step of obtaining current context information of the branch instruction comprises:
inquiring a stack corresponding to the basic block where the branch instruction is located, and acquiring a stack top pointer;
acquiring the thread number of the thread where the branch instruction is located and the process number of the process to which the thread belongs;
and taking the stack top pointer, the thread number and the process number as current context information.
3. The method for processing a branch instruction according to claim 2, wherein the step of using the top pointer, the thread number, and the process number as current context information specifically comprises:
and taking the stack top pointer, the thread number and the process number as input information, calculating the input information by utilizing a hash algorithm to obtain a corresponding hash value, and taking the hash value as current context information.
4. A method for processing a branch instruction according to any one of claims 1 to 3, wherein the step of querying the pre-stored context information corresponding to the branch instruction specifically comprises:
inquiring a branch target buffer and a return address stack corresponding to a basic block where the branch instruction is located, and reading pre-stored context information corresponding to the branch instruction from the branch target buffer or the return address stack; wherein, the record items in the branch target buffer and the return address stack are both used for recording the pre-stored jump address and the pre-stored context information corresponding to the executed branch instruction in the basic block;
the step of obtaining the pre-stored jump address corresponding to the branch instruction specifically includes:
and inquiring the branch target buffer and the return address stack according to the branch instruction, and reading a pre-stored jump address corresponding to the branch instruction from the branch target buffer.
5. A method of processing a branch instruction according to any one of claims 1-3, wherein after the step of determining whether the current context information and the pre-stored context information are consistent, the method of processing a branch instruction further comprises:
and if the actual jump addresses are inconsistent, reading the actual jump address corresponding to the branch instruction from the address register so as to execute the instruction in the actual jump address.
6. The method for processing the branch instruction as claimed in claim 5, wherein after the step of reading the actual jump address corresponding to the branch instruction from the address register to execute the instruction from the actual jump address if the actual jump address is not consistent, the method for processing the branch instruction further comprises:
and updating the pre-stored jump address to the actual jump address, and updating the pre-stored context information to the current context information.
7. The method for processing a branch instruction as claimed in claim 5, wherein said step of reading a real jump address corresponding to said branch instruction from an address register to execute an instruction from said real jump address if said branch instruction does not match comprises:
if not, reading an actual jump address corresponding to the branch instruction from an address register;
clearing the instructions in the instruction pre-fetching queue;
and reading the instruction to be executed in the actual jump address, and writing the instruction to be executed into the instruction pre-fetching queue to execute the instruction to be executed in the instruction pre-fetching queue.
8. An apparatus for processing a branch instruction, the apparatus comprising:
the first obtaining module is used for obtaining the current context information of the branch instruction when the branch instruction is obtained;
the query module is used for querying the pre-stored context information corresponding to the branch instruction;
the judging module is used for judging whether the current context information is consistent with the pre-stored context information;
and the second obtaining module is used for obtaining the pre-stored jump address corresponding to the branch instruction if the branch instruction is consistent with the pre-stored jump address so as to execute the pre-fetching instruction pre-fetched from the pre-stored jump address.
9. An apparatus for processing a branch instruction, comprising: memory, a processor and a handler of branch instructions stored on the memory and executable on the processor, the handler of branch instructions when executed by the processor implementing the steps of the method of handling branch instructions according to any of claims 1 to 7.
10. A storage medium having stored thereon a handler of a branch instruction, the handler of the branch instruction, when executed by a processor, implementing the steps of the method of handling a branch instruction according to any one of claims 1 to 7.
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