CN111052587B - Power conversion device - Google Patents

Power conversion device Download PDF

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Publication number
CN111052587B
CN111052587B CN201880057590.8A CN201880057590A CN111052587B CN 111052587 B CN111052587 B CN 111052587B CN 201880057590 A CN201880057590 A CN 201880057590A CN 111052587 B CN111052587 B CN 111052587B
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control
power conversion
control circuit
signal
control signal
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CN111052587A (en
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门田充弘
米川辉
杉山由一
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Hitachi Ltd
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Hitachi Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/49—Combination of the output voltage waveforms of a plurality of converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a low-cost power conversion device for performing PWM synchronization. The power conversion device includes: power conversion units (101-104) that supply the load (400) with the voltage of the power supply (300); and a central control device (200) that controls the power conversion units (101-104). The power conversion units (101-104) are provided with: first converters (141-144) and first control circuits (211-214) that control the first converters (141-144); second converters (151-154) and second control circuits (221-224) for controlling the second converters (151-154) by pulse width modulation; and transformers (131-134) connected between the first converters (141-144) and the second converters (151-154). The central control device (200) transmits a first control signal and a synchronization signal to first control circuits (211-214) of power conversion units (101-104), and the first control circuits (211-214) transmit a second control signal to second control circuits (221-224) of the power conversion units (101-104) when receiving the synchronization signal. Second control circuits (221-224) reset the pulse width modulated carrier signal when receiving a second control signal.

Description

Power conversion device
Technical Field
The present invention relates to a power conversion device.
Background
In power conversion of high voltage or large capacity, a power conversion device in which a plurality of power conversion cells (hereinafter, simply referred to as cells) are connected in series or in parallel is used. As such a power conversion device, there is a multi-channel power converter described in patent document 1. In the multi-channel power converter, outputs of a plurality of inverter units (corresponding to cells) are connected in series, respectively, to obtain a high-voltage output.
Patent document 1 describes PWM (Pulse Width Modulation) of a plurality of inverter units (inverter units).
Specifically, the on/off state of the semiconductor element (switching element) included in each inverter unit is controlled by a plurality of Carrier signals corresponding to the number of inverter units. Thereby, a Multi-level output voltage is obtained.
As described in patent document 1, each of the plurality of carrier signals has the same phase. It is considered effective to synchronize the phases of the plurality of carrier signals to suppress a high-frequency component contained in the output voltage. It is also considered effective for suppressing a single-stage change in output voltage and exerting an adverse effect on a load such as a motor.
Such a configuration of the power conversion device is effective in the case of directly driving the high-voltage motor.
Introduction of natural energy Power generation such as solar Power generation and wind Power generation is expanding worldwide, and PCS (Power conditioning system) is known as a Power conversion device for converting Power obtained from natural energy and outputting the converted Power to a Power system. In order to increase the voltage and the capacity of the PCS, a configuration using a plurality of cells is considered to be effective.
Documents of the prior art
Patent document
Patent document 1, japanese patent laid-open publication No. 2002-58257
Disclosure of Invention
Technical problem to be solved by the invention
Here, in the following description, regarding a plurality of carrier signals for PWM of a plurality of units, synchronizing phases will be defined as PWM synchronization.
When PWM synchronization is realized, the following technical problems are considered to exist.
In the case where a central control device is provided to comprehensively control a plurality of units, a configuration is considered in which the central control device performs PWM processing of all the units and transmits the generated gate signals of the switching elements to the control circuits of the respective units.
However, since the number of switching elements included in a cell is not 1 but plural, the configuration of the power conversion device becomes complicated and the cost becomes high because plural gate signal wirings are provided in accordance with the number of switching elements.
The purpose of the present invention is to realize a low-cost power conversion device that performs PWM synchronization.
Technical solution for solving technical problem
In order to achieve the above object, the present invention adopts the following configuration.
A power conversion device, comprising: a plurality of power conversion units that convert a power supply voltage into a voltage supplied to a load; and a central control device that controls the plurality of power conversion units, each of the plurality of power conversion units having: a first converter converting the power supply voltage; a first control circuit that controls the first converter; a second converter that converts the voltage converted by the first converter; a second control circuit for controlling the second converter by pulse width modulation; and a transformer connected between the first converter and the second converter,
the central control device includes a control signal transmitting unit that transmits a first control signal to the first control circuit included in each of the plurality of power conversion units, and the first control circuit included in each of the plurality of power conversion units controls the first converter based on the first control signal, and the second control circuit controls the second converter to reset the pulse width modulated carrier signal.
ADVANTAGEOUS EFFECTS OF INVENTION
According to the present invention, a low-cost power conversion device that performs PWM synchronization can be realized.
Drawings
Fig. 1 is a schematic configuration diagram of a power converter in embodiment 1.
Fig. 2 is a diagram showing an example of a circuit configuration of a cell.
Fig. 3 is a diagram showing a PWM operation (also referred to as PWM operation) waveform of the unit in the case where the output voltage is controlled to a positive value.
Fig. 4 is a diagram showing a PWM operation waveform of the unit when the output voltage is controlled to be a negative value.
Fig. 5 is a diagram showing an example of the synthesized output voltage waveform.
Fig. 6 is a timing chart showing the principle of PWM synchronization in embodiment 1.
Fig. 7 is a diagram showing a specific data configuration example of the first control signal.
Fig. 8 is a diagram showing a specific data configuration example of the second control signal.
Fig. 9 is a diagram showing a configuration example of the first control circuit of the cell.
Fig. 10 is a diagram showing a configuration example of the second control circuit of the cell.
Fig. 11 is a timing chart showing another example of PWM synchronization in embodiment 1.
Fig. 12 is a timing chart showing the principle of PWM synchronization in embodiment 2.
Fig. 13 is a timing chart showing the principle of PWM synchronization in embodiment 3.
Fig. 14 is a schematic configuration diagram of a power converter in embodiment 4.
Fig. 15 is a timing chart showing the principle of PWM synchronization in embodiment 4.
Fig. 16 is a schematic configuration diagram of a power converter in embodiment 5.
Fig. 17 is a schematic configuration diagram of the power converter 4 in embodiment 6.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Examples
(example 1)
Fig. 1 is a schematic configuration diagram of a power converter in embodiment 1 of the present invention.
In fig. 1, the power conversion device 1 converts power input from an external power supply 300 and outputs the converted power to an external load 400. The power conversion apparatus 1 includes a plurality of units 101 to 104 and a central control apparatus 200 that controls them. In fig. 1, an example using 4 cells is shown, but the number of cells is arbitrary.
Units 101 to 104 include: first converters 141 to 144 and first control circuits 211 to 214 for controlling the first converters 141 to 144, second converters 151 to 154 and second control circuits 221 to 224 for controlling the second converters 151 to 154, and transformers 131 to 134 connected between the first converters 141 to 144 and the second converters 151 to 154, respectively.
Hereinafter, the first converters 141 to 144 and the first control circuits 211 to 214 are collectively defined as primary-side circuits 111 to 114, respectively. The second converters 151 to 154 and the second control circuits 221 to 224 are collectively defined as secondary-side circuits 121 to 124, respectively. Transformers 131 to 134 electrically insulate primary-side circuits 111 to 114 from secondary-side circuits 121 to 124, respectively. The more detailed structure of the unit will be described later.
Input terminals (input sides) of the units 101 to 104 are connected in parallel to the power supply 300. Therefore, the input voltages of the cells 101 to 104 are all equal. Units 101 to 104 convert the voltage of power supply 300 to generate output voltages V O1 ～V O4 。
Generating an output voltage V for the cell 101 O1 The following description will be given.
First, the first converter 141 of the primary side circuit 111 converts the voltage of the power source 300 into an alternating voltage, and applies to the primary winding of the transformer 131. The first control circuit 211 of the primary-side circuit 111 performs calculation and processing related to this operation, and drives the first converter 141.
Next, the second converter 151 of the secondary side circuit 121 converts the voltage generated at the secondary winding of the transformer 131 to generate a voltage V O1 . The second control circuit 221 of the secondary-side circuit 121 performs operations and processing related to the operations, and drives the second converter 151. The cells 102 to 104 also generate the voltage V in the same manner O2 ～V O4 。
Output terminals (output sides) of the units 101 to 104 are connected in series with each other. The output voltage of the power conversion device 1 is a combined voltageV O1 ～V O4 Is defined below as the resultant output voltage V OS (＝V O1 +V O2 +V O3 +V O4 ). With the above configuration, the power conversion device 1 can output a voltage higher than the rated output voltage of each cell.
Here, the secondary-side circuits 121 to 124 control the output voltage V by PWM (pulse width modulation) as described later O1 ～V O4 . The second control circuit 221 performs PWM processing using a carrier signal generated inside and a Duty ratio (hereinafter, simply referred to as Duty) transmitted from the outside, and drives the second converter 151 according to the result. The duty is a value for setting the on period ratio of the switching element in PWM. To apply a voltage V O1 The control is performed to a desired value, and the duty is generated by the central control device 200.
Similarly, second control circuits 222 to 224 perform PWM processing to drive second converters 152 to 154, respectively. The carrier signals of the second control circuits 221 to 224 are generated independently, and PWM synchronization is realized by a method described later.
Here, consider the following structure of a different example from the present invention: in the PWM of the secondary circuits 121 to 124, the central control device 200 performs PWM processing of all the secondary circuits 121 to 124, and transmits the generated gate signals of the switching elements to the secondary circuits 121 to 124.
However, as described later, there are problems as follows: since there are a plurality of switching elements of the second converter, a plurality of gate signal wirings are required accordingly, and the structure of the power conversion device becomes complicated and costly.
On the other hand, as described in embodiment 1 of the present invention, by adopting a configuration in which the second control circuits 221 to 224 independently perform the PWM processing by transmitting the duty from the central control apparatus 200 to the second control circuits 221 to 224, it is possible to suppress the complexity and the cost increase of the wiring for the control signal transmitted from the central control apparatus 200 to each unit.
The central control device 200 synthesizes the output voltage V OS Control the units 101 to104 output voltage V O1 ～V O4 。
When the power conversion device 1 is applied to a PCS for photovoltaic power generation, it is required to control the output current of the power conversion device 1 to a desired value. In fig. 1, the current detector 230 is arranged on the path of the output current in consideration of such a case.
The control operation unit 201 included in the central control device 200 performs feedback control operation using the detected value of the output current detected by the current detector 230 to generate the output voltage V OS Target value of (d) and voltage V of each output unit 101 to 104 O1 ～V O4 The target value of (2).
Further, the control operation unit 201 performs a control operation for varying the voltage V O1 ～V O4 Control commands are generated for the first control circuits 211 to 214 and the second control circuits 221 to 224 of the respective units 101 to 104 for calculation and processing of target values. The control command is a target value (command value) of control, or a state instruction such as start and stop, and the duty described above is also included in the control command.
The control arithmetic unit 201 outputs the generated control command to the control signal transmitting unit 202. In fig. 1, 4 arrows are shown as control commands to indicate that individual control commands are output to each of the 4 units 101 to 104. The control signal transmitting unit 202 generates first control signals for the respective units 101 to 104 based on the control command, and transmits the first control signals to the first control circuits 211 to 214 of the respective units 101 to 104.
The first control signal transmitted by the control signal transmitting unit 202 includes control commands for the second control circuits 221 to 224 such as duty. In this way, even if the control commands are issued to the second control circuits 221 to 224, the commands can be temporarily transmitted to the first control circuits 211 to 214 of the units 101 to 104 to which the second control circuits 221 to 224 belong.
That is, the relay using the first control circuits 211 to 214 is performed, and the control command is transmitted to the second control circuits 221 to 224.
The primary-side circuits 111 to 114 of the respective units 101 to 104 are connected in parallel to the external power supply 300. Therefore, the ground potentials (reference potentials at which the circuits operate) of the first control circuits 211 to 214 are all shared (i.e., common). The ground potentials of the central control device 200 and the first control circuits 211 to 214 can be shared. Therefore, communication from the central control device 200 to the first control circuits 211 to 214 does not require insulation, and communication using electric wires can be applied.
In embodiment 1, serial communication is assumed as a communication method from the control signal transmitting unit 202 of the central control apparatus 200 to the first control circuits 211 to 214. Therefore, the first control signal is a serial communication signal around the digital section.
In embodiment 1, the control signal transmitting unit 202 of the central control device 200 and all of the first control circuits 211 to 214 share a communication bus, and the control signal transmitting unit 202 and all of the first control circuits 211 to 214 are connected by the communication bus. Accordingly, fig. 1 illustrates 1 arrow as the first control signal output from the control signal transmitting unit 202, and illustrates a configuration in which the first control signals are input in parallel to the first control circuits 211 to 214 of the respective units. As described later, the first control signal includes addresses for identifying the units 101 to 104. Therefore, the control signal transmitting unit 202 encodes the control command, and generates a serial communication signal by further giving an address.
In the central control device 200, the control signal transmitting unit 202 outputs a synchronization command to the synchronization signal transmitting unit 203. The synchronization signal transmitting unit 203 generates a synchronization signal based on the synchronization command output from the control signal transmitting unit 202, and outputs the synchronization signal to the first control circuits 211 to 214. The synchronizing signals output to the first control circuits 211 to 214 are digital signals used for PWM synchronization, and will be described in detail later.
Since the ground potential can be shared even in the transmission of the synchronization signal from the synchronization signal transmitting unit 203 of the central control device 200 to the first control circuits 211 to 214, insulation is not required, and signal transmission using electric wires can be applied.
In embodiment 1, a common synchronization signal is output from the synchronization signal transmitting unit 203 of the central control apparatus 200 to all of the first control circuits 211 to 214. Fig. 1 shows 1 arrow as the synchronization signal output from the synchronization signal transmitting unit 203, and the arrow is input in parallel to the first control circuits 211 to 214.
In a different example from embodiment 1 of the present invention, when insulation is required in transmitting signals from the central control apparatus 200 to the units 101 to 104, a method using expensive optical fibers can be considered. In this case, since the wiring extending from the central control device 200 to each unit can be extended over a long distance, the total length of the optical fibers used becomes long, and the cost of the power conversion device becomes high.
On the other hand, in embodiment 1, since the ground potential can be shared, insulation is not necessary for all signal transmission from the central control device 200 to the units 101 to 104, and therefore, inexpensive electric wires can be used without using expensive optical fibers, and thus, a low-cost power conversion device can be realized.
Furthermore, if the communication bus is shared by all the units 101 to 104 as shown in fig. 1, the number of output ports of the central control device 200 is reduced, and a power conversion device at a lower cost can be realized. In addition, there is an advantage that complication of wiring is suppressed.
The first control circuit 211 extracts a control instruction with respect to the first converter 141 from the received first control signal, thereby driving the first converter 141. In addition, the first control circuit 211 extracts a control command (duty or the like) for the second converter 151 from the first control signal, generates a second control signal based on the extracted control command, and transmits the generated second control signal to the second control circuit 221. The communication from the first control circuit 211 to the second control circuit 221 is triggered by a rising edge (or a falling edge) of the synchronization signal transmitted from the synchronization signal transmitting unit 203 of the central control device 200.
The first control circuits 212 to 214 also drive the first converters 142 to 144, respectively, in the same manner as the first control circuit 211 described above, and transmit second control signals to the second control circuits 222 to 224, respectively.
Here, since the synchronization signal transmitting unit 203 of the central control device 200 outputs the common synchronization signal to the first control circuits 211 to 214 of all the units 101 to 104, the communication from the first control circuits 211 to 214 to the second control circuits 221 to 224 is performed simultaneously in all the units 101 to 104. As described later, the second control circuits 221 to 224 of the respective units 101 to 104 Reset (Reset) the carrier signal triggered by the reception of the second control signal. By the mode, PWM synchronization can be achieved.
In embodiment 1, serial communication is used as a communication means for communicating from the first control circuits 211 to 214 to the second control circuits 221 to 224 of the respective units 101 to 104. Therefore, the second control signal is a serial communication signal around the digital section.
Since the secondary side circuits 121 to 124 of the respective cells 101 to 104 are connected in series with each other, the ground potentials of the second control circuits 221 to 224 are different from each other. The ground potentials of the first control circuits 211 to 214 and the ground potentials of the second control circuits 221 to 224 are also different from each other. Therefore, the first control circuits 211 to 214 of the respective units 101 to 104 need to be insulated from the second control circuits 221 to 224. Therefore, for example, communication using an optical fiber can be considered. However, since the communication is performed inside the units 101 to 104, the total length of the optical fibers is relatively short, and the cost of the optical fibers can be kept low.
Since the communication from the first control circuits 211 to 214 to the second control circuits 221 to 224 of the respective units 101 to 104 is a relatively short distance, a method using Infrared communication such as IrDA (Infrared Data Association) or ultrasonic waves can be considered in addition to the optical fiber. If infrared communication or ultrasonic communication is employed, even when the ground potentials of the first control circuits 211 to 214 and the second control circuits 221 to 224 are significantly different from each other, communication can be performed while maintaining the distances between the transmitters and receivers of infrared communication or ultrasonic communication appropriately and maintaining insulation by structural optimization.
Here, supplementary matters will be described with respect to the example shown in fig. 1. The external power supply 300 may be any one of a direct current power supply and an alternating current power supply. As an example, when the power conversion device 1 is applied to a PCS for solar power generation, the external power supply 300 is a solar cell. Further, as an example of the external load 400, there is a high-voltage motor or other electric power equipment.
As in the case where the power conversion device 1 is applied to a PCS for photovoltaic power generation, the external load 400 may be a power system. The power converter 1 may include elements such as protection components (relays, fuses, and the like), filter components (reactors, capacitors), and the like, in addition to the above-described configuration.
Fig. 2 is a diagram showing an example of the circuit configuration of the cell 101. In the example shown in fig. 2, it is assumed that the external power supply 300 is a dc power supply and the power conversion device outputs ac power to the external load 400. The other units 102 to 104 can also be configured similarly to the unit 101 shown in fig. 2.
In fig. 2, the first converter 141 includes a first inverter including 4 switching elements (MOSFETs in the example of fig. 2) 11 to 14. The dc input terminal of the first inverter becomes the input terminal of the first converter 141. Further, a capacitor 10 for a filter is connected between the dc input terminals of the first inverter. A series resonant circuit in which the coil 15, the capacitor 16, and the primary winding of the transformer 131 are connected in series is connected between the ac output terminals of the first inverter.
The second converter 151 comprises a diode bridge comprising diodes 21-24, the secondary winding of the transformer 131 being connected between the ac input terminals of the diode bridge. The first inverter, the series resonant circuit, and the diode bridge described above constitute a resonant type converter as one of the insulation type DC-DC converters (converters).
The smoothing capacitor 20 is connected between the dc output terminals of the diode bridge in the second converter 151. The second converter 151 includes a second inverter including 4 switching elements (MOSFETs in fig. 2) 31 to 34. The ac output terminal of the second inverter becomes the output terminal of the second converter 151 of the unit 101.
With the above configuration, each of the cells 101 to 104 can be said to be constituted by a resonance type converter (hereinafter, referred to as a converter) and a second inverter (hereinafter, referred to as an inverter).
The converter converts the voltage input to unit 101 to generate dc link voltage V dc1 . The DC link voltage V can be adjusted by the on/off operation of the switching element dc1 The control is performed to a desired value, and a detailed description thereof is omitted here. The converter controlling the DC link voltage V dc1 In FIG. 2, a voltage V for detection is arranged dc1 The voltage detector 25. In addition, the detected voltage V dc1 The signal is temporarily inputted to the second control circuit 221, and then transmitted from the second control circuit 221 to the first control circuit 211, and illustration thereof is omitted in fig. 1. The first control circuit 211 performs a voltage V dc1 And (3) a feedback control of driving the converter based on the result.
The units 102 to 104 also include converters, as in the converter shown in fig. 2, and generate the dc link voltages V, respectively dc2 ～V dc4 。
Here, the dc link voltage V may be set dc1 ～V dc4 All the control values may be the same value, or may be different values. However, in the following description, it is assumed that the dc link voltage V is set dc1 ～V dc4 All controlled to equal value V dc 。
Fig. 2 shows a resonant converter, but it is sufficient to use an insulating DC-DC converter, and the resonant converter can be applied regardless of a specific circuit system.
When the external power supply 300 is an AC power supply, a rectifier circuit (AC-DC converter) may be added in a stage preceding the converter of fig. 2.
Inverter will be voltage V dc1 Converting to generate the output voltage V of the unit 101 01 . The cells 102 to 104 also include inverters to convert the voltage V dc2 ～V dc4 Converted to respectively generate voltages V 02 ～V 04 。
The inverters of the secondary side circuits 121 to 124 of the respective units 101 to 104 output the output voltage V by PWM 01 ～V 04 Controlled to a desired value.
Fig. 3 and 4 are diagrams showing examples of PWM operation waveforms of secondary side circuit 121 in unit 101. FIG. 3 shows the voltage V 01 The PWM operation waveform when the control is positive. Specifically, the carrier signal and the duty D are shown as PWM operation waveforms 1 Gate signals of the switching elements 31 to 34, V 01 And (4) waveform. In fig. 3, the dead time (dead time) of the switching element is omitted for simplification of the drawing and the description.
In the example shown in fig. 3, a triangular wave signal is shown as a carrier signal of PWM. The instantaneous value of the carrier signal varies in the range of 0 (0%) to 1 (100%). Fig. 3 shows a PWM operation waveform corresponding to 3 cycles of the carrier signal. In fig. 3, the carrier signal reset described later is omitted.
Duty ratio D 1 Is used for applying a voltage V 01 The control command for controlling the central control device 200 to a desired value is included in the control signal transmitted from the control signal transmitting unit 202 of the central control device 200 to the second control circuit 221 via the first control circuit 211. Duty ratio D 1 Values from-1 (-100%) to +1 (+ 100%). At a voltage V 01 When the control is positive, duty D 1 To a value from 0 to + 1. In fig. 3, duty D is set during each cycle of the carrier signal 1 Assume to be constant. Also shows the duty D 1 A case where the number of the carrier signals is gradually increased over 3 periods of the carrier signal.
At a voltage V 01 In the case where the control is positive, the switching elements 33 and 34 shown in fig. 2 are controlled to be off (off) and on (on), respectively. The switching elements 31 and 32 are in accordance with the duty D 1 And the comparison result of the carrier signal is on/off controlled. At duty D 1 During a period larger than the carrier signal, the switching elements 31 and 32 are controlled to be on and off, respectively, and the voltage V 01 (instantaneous value of) becomes + V dc . At duty D 1 The switching elements 31 and 32 are controlled to be turned off and on, V, respectively, in a period smaller than the carrier signal 01 (instantaneous value of) becomes 0.
Voltage V in carrier period 01 Becomes (D) 1 V dc ). If make the duty D 1 In the range from 0 to +1, the inverter can output V equal to or less than 0 01 ≤+V dc As an average value over the carrier period. As with the duty D, as in the example shown in fig. 3 1 Increase voltage V 01 The (average value in the carrier period of) also increases.
FIG. 4 shows the voltage V 01 And PWM operation waveform diagram when the control value is negative. In the case of the example shown in fig. 4, the duty D 1 To a value of from-1 (-100%) to 0. Duty D shown in fig. 4 instead of fig. 3 1 Showing the duty D 1 Absolute value of | D 1 L. the method is used for the preparation of the medicament. Also shown is the absolute value | D 1 I is gradually increased over 3 periods of the carrier signal, i.e. duty D 1 A gradual decrease.
At a voltage V 01 In the case where the control is negative, the switching elements 31 and 32 are controlled to be turned off and on, respectively. The switching elements 33 and 34 are in accordance with the duty D 1 Absolute value of (D) 1 The result of the comparison of | and the carrier signal is controlled on/off. At | D 1 In a period where | is larger than the carrier signal, the switching elements 33 and 34 are controlled to be on and off, respectively, and the voltage V is set to be 01 (instantaneous value of) becomes-V dc . At | D 1 In a period where | is smaller than the carrier signal, the switching elements 33 and 34 are controlled to be turned off and on, respectively, and the voltage V is set to be 01 (instantaneous value of) becomes 0.
Voltage V in carrier period 01 Becomes (D) 1 V dc ). Note the duty D 1 Is negative. If make the duty D 1 In the range from-1 to 0, the inverter can output-V dc ≤V 01 The desired voltage in the range ≦ 0 is taken as the average value in the carrier period. As in the example shown in FIG. 4, with | D 1 I increases, i.e. with duty D 1 Decrease of voltage V 01 (average value in carrier period) decreases.
The voltage V is supplied to the central control device 200 01 Controlled to a target value V a With respect to the target value of the DC link voltageV dc Simply make the duty ratio be (V) a /V dc ) And (4) finishing. Here is-V dc ≤V a ≤+V dc . In the central control device 200, the control calculation unit 201 generates the target value V dc And duty (V) a /V dc ) As the control command, the control signal transmitting section 202 generates a first control signal based on the control commands. Here, V dc Is a fixed value, and in addition, assume V dc Is recorded in both the central control apparatus 200 and the first control circuit 211.
In this case, the control arithmetic unit 201 of the central control device 200 may generate data (symbol) indicating the start-up (i.e., start-up) or continuation of the operation of the converter as a control command in place of the target value V dc . The units 102 to 104 (secondary side circuits 122 to 124) also perform PWM processing in the same manner.
FIG. 5 shows the resultant output voltage V OS An example of the waveform is shown. In fig. 5, the sine wave indicated by the dotted line is the synthesized output voltage V OS The fundamental component contained in (A) can also be regarded as a combined output voltage V OS The target value of (2).
Synthesized output voltage V OS Instantaneous value of-4V dc 、-3V dc 、……、0、……、+3V dc 、+4V dc Any one of them. If PMW synchronization is assumed, the power conversion device 1 can output-4V dc ≤V OS ≤+4V dc As an average value over the carrier period. If the resultant output voltage V is made as shown in FIG. 5 OS The target value of (a) is changed in a sine wave form, a multi-stage pseudo-sine-wave-shaped synthesized output voltage V can be generated OS 。
Next, the PWM synchronization method will be described in detail.
Fig. 6 is a timing chart showing the principle of PWM synchronization. Specifically, fig. 6 shows synchronization signal waveforms, a first control signal transmitted from the control signal transmitting unit 202 of the central control device 200 to the first control circuits 211 to 214 of the respective units 101 to 104, a second control signal transmitted from the first control circuits 211 to 214 to the second control circuits 221 to 224 in the respective units 101 to 104, and PWM operation waveforms performed by the second control circuits 221 to 224 of the respective units 101 to 104.
Here, the first control signal transmitted from the control signal transmitting unit 202 of the central control device 200 to the first control circuit 211 means that a signal indicating an address of the first control circuit 211 is given to the first control signal transmitted from the control signal transmitting unit 202.
The carrier signals and the duty D generated by the second control circuits 221 to 224 are shown as PWM operation waveforms of the respective units 101 to 104 1 ～D 4 。
Duty ratio D 2 ～D 4 Is used for driving V 02 ～V 04 The control command for controlling the central control apparatus 200 to a desired value is included in the control signals transmitted from the control signal transmitting unit 202 of the central control apparatus 200 to the second control circuits 222 to 224 via the first control circuits 212 to 214, respectively.
Further, duty D in FIG. 6 1 ～D 4 The specific values of (b) are not values assumed to result in the waveform of fig. 5. Note that the gate signal and the output voltage waveform of the switching element obtained by the PWM processing are not illustrated.
In FIG. 6, T S A control cycle of the central control apparatus 200 is shown. Specifically, the control operation unit 201 performs a control operation, and the control signal transmission unit 202 transmits the first control signal to each of the units 101 to 104 in a cycle. Fig. 6 shows that the time point (time) at which the first control signal starts to be transmitted is the start point of each control cycle, and fig. 6 shows that t = kT S And so on. Where k is an integer representing a discrete time step.
To start from time t = kT S The PWM synchronization will be described by taking the initial control period as an example.
At time t = kT shown in fig. 6 S The control signal transmitting unit 202 of the central control device 200 starts transmitting the first control signal to the first control circuits 211 to 214 of the respective units 101 to 104.
Here, as described above, the first control is performed in the central control device 200 and all the units 101 to 104Since the circuits 211 to 214 share the communication bus, the control signal transmitting unit 202 of the central control device 200 first transmits the first control signal 1014 to be transmitted to the first control circuit 214. Next, the first control signal 1013 to the first control circuit 213, the first control signal 1012 to the first control circuit 212, and the first control signal 1011 to the first control circuit 211 are sequentially transmitted. The first control signals 1011 to 1014 each include information about the time t = kT S Immediately before (immediately before) the control arithmetic unit 201 generates the duty D 1 (k)～D 4 (k) The information of (1).
The control signal transmitting unit 202 of the central control device 200 outputs the first control signal 1011 to the first control circuit 211, and then outputs the synchronization command to the synchronization signal transmitting unit 203. The synchronization signal transmitting unit 203 sets the synchronization signal, which is a digital signal, to the H level in response to reception of the synchronization command from the control signal transmitting unit 202, and generates a rising edge of the synchronization signal. In fig. 6, regardless of the processing delay during this period, the rising edge of the synchronization signal is generated at the same time as the transmission of the first control signal 1011 is completed. The rising edge of the synchronization signal is output to the first control circuits 211 to 214 of all the units 101 to 104.
The first control circuits 211 to 214 of the respective units 101 to 104 transmit second control signals 1021 to 1024 to the second control circuits 221 to 224, respectively, triggered by the rising edge of the synchronization signal. As described earlier, these communications are performed simultaneously at all units 101-104. The second control signals 1021-1024 respectively have the duty D 1 (k)～D 4 (k) The information of (1).
The second control circuits 221 to 224 of the respective units 101 to 104 reset the carrier signal triggered by the reception of the second control signal. As shown in fig. 6, the value of the carrier signal generated by the second control circuit of each cell is initialized to 0 at time points t1, t2, and t3 simultaneously with completion of reception of the second control signal, and then starts to increase to 1 (the horizontal broken line in fig. 6 indicates "1").
As shown in fig. 6, since the reception of the second control signal is completed simultaneously in all the units 101 to 104, the reset of the carrier signal is also completed in all the units 101 to 104Simultaneously. Received D 1 (k)～D 4 (k) The results are reflected in the air occupation of the reset units 101 to 104.
From time T = (k + 1) T S 、t＝(k+2)T S The first control signal and the second control signal are communicated and the carrier signal is reset using the communication, in the same manner as described above. The period of the rising edge of the synchronous signal is T same as the control period S 。
The carrier cycle of each of the units 101 to 104 is set to the control cycle T of the central control device 200 S The same time. However, actually, the carrier periods of the respective units 101 to 104 are not exactly the same time as each other. In addition, the period T is not equal to the rising edge period of the synchronization signal S The exact same value.
Here, for example, a case where the central control device 200 and the second control circuits 221 to 224 perform arithmetic, communication, PWM processing, and the like by a digital control device (a microcomputer, a digital signal processor, or the like) is considered.
In this case, the minute error existing in the clock period of each digital control device generates the period error described earlier. The carrier period ratio T of the second control circuit 221 is shown in fig. 6 S Slightly shorter, the carrier period of the second control circuit 222 is shorter than T of the central control device 200 S Slightly longer.
Even in such a case, as in embodiment 1, all the units 101 to 104 reset the carrier signals at the same time, so that the carrier signals of the units 101 to 104 can be substantially synchronized. That is, as shown in fig. 6, immediately before the time point t1, the carrier signals of the second control circuits 221 to 224 gradually delay from the second control circuit 221 to 224. Therefore, by resetting the carrier signals of the second control circuits 221 to 224 at the same time at the time point t1, the carrier signals of the respective units 101 to 104 can be substantially synchronized.
Further, although the cycle errors of the carrier signals of the second control circuits 221 to 224 occur from the time point t1 to the time point t2, the carrier signals of the respective units 101 to 104 can be substantially synchronized by resetting the carrier signals of the second control circuits 221 to 224 at the same time at the time point t 2. The time t3 is also the same as the times t1 and t 2.
Fig. 7 shows a specific data configuration example of the first control signal 1011 shown in fig. 6. As described above, the first control signal 1011 is a serial communication signal on the order of digital sections. Specifically, the memory cell includes a start bit, an address portion, an empty portion, another data portion (Other data), and an end bit (stop bit).
The address portion following the start bit is configured as digital data for identifying the first control circuit 211 of the unit 101. Duty (PWM duty) as duty D for representing fig. 6 1 (k) Digital data of the value of (a). The Other data part (Other data) is composed of digital data indicating the content of the control command Other than the duty, parity, and the like. The existence and content of the other data portion can be set arbitrarily.
Fig. 8 is a diagram showing a specific data configuration example of the second control signal 1021 shown in fig. 6. As described above, the second control signal 1021 is a serial communication signal around the digital section. Specifically, the start bit, the duty section (PWM duty), the other data section, and the end bit (stop bit) constitute the data. Since the communication is internal to the cell, the address section is not required.
The space is used to represent the space D shown in FIG. 6 1 (k) The digital data of the value (b) may be the same as the occupied portion of the first control signal 1011 shown in fig. 7. The other data portion is configured by digital data indicating the content of the control command other than the duty, a parity bit, or the like. The existence and content of the other data portions can be set arbitrarily.
Fig. 9 is a diagram showing a configuration example of the first control circuit 211 of the unit 101. The same configuration can be applied to the first control circuits 212 to 214 of the other units 102 to 104.
In fig. 9, the first control circuit 211 includes: a control signal receiving portion 2111, a synchronization signal receiving portion 2112, a control signal transmitting portion 2113, and a drive control portion 2114.
The control signal receiving unit 2111 receives the first control signal transmitted from the control signal transmitting unit 202 of the central control apparatus 200, and confirms the address of the first control signal. When it is determined that the first control signal is supplied to the first control circuit 211, a control command included in the first control signal is extracted and the following processing is performed.
First, a control command to be supplied to the second control circuit 221 as a duty is output to the control signal transmitting portion 2113. Then, a control command for the first converter 141 of the primary-side circuit 111 is output to the drive control portion 2114.
The synchronization signal receiving unit 2112 detects a rising edge of the synchronization signal transmitted from the synchronization signal transmitting unit 203 of the central control apparatus 200, and outputs a transmission command to the control signal transmitting unit 2113.
The control signal transmitting portion 2113 generates a second control signal based on the control command to the second control circuit 221 output from the control signal receiving portion 2111. Then, the transmission command is transmitted to the second control circuit 221 in accordance with the transmission command output from the synchronization signal receiving unit 2112.
The drive control unit 2114 performs drive control of the first converter 141 in accordance with the control command for the first converter 141 output from the control signal receiving unit 2111.
Fig. 10 is a diagram showing a configuration example of the second control circuit 221 of the unit 101. The second control circuits 222 to 224 of the other units 102 to 104 can also be configured similarly to the second control circuit 221.
In fig. 10, the second control circuit 221 includes a control signal receiving section 2211, a carrier signal generating section 2212, and a drive control section 2213.
The control signal receiving section 2211 receives the second control signal transmitted from the first control circuit 211, extracts a duty as a control command, and outputs the extracted duty to the drive control section 2213. Further, the control signal receiving section 2211 outputs a reset command to the carrier signal generating section 2212 at the same time when the reception of the second control signal is completed.
The carrier signal generation section 2212 generates a carrier signal at a set carrier cycle, and outputs the carrier signal to the drive control section 2213. In addition, the carrier signal is reset upon receiving a reset command from the control signal receiving section 2211.
The drive control section 2213 compares the duty from the signal receiving section 2211 with the carrier signal from the carrier signal generating section 2212, and controls the drive of the second converter 151 based on the result.
Fig. 11 is a timing chart showing another example of PWM synchronization. Only the difference from the PWM synchronization described in fig. 6 will be described below.
To start from time t = kT S The PWM synchronization shown in fig. 11 will be described by taking the initial control cycle as an example. The second control circuits 221-224 respectively receive the second control signals 1021-1024, and then a certain time T passes W Then, the carrier signals are reset respectively. The points other than this are the same as the PWM synchronization described in fig. 6.
Regarding the PWM synchronization shown in fig. 11, the second control circuits 221 to 224 receive the second control signal and elapse the certain time T W The configuration in which the carrier signal is reset later can be applied to all the following embodiments as another example.
As described above, according to embodiment 1, since the second control circuits 221 to 224 are configured to independently perform PWM processing in order to transmit duty from the central control device 200 to the second control circuits 221 to 224, it is not necessary to transmit control signals from the central control device 200 to the switching elements of the secondary side circuits 121 to 124, and it is possible to suppress complication and increase in cost of wiring for the control signals transmitted from the central control device 200 to the respective units, thereby achieving cost reduction.
Further, according to embodiment 1, the primary-side circuits 111 to 114 of the respective units 101 to 104 are connected in parallel to the external power supply 300, the ground potentials of the first control circuits 211 to 214 are all shared, and the ground potentials of the central control device 200 and the first control circuits 211 to 214 can also be shared. Therefore, the communication from the central control device 200 to the first control circuits 211 to 214 does not require insulation, and communication using electric wires can be applied, and the cost for insulation processing can be omitted.
In particular, when the power conversion device is used in an inverter for driving a high-voltage motor or a PCS for a high-voltage distribution system, if embodiment 1 of the present invention is not applied, a withstand voltage exceeding 5kV is required, and the insulation treatment thereof is expensive.
According to embodiment 1 of the present invention, a low-cost power conversion apparatus that performs PWM synchronization can be realized.
(example 2)
Next, embodiment 2 of the present invention will be explained.
Fig. 12 is a timing chart showing the principle of PWM synchronization in embodiment 2. The configuration of the power converter in embodiment 2 is the same as that of embodiment 1 shown in fig. 1, and therefore, the illustration and detailed description thereof are omitted.
Only the difference from the PWM synchronization in embodiment 1 described in fig. 6 will be described below.
The first control signal transmitted from control signal transmitting unit 202 of central control apparatus 200 to first control circuits 211 to 214 of units 101 to 104 and the second control signal transmitted from first control circuits 211 to 214 to second control circuits 221 to 224 of units 101 to 104 include information of a reset command as control commands in addition to the duty. The reset command is a 1-bit control command indicating information as to whether or not the second control circuits 221 to 224 reset (turn on or off) the carrier signal after receiving the control signal.
In the example shown in fig. 12, "on" associated with the reset instruction is described for several control signals (for example, the first control signal 1311). It means that the reset command is on, that is, a control command for resetting the carrier signal after receiving the second control signal to the second control circuits 221 to 224.
In fig. 12, at time t = kT S In the control period (period for transmitting the first control command, synchronization signal period) Ts to be started, the control signal transmitting unit 202 of the central control device 200 transmits the first control signal 1311 to the first control circuit 211, and as described above, the reset command of the first control signal 1311 is turned on (on).
Upon receiving the first control signal 1311, the first control circuit 211 of the unit 101 transmits a second control signal 1321 to the second control circuit 221 triggered by a rising edge of the synchronization signal. At this time, in response to the reset instruction of the first control signal 1311 being on, the reset instruction of the second control signal 1321 is also made on.
The second control circuit 221 resets the carrier signal triggered by the reception of the second control signal 1321 in response to the reset command of the second control signal 1321 being on.
On the other hand, at slave time T = (k + 1) T S In the control cycle to be started, the first control signal 1411 supplied from the control signal transmitting unit 202 of the central control device 200 to the first control circuit 211 is not turned on by the reset command (not shown, but the reset command is turned off). Therefore, the reset instruction is also set to off (off) with respect to the second control signal 1421 transmitted from the first control circuit 211 to the second control circuit 221.
In response to the reset instruction of the second control signal 1421 being off, the second control circuit 221 does not reset the carrier signal even if it receives the second control signal 1421.
At time T = (k + 2) T S Control period started with t = kT S In the initial control period, the reset command of the control signal is set to on, and therefore, the second control circuit 221 resets the carrier signal.
In the above description, the operation has been described centering on the unit 101 (the first control circuit 211 and the second control circuit 221), and the other units 102 to 104 (the first control circuits 212 to 214 and the second control circuits 222 to 224) operate similarly.
In embodiment 2, the configuration and operation of the first control circuits 211 to 214 and the second control circuits 221 to 224 are slightly changed as compared with embodiment 1, but the operation has been described above, and therefore, the block diagrams shown in fig. 9 and 10 are omitted.
In embodiment 1, the carrier signal is reset in all the control periods, but as in embodiment 2, if the carrier period of each of the units 101 to 104 and the control period T of the central control device 200 are set S The error between is small enough to be even inThe carrier signals of the respective units can be substantially synchronized without resetting the carrier signals in all control periods.
Therefore, the embodiment 2 can be applied to a device having a low operation level of a control unit such as a microcomputer, as compared with the embodiment 1. However, it is necessary to be able to appropriately manage the oscillation of the clock.
The same effects as in example 1 can be obtained also in example 2.
(example 3)
Next, example 3 of the present invention will be explained.
Fig. 13 is a timing chart showing the principle of PWM synchronization in embodiment 3. The configuration of the power converter in embodiment 3 is the same as that of embodiment 1 shown in fig. 1, and therefore, the illustration and detailed description thereof are omitted.
Only the difference from the PWM synchronization in embodiment 1 described in fig. 6 will be described below.
Consider the situation from time t = kT S The control period is started. As shown in fig. 13, in the second control circuit 223 of the unit 103 and the second control circuit 224 of the unit 104, the duty is not changed from the control period before 1 step. I.e. is D 3 (k)＝D 3 (k-1)、D 4 (k)＝D 4 (k-1). Therefore, the control signal transmitting unit 202 of the central control device 200 sequentially transmits only the first control signal 1012 to be transmitted to the first control circuit 212 and the first control signal 1011 to be transmitted to the first control circuit 211.
After receiving the first control signal, the first control circuits 211 and 212 respectively send second control signals 1021 and 1022 to the second control circuits 221 and 222, triggered by the rising edge of the synchronization signal. Thus, at time t = kT S In the initial control period, the carrier signal is reset only in the unit 101 (second control circuit 221) and the unit 102 (second control circuit 222).
At time T = (k + 1) T from the following S The control period is started, and as for the second control circuits 221 and 222, the duty is not changed from the control period before 1 step. I.e. is D 1 (k+1)＝D 1 (k)、D 2 (k+1)＝D 2 (k) In that respect Therefore, the control signal transmitting unit 202 of the central control apparatus 200 sequentially transmits only the first control signal 1114 supplied to the first control circuit 214 and the first control signal 1113 supplied to the first control circuit 213.
After receiving the first control signal, the first control circuit 213 of the unit 103 and the first control circuit 214 of the unit 104 send second control signals 1123 and 1124 to the second control circuits 223 and 224, respectively, triggered by the rising edge of the synchronization signal. Therefore, at the slave time T = (k + 1) T S The reset of the carrier signal is performed only in the second control circuit 223 of the unit 103 and the second control circuit 224 of the unit 104 in the initial control period.
When it is known that the number of units for changing the duty in each control cycle is 2 at most, the time from when the central control device 200 completes the calculation of the duty to when the duty is reflected by the second control circuit, that is, the delay time due to communication can be shortened by performing communication of the control signal and resetting of the carrier signal as shown in fig. 13.
In example 3, the same effects as in example 1 can be obtained, and the above-described effects can also be obtained.
(example 4)
Next, example 4 of the present invention will be explained.
Fig. 14 is a schematic configuration diagram of a power converter in embodiment 4. Only differences from the power conversion device 1 in embodiment 1 described with reference to fig. 1 will be described below.
The power conversion apparatus 2 shown in fig. 14 is provided with a central control apparatus 204 instead of the central control apparatus 200 of fig. 1. The central control apparatus 204 in fig. 14 does not include the synchronization signal transmission unit 203, and does not output the synchronization signal to the first control circuits 211 to 214 of the units 101 to 104, as compared with the central control apparatus 200 in embodiment 1.
Fig. 15 is a timing chart showing the principle of PWM synchronization in embodiment 4. In embodiment 4, the control signal includes a reset command, as in embodiment 2 described with reference to fig. 12. Only the difference from the PWM synchronization in embodiment 2 described in fig. 12 will be described below.
In fig. 15, the control signal transmitting unit 202 of the central control device 204 transmits the first control signal to the first control circuits 211 to 214 in each control cycle. The control signal transmitting unit 202 outputs the first control signal 4 times (4 frames) per control cycle, but sets the reset command to on (on) for the 4 th first control signal (the first control signals 1311, 1412, 1513 of fig. 15) in terms of time.
In addition, the address in the 4 th first control signal is rotated (rotation) among the first control circuits 211 to 214 of the cells 101 to 104. In the example shown in fig. 15, the address changes in the 4 th first control signal are unit 101 (first control circuit 211), unit 102 (first control circuit 212), and unit 103 (first control circuit 213). At time T = (k + 3) T S The control cycle to be started may be set such that the address in the 4 th first control signal is the cell 104 (first control circuit 214), but is not shown in fig. 15.
The first control circuits 211 to 214 of the respective units 101 to 104 transmit the second control signals to the second control circuits 221 to 224 immediately after receiving the first control signals transmitted by the control signal transmitting section 202 of the central control device 200. After the second control signals are received by the second control circuits 221 to 224 of the respective units 101 to 104, the carrier signal is reset if the reset command is on (on).
According to the above configuration, the time from the start of the control cycle (the time point at which the control signal transmission unit 202 starts communication of the first control signal) to the reset of the carrier signal can be kept constant, and PWM synchronization can be achieved as shown in fig. 15.
In embodiment 4, the configuration of the central control device 204 and the wiring from the central control device 204 to the respective cells 101 to 104 can be simplified in response to the case where no synchronization signal is used.
In example 4, the same effects as in example 1 can be obtained, and the above-described effects can also be obtained.
(example 5)
Next, example 5 of the present invention will be explained.
Fig. 16 is a schematic configuration diagram of a power converter in embodiment 5 of the present invention.
The power conversion apparatus 3 of fig. 16 includes 4 units 105 to 108. As a difference between embodiment 1 and embodiment 5 shown in fig. 1, input terminals (input sides) of the units 105 to 108 are connected in series, respectively, and the combined input terminals are connected to an external power supply 301. On the other hand, output terminals (output sides) of the units 105 to 108 are connected in parallel to the load 401.
The units 105 to 108 include primary-side circuits 115 to 118, secondary-side circuits 125 to 128, and transformers 135 to 138, respectively.
Here, since the primary-side circuits 115 to 118 include the second converters 155 to 158 and the second control circuits 225 to 228 for controlling them, respectively, and the secondary-side circuits 125 to 128 include the first converters 145 to 148 and the first control circuits 215 to 218 for controlling them, respectively, and the internal configurations of the units 105 to 108 are the same as those of the units 101 to 104 of embodiment 1, the PWM synchronization described in embodiment 1 can be applied to embodiment 5 without being changed.
By adopting the above configuration, embodiment 5 can be applied to a power conversion device in which the primary side is a high voltage of, for example, 66kv, and the secondary side is a low voltage of, for example, 100 v.
In example 5 of the present invention, the same effects as in example 1 can be obtained, and the above-described effects can also be obtained.
(example 6)
Next, example 6 of the present invention will be explained.
Embodiment 6 of the present invention is an example of a power conversion device that uses 3 power conversion devices 1 described in embodiment 1 to form a three-phase ac output.
Fig. 17 is a schematic configuration diagram of the power converter 4 in embodiment 6. The power conversion apparatus 4 shown in fig. 17 includes 3 power conversion apparatuses 1 described in embodiment 1.
As shown in fig. 17, one of the output terminals of the 3 power conversion devices 1 constitutes a three-phase output terminal and is connected to a three-phase load 401. The other of the output terminals of the 3 power conversion devices 1 is connected to each other, and forms a neutral point in a Y-connected three-phase ac circuit.
The input terminals of the 3 power conversion devices 1 are connected in parallel with each other and are connected to a power supply 300.
As described in embodiment 1, the power conversion apparatus 1 includes the central control apparatus 200 therein. Therefore, the power conversion apparatus 4 of fig. 17 includes 3 central control apparatuses 200, but 3 central control apparatuses 200 may be integrated into 1.
With the above configuration, embodiment 6 of the present invention can be applied to, for example, an inverter for driving a three-phase high-voltage motor and a PCS for a three-phase ac power system, and can obtain the same effects as those of embodiment 1 also in a power converter that outputs a three-phase ac power.
Although embodiments 1 to 4 described above are examples in which the plurality of cells 101 to 104 are connected in parallel to the external power supply 300 and connected in series to the external load 400, and embodiment 5 is an example in which the plurality of cells 105 to 108 are connected in series to the external power supply 301 and connected in parallel to the load 401, the present invention can be applied to an example in which a plurality of cells are connected in series to the external power supply and also connected in series to the load.
Description of the reference numerals
1. 2, 3, 4 … … power conversion device,
10. 16, 20 … … capacitor,
11. 12, 13, 14, 31, 32, 33, 34 … … switching element,
15 … … coil,
21. 22, 23, 24 … … diodes,
25 … … voltage detector,
101. 102, 103, 104, 105, 106, 107, 108 … … power conversion unit,
111. 112, 113, 114 … … primary side circuit,
121. 122, 123, 124 … …,
131. 132, 133, 134 … … transformer,
141. 142, 144 … … a first converter,
151. 152, 154 … … second converter,
200. 204 … … central control device,
211. 212, 213, 214 … …,
221. 222, 223, 224 … …,
230 … … current detector,
300. 301 … … power supply,
400. 401 … … load.

Claims (9)

1. A power conversion apparatus, characterized by comprising:
a plurality of power conversion units that convert a power supply voltage into a voltage supplied to a load; and
a central control device that controls the plurality of power conversion units,
the plurality of power conversion units each have:
a first converter converting the power supply voltage;
a first control circuit that controls the first converter;
a second converter that converts the voltage converted by the first converter;
a second control circuit for controlling the second converter by pulse width modulation; and
a transformer connected between the first converter and the second converter,
the central control device has a control signal transmitting section that transmits a first control signal to the first control circuit of each of the plurality of power conversion units,
a first control circuit that each of the plurality of power conversion units has controls the first converter based on the first control signal,
the central control device includes a synchronization signal transmitting unit that transmits a synchronization signal to the first control circuit included in each of the plurality of power conversion units, the first control circuit transmits a second control signal to the second control circuit when receiving the synchronization signal, and the second control circuit resets the pulse width modulated carrier signal when receiving the second control signal,
the first control signal sent to the first control circuit includes information of a duty ratio of the pulse width modulation, the information of the duty ratio is sent to the second control circuit via the first control circuit, and the second control circuit of each of the plurality of power conversion units performs pulse width modulation based on the duty ratio to drive the second converter.
2. The power conversion apparatus according to claim 1, characterized in that:
the central control device is connected to the first control circuits of the plurality of power conversion units via a communication bus that performs wired serial communication, and transmits the first control signal including information for identifying addresses of the plurality of power conversion units by performing wired serial communication with the first control circuits of the plurality of power conversion units.
3. The power conversion apparatus according to claim 1 or 2, characterized in that:
input sides of a plurality of power conversion units are connected to an external power supply in parallel with each other, and output sides of the plurality of power conversion units are connected to each other in series.
4. The power conversion apparatus according to claim 1 or 2, characterized in that:
output sides of the plurality of power conversion units are connected in parallel to an external load, and input sides of the plurality of power conversion units are connected in series.
5. The power conversion apparatus according to claim 1 or 2, characterized in that:
the first control circuit of the plurality of power conversion units transmits the second control signal to the second control circuit by wireless communication with the second control circuit.
6. The power conversion apparatus according to claim 5, characterized in that:
the wireless communication is infrared communication.
7. The power conversion apparatus according to claim 1, characterized in that:
the first control signal includes information of a reset instruction whether to reset the carrier signal, the first control circuit transmits a second control signal including the information of the reset instruction to the second control circuit, and the second control circuit resets the pulse width modulated carrier signal in a case where the second control signal is received and the reset instruction is the information of resetting the carrier signal.
8. The power conversion apparatus according to claim 7, characterized in that:
a time from a start time of a control cycle in which the central control apparatus transmits the first control signal until any one of the second control circuits in the plurality of power conversion units receives the reset command including the information to reset the carrier signal is constant.
9. The power conversion apparatus according to any one of claims 1, 2, 7, and 8, characterized in that:
the power conversion system comprises 3 power conversion devices, wherein one of output terminals of the 3 power conversion devices forms a three-phase output terminal and is connected with a three-phase load, the other output terminal of the 3 power conversion devices is connected with each other to form a Y-shaped neutral point, and input terminals of the 3 power conversion devices are connected in parallel with each other and are connected with a power supply.
CN201880057590.8A 2017-12-14 2018-11-06 Power conversion device Active CN111052587B (en)

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PCT/JP2018/041154 WO2019116785A1 (en) 2017-12-14 2018-11-06 Power conversion device

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