CN111030611A - Polar coordinate modulation circuit and modulation method thereof - Google Patents
Polar coordinate modulation circuit and modulation method thereof Download PDFInfo
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- H03—ELECTRONIC CIRCUITRY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/04—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
- H03F1/06—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
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- H—ELECTRICITY
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- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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Abstract
The invention discloses a polar coordinate modulation circuit and a modulation method thereof. In one embodiment: the delay time difference at two sides is accurately controlled by combining the two methods of delaying N clock cycles by the digital part digital clock and adjusting the filter group delay by the analog part, so that the delay time difference is small and the modulation quality is not influenced. And adjusting and compensating the numerical value of the specific N on the two sides according to the delay difference of the two sides. The present invention can compensate for the path delay difference between the amplitude signal and the phase signal with high accuracy.
Description
Technical Field
The invention relates to the technical field of signal modulation, in particular to a polar coordinate modulation circuit and a modulation method thereof.
Background
Polar modulation (Polar modulation) is increasingly used in radio frequency transmitter architectures because of its higher efficiency.
As shown in fig. 1, for a structure diagram of a typical Polar modulation transmitter, Polar coordinate conversion is performed on two paths of I/Q signals of a baseband through an algorithm to generate amplitude information and phase information respectively; amplitude information is processed, mainly converted from digital to analog through a DAC, and then filtered and amplified; meanwhile, the phase information and the local oscillator realize up-conversion; and finally, the amplitude modulation information and the high-frequency signals (containing phase modulation information) after frequency mixing realize signal amplification antenna transmission through a power amplifier.
As shown in fig. 2, the process of amplitude information processing generally includes converting direct digital amplitude information into an analog signal through a DAC, filtering out high-frequency interference through a filter, and then improving the driving capability of the amplitude information through an operational amplifier, and directly sending the amplitude information to a PA to implement amplitude modulation. The filter is generally a low-pass filter, and mainly filters high-frequency interference of the DAC clock.
Therefore, in terms of time, due to two different processing methods (for example, a filter has a group delay), there must be a delay difference between the amplitude modulation signal and the mixed high-frequency signal (including phase modulation information), and if the delay difference is large, the modulation precision of the system is deteriorated, and the modulation quality can meet design expectations by accurately controlling the delay difference.
Disclosure of Invention
The present invention is directed to provide a polar modulation method for accurately controlling delay differences between amplitude information and phase information, which can compensate for path delay differences between amplitude signals and phase signals with high accuracy.
To solve the above problem, an embodiment of the present invention provides a polar modulation circuit, including:
the polar coordinate conversion unit is used for carrying out polar coordinate conversion on the two paths of I/Q signals of the baseband to respectively generate an amplitude signal and a phase signal;
the first digital delay control unit is used for sampling, latching and delaying the amplitude signal for a plurality of times and delaying a first CLOCK period;
the second digital delay control unit is used for sampling, latching and delaying the phase signal for a plurality of times and delaying a second CLOCK period;
the amplitude modulation unit is used for adjusting the group delay of the amplitude signal after delay adjustment through a plurality of gears R/C set by a filter of the amplitude modulation unit, so that the delay difference between the amplitude signal and the phase signal is further minimized, and generating an amplitude modulation signal according to the amplitude signal after delay adjustment;
the phase modulation unit is used for generating a phase modulation signal according to the phase signal after the time delay adjustment;
and a power amplification unit for generating the transmitted data in the radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
Preferably, the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
Preferably, the phase modulation unit is configured to generate a phase modulation signal according to the delay-adjusted phase signal, and, in particular,
the phase modulation unit includes:
an orthogonal coordinate conversion unit for generating an orthogonal signal having a prescribed amplitude value based on the phase signal supplied from the second digital delay control unit; and the combination of (a) and (b),
and the quadrature modulation signal is used for generating a phase modulation signal in a radio frequency band according to the quadrature signal and providing the phase modulation signal for the power amplification unit.
Preferably, the filter is a low-pass filter, including a first order low-pass filter and a higher order low-pass filter.
Preferably, the first order low pass filter includes:
the signal input end is connected to the signal output end through a first resistor and a second resistor which are connected in series;
the input end of the second resistor is connected with the output end of the second resistor through a first switch;
a connecting circuit between the output end of the second resistor and the signal output end is respectively connected with a first end of a first capacitor and a first end of a second capacitor;
the second end of the second capacitor is connected with the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
The embodiment of the invention also provides a polar coordinate modulation method, which comprises the following steps:
polar coordinate conversion is carried out on the two paths of signals I/Q of the baseband to respectively generate an amplitude signal and a phase signal;
sampling, latching and delaying the amplitude signal and the phase signal for a plurality of times respectively to delay the amplitude signal for a first CLOCK period and delay the phase signal for a second CLOCK period;
adjusting the group delay of the amplitude signal after delay adjustment through a plurality of gears R/C set by a filter of the self-delay adjusting device to further minimize the delay difference between the amplitude signal and the phase signal, generating an amplitude modulation signal according to the amplitude signal after delay adjustment, and generating a phase modulation signal according to the phase signal after delay adjustment;
the transmitted data is generated in the radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
Preferably, the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
Preferably, the phase modulation signal is generated according to the phase signal after the delay adjustment, and particularly,
generating a quadrature signal having a prescribed amplitude value based on the delay-adjusted phase signal;
a phase modulated signal is generated in a radio frequency band from the quadrature signal.
The embodiment of the invention has the following beneficial effects:
the invention adds digital delay control logic on two paths of amplitude information processing and phase information processing, which can realize control to make the delay difference of one path relative to the other path less than one CLK period. Meanwhile, in the amplitude information processing module, the RC of the filter is finely adjusted and controlled by utilizing the group delay characteristic of the filter module inside, so that the amplitude information delay is finely adjusted. The combination of the two paths can make the delay difference of the two paths within a smaller range smaller than a CLOCK period, and theoretically, RC adjustment of a plurality of gears can be made to make the group delay approach the design target infinitely.
Drawings
FIG. 1 is a schematic diagram of a conventional Polar modulation transmitter in the background art of the present invention;
FIG. 2 is a schematic diagram of an amplitude signal processing flow in the background of the invention;
FIG. 3 is a block diagram of a polar modulation circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a digitally implemented delay control circuit according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating a prototype of a first-order filter according to an embodiment of the present invention;
fig. 6 is a flowchart illustrating a polar modulation method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Please refer to fig. 3-4.
A polar modulation circuit, comprising:
and the polar coordinate conversion unit 10 is configured to perform polar coordinate conversion on the two paths of I/Q signals of the baseband to generate an amplitude signal and a phase signal, respectively.
And the first digital delay control unit 20 is configured to perform sampling latch delay on the amplitude signal for several times, and delay a first CLOCK cycle.
And the second digital delay control unit 30 is configured to perform sampling latch delay on the phase signal for several times, and delay a second CLOCK cycle.
In a specific embodiment, the delay control may be sampling latch based on D flip-flop, or sampling latch implemented by other logic.
Preferably, the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
The delay time difference at two sides is accurately controlled by combining the two methods of delaying N clock cycles by the digital part digital clock and adjusting the filter group delay by the analog part, so that the delay time difference is small and the modulation quality is not influenced. The value of the specific N on two sides is adjusted and compensated according to the delay difference of the two sides
The amplitude modulation unit 40 is configured to adjust the group delay of the amplitude signal after the delay adjustment through a plurality of R/C stages set by its own filter, so as to further minimize the delay difference between the amplitude signal and the phase signal, and generate an amplitude modulation signal according to the amplitude signal after the delay adjustment.
In a specific embodiment, in the amplitude modulation unit, the group delay characteristic of the own filter is utilized to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is finely adjusted. The combination of the two paths can make the delay difference of the two paths within a smaller range less than a CLOCK period, and theoretically, R/C adjustment of a plurality of gears can be made to make the group delay approach the design target infinitely.
It should be noted that, for example, the amplitude information is sent to the PA after being processed, and the delay is 301 ns; the phase information is delayed by 180 ns; where clock is 20MHZ, each period 50ns., i.e., amplitude and phase delay, is 121 ns; at the moment, the phase information is beaten for two beats at 20MHZ, and the time is delayed for 100 ns; it becomes amplitude delay 301ns and phase delay 280 ns; the delay difference is 21 ns; this 21ns processing with 20MHZ clock is not done, although higher frequency clocks can be found, e.g. 200MHZ can achieve 5ns delay difference control, but half of the higher frequency clocks are difficult to obtain and easily introduce interference. Therefore, the last 21ns delay needs to be adjusted by fine tuning of the filter group delay, and the step size of the adjustment can be very small, such as 1ns, and finally the whole delay difference is less than 1 ns.
For 20M clock processing, delays less than 50ns are difficult to control and can only be made to +/-25 ns. The fine adjustment of group delay can be controlled to +/-1ns or less (because the step diameter is adjusted and the complexity of the adjustment is related, the step diameter is very complicated when being too small, and a plurality of gear adjustments are needed.)
Preferably, the filter is a low-pass filter, including a first order low-pass filter and a higher order low-pass filter. Meanwhile, the structure of the device can be realized by a passive R/C or an active R/C or Gm unit. Other analog delay circuits may also be used.
Preferably, the first order low pass filter includes:
the signal input end is connected to the signal output end through a first resistor and a second resistor which are connected in series;
the input end of the second resistor is connected with the output end of the second resistor through a first switch;
a connecting circuit between the output end of the second resistor and the signal output end is respectively connected with a first end of a first capacitor and a first end of a second capacitor;
the second end of the second capacitor is connected with the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
In a specific embodiment, the processing procedure of the amplitude modulation unit is as shown in fig. 2, and mainly includes 3 modules of DAC/Filter/PGA, where the first-order prototype of the low-pass Filter is as shown in fig. 5, the Filter has group delay, the size of the group delay is related to the Filter structure and the bandwidth of the Filter, and when the bandwidth is basically fixed, i.e., when R0/C0 is basically fixed in fig. 4, fine adjustment of R1/C1 (i.e., adjustment of switches S1/S2) is performed, the group delay can be adjusted more finely. When the delay difference between the amplitude information and the phase information is less than one CLOCK period, the group delay of the amplitude information is finely adjusted, so that the delay difference of two paths of signals is very fine, and a good modulation effect is realized.
And a phase modulation unit 50 for generating a phase modulation signal according to the delay-adjusted phase signal.
Preferably, the phase modulation unit is configured to generate a phase modulation signal according to the delay-adjusted phase signal, and, in particular,
the phase modulation unit includes:
an orthogonal coordinate conversion unit for generating an orthogonal signal having a prescribed amplitude value based on the phase signal supplied from the second digital delay control unit; and the combination of (a) and (b),
and the quadrature modulation signal is used for generating a phase modulation signal in a radio frequency band according to the quadrature signal and providing the phase modulation signal for the power amplification unit.
A power amplifying unit 60 for generating the transmitted data in the radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
In the polar modulation transmitter architecture, a digital control delay unit is respectively added for amplitude and phase information, and meanwhile, a filter circuit in an amplitude information processing unit is combined, the R/C is finely adjusted by utilizing the group delay characteristic of a filter, so that the final equivalent delay time difference of two paths is small enough.
The embodiment of the invention also provides a polar coordinate modulation method, which comprises the following steps:
s100, polar coordinate conversion is carried out on the two paths of signals I/Q of the baseband, and an amplitude signal and a phase signal are respectively generated.
S200, sampling, latching and delaying the amplitude signal and the phase signal for a plurality of times respectively, so that the amplitude signal is delayed for a first CLOCK period, and the phase signal is delayed for a second CLOCK period.
In a specific embodiment, the delay control may be sampling latch based on D flip-flop, or sampling latch implemented by other logic.
Preferably, the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
The delay time difference at two sides is accurately controlled by combining the two methods of delaying N clock cycles by the digital part digital clock and adjusting the filter group delay by the analog part, so that the delay time difference is small and the modulation quality is not influenced. The value of the specific N on two sides is adjusted and compensated according to the delay difference of the two sides
S300, adjusting the group delay of the amplitude signal after delay adjustment through a plurality of gears R/C set by a filter of the self-delay adjusting device to further minimize the delay difference between the amplitude signal and the phase signal, generating an amplitude modulation signal according to the amplitude signal after delay adjustment, and generating a phase modulation signal according to the phase signal after delay adjustment.
In a specific embodiment, in the amplitude modulation unit, the group delay characteristic of the own filter is utilized to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is finely adjusted. The combination of the two paths can make the delay difference of the two paths within a smaller range less than a CLOCK period, and theoretically, R/C adjustment of a plurality of gears can be made to make the group delay approach the design target infinitely.
It should be noted that, for example, the amplitude information is sent to the PA after being processed, and the delay is 301 ns; the phase information is delayed by 180 ns; where clock is 20MHZ, each period 50ns., i.e., amplitude and phase delay, is 121 ns; at the moment, the phase information is beaten for two beats at 20MHZ, and the time is delayed for 100 ns; it becomes amplitude delay 301ns and phase delay 280 ns; the delay difference is 21 ns; this 21ns processing with 20MHZ clock is not done, although higher frequency clocks can be found, e.g. 200MHZ can achieve 5ns delay difference control, but half of the higher frequency clocks are difficult to obtain and easily introduce interference. Therefore, the last 21ns delay needs to be adjusted by fine tuning of the filter group delay, and the step size of the adjustment can be very small, such as 1ns, and finally the whole delay difference is less than 1 ns.
For 20M clock processing, delays less than 50ns are difficult to control and can only be made to +/-25 ns. The fine adjustment of group delay can be controlled to +/-1ns or less (because the step diameter is adjusted and the complexity of the adjustment is related, the step diameter is very complicated when being too small, and a plurality of gear adjustments are needed.)
Preferably, the filter is a low-pass filter, including a first order low-pass filter and a higher order low-pass filter. Meanwhile, the structure of the device can be realized by a passive R/C or an active R/C or Gm unit. Other analog delay circuits may also be used.
Preferably, the first order low pass filter includes:
the signal input end is connected to the signal output end through a first resistor and a second resistor which are connected in series;
the input end of the second resistor is connected with the output end of the second resistor through a first switch;
a connecting circuit between the output end of the second resistor and the signal output end is respectively connected with a first end of a first capacitor and a first end of a second capacitor;
the second end of the second capacitor is connected with the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
In a specific embodiment, the processing procedure of the amplitude modulation unit is as shown in fig. 2, and mainly includes 3 modules of DAC/Filter/PGA, where the first-order prototype of the low-pass Filter is as shown in fig. 5, the Filter has group delay, the size of the group delay is related to the Filter structure and the bandwidth of the Filter, and when the bandwidth is basically fixed, i.e., when R0/C0 is basically fixed in fig. 4, fine adjustment of R1/C1 (i.e., adjustment of switches S1/S2) is performed, the group delay can be adjusted more finely. When the delay difference between the amplitude information and the phase information is less than one CLOCK period, the group delay of the amplitude information is finely adjusted, so that the delay difference of two paths of signals is very fine, and a good modulation effect is realized.
S400, generating the transmitted data in a radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
Preferably, the phase modulation signal is generated according to the phase signal after the delay adjustment, and particularly,
generating a quadrature signal having a prescribed amplitude value based on the delay-adjusted phase signal;
a phase modulated signal is generated in a radio frequency band from the quadrature signal.
In the polar modulation transmitter architecture, a digital control delay unit is respectively added for amplitude and phase information, and meanwhile, a filter circuit in an amplitude information processing unit is combined, the R/C is finely adjusted by utilizing the group delay characteristic of a filter, so that the final equivalent delay time difference of two paths is small enough.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (8)
1. A polar modulation circuit, comprising:
the polar coordinate conversion unit is used for carrying out polar coordinate conversion on the two paths of I/Q signals of the baseband to respectively generate an amplitude signal and a phase signal;
the first digital delay control unit is used for sampling, latching and delaying the amplitude signal for a plurality of times and delaying a first CLOCK period;
the second digital delay control unit is used for sampling, latching and delaying the phase signal for a plurality of times and delaying a second CLOCK period;
the amplitude modulation unit is used for adjusting the group delay of the amplitude signal after delay adjustment through a plurality of gears R/C set by a filter of the amplitude modulation unit, so that the delay difference between the amplitude signal and the phase signal is further minimized, and generating an amplitude modulation signal according to the amplitude signal after delay adjustment;
the phase modulation unit is used for generating a phase modulation signal according to the phase signal after the time delay adjustment;
and a power amplification unit for generating the transmitted data in the radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
2. The polar modulation circuit according to claim 1, wherein the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
3. The polar modulation circuit according to claim 1, wherein the phase modulation unit is configured to generate the phase modulation signal based on the delay-adjusted phase signal, and in particular,
the phase modulation unit includes:
an orthogonal coordinate conversion unit for generating an orthogonal signal having a prescribed amplitude value based on the phase signal supplied from the second digital delay control unit; and the combination of (a) and (b),
and the quadrature modulation signal is used for generating a phase modulation signal in a radio frequency band according to the quadrature signal and providing the phase modulation signal for the power amplification unit.
4. The polar modulation circuit according to claim 1, wherein the filter is a low pass filter including a first order low pass filter and a higher order low pass filter.
5. The polar modulation circuit according to claim 4, wherein the first order low pass filter comprises:
the signal input end is connected to the signal output end through a first resistor and a second resistor which are connected in series;
the input end of the second resistor is connected with the output end of the second resistor through a first switch;
a connecting circuit between the output end of the second resistor and the signal output end is respectively connected with a first end of a first capacitor and a first end of a second capacitor;
the second end of the second capacitor is connected with the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
6. A polar modulation method, comprising:
polar coordinate conversion is carried out on the two paths of signals I/Q of the baseband to respectively generate an amplitude signal and a phase signal;
sampling, latching and delaying the amplitude signal and the phase signal for a plurality of times respectively to delay the amplitude signal for a first CLOCK period and delay the phase signal for a second CLOCK period;
adjusting the group delay of the amplitude signal after delay adjustment through a plurality of gears R/C set by a filter of the self-delay adjusting device to further minimize the delay difference between the amplitude signal and the phase signal, generating an amplitude modulation signal according to the amplitude signal after delay adjustment, and generating a phase modulation signal according to the phase signal after delay adjustment;
the transmitted data is generated in the radio frequency band by using the phase modulation signal as an input signal and the amplitude modulation signal as a control signal.
7. The polar modulation method according to claim 6, wherein the first CLOCK period is not equal to the second CLOCK period;
the delay difference between the amplitude signal and the phase signal after delay adjustment is less than one CLOCK period.
8. The polar modulation method according to claim 6, wherein the generating of the phase modulation signal is based on the delay-adjusted phase signal, and in particular,
generating a quadrature signal having a prescribed amplitude value based on the delay-adjusted phase signal;
a phase modulated signal is generated in a radio frequency band from the quadrature signal.
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| CN201911125542.0A CN111030611A (en) | 2019-11-15 | 2019-11-15 | Polar coordinate modulation circuit and modulation method thereof |
| PCT/CN2020/077370 WO2021093223A1 (en) | 2019-11-15 | 2020-03-01 | Polar modulation circuit and modulation method therefor |
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| WO2021093223A1 (en) | 2021-05-20 |
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Application publication date: 20200417 |