CN111028882A - Detection device for storage medium - Google Patents
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- CN111028882A CN111028882A CN201911177272.8A CN201911177272A CN111028882A CN 111028882 A CN111028882 A CN 111028882A CN 201911177272 A CN201911177272 A CN 201911177272A CN 111028882 A CN111028882 A CN 111028882A
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- 238000012795 verification Methods 0.000 claims description 5
- 125000004122 cyclic group Chemical group 0.000 claims description 3
- 238000012360 testing method Methods 0.000 claims description 3
- 238000005070 sampling Methods 0.000 description 13
- 238000004891 communication Methods 0.000 description 12
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Abstract
The invention discloses a storage medium detection device, which mainly comprises: the detection unit comprises a detection circuit, a CPLD execution module and an interface for reading the storage medium to be detected; the main control unit is communicated with the CPLD execution module; the CPLD execution module controls the detection circuit to obtain the detection information of the current storage medium pin to be detected, transmits the detection information to the main control unit, analyzes whether the current storage medium pin is intact, and judges the integrity of the current storage medium. By adopting the technical scheme, the storage medium detection device provided by the invention can be used for integrally detecting the mainstream storage medium in the market and directly reading the data in the medium; whether the storage medium is damaged or not can be judged, a pin detection mode and a power supply monitoring mode are provided according to a set mode, and secondary damage to the storage medium is avoided.
Description
Technical Field
The invention relates to the field of data recovery, in particular to a detection device of a storage medium.
Background
In the special fields of data reading, recovery, etc., different hardware devices and corresponding reading algorithms need to be set for different storage media, such as pin chips, SD cards, TF cards, and USB storage devices including, for example, a USB disk.
In the reading process, a conventional reading mode lacks a corresponding processing method aiming at a possibly damaged storage medium, and the storage medium is possibly damaged secondarily according to the existing reading method; besides judging whether the storage medium is damaged or not, the existing method cannot accurately locate the damaged specific area of the storage medium.
Disclosure of Invention
The technical scheme provided by the invention aims at the problems in the background technology and mainly comprises the following steps:
the detection unit comprises a detection circuit, a CPLD execution module and an interface for reading the storage medium to be detected;
the main control unit is communicated with the CPLD execution module;
the CPLD execution module controls the detection circuit to obtain the detection information of the current storage medium pin to be detected, transmits the detection information to the main control unit, analyzes whether the current storage medium pin is intact, and judges the integrity of the current storage medium.
As a preferred embodiment, the system further comprises a logic analysis unit and a power output control unit which are connected with the main control unit;
the current storage medium pin detection is carried out after the main control unit judges that the pin function is complete; the main control unit supplies power to the storage medium which is detected currently through the power output control unit, the logic analysis unit detects the logic waveform of the storage medium, and the curve value of the power current is monitored in real time through the power monitoring function of the upper computer/the external computer.
As a preferred embodiment, the pin detection rule is as follows:
for a 40-pin chip: detecting all pins, and if the detection data of at least 10 pins is 1, namely at least 10 pins are connected, determining that the chip is a 40-pin chip;
for the SD card: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are connected, the SD card is considered to be the SD card;
aiming at the TF card: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are connected, the TF card is considered to be the TF card;
for a USB device: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are switched on, the USB device is considered.
As a preferred embodiment, in the detection process, whether a short circuit exists between each pin is detected by a positive and negative verification method:
adding 1.8V voltage to the detection circuit, adding resistors at the inlet position and the outlet position of the detection circuit respectively, detecting the voltage between the pin A and other pins of the storage medium to be detected in a forward circulating manner, and if the voltage between the pin A and the pin X is found to be 0.9V, indicating that a short circuit possibly exists between the two pins;
detecting the voltage between a pin A and a pin X of the storage medium to be detected in a reverse circulation mode, and if the voltage is found to be 0.9V or more, indicating that a short circuit possibly exists between the two pins;
combining the results of the forward detection and the reverse detection, if the results of the two detections on the pin A and the pin X are both 0.9V or more, it indicates that a short circuit exists between the pin A and the pin X, and if the results of the two detections on the pin A and the pin X occur only once, the short circuit may be caused by the existence of other capacitive devices in the built-in circuit of the storage medium to be detected.
In a preferred embodiment, during the detection process, a cyclic voltage check method is used to detect whether there is an open circuit between each pin and the storage medium: adding 1.8V voltage to the pin of the medium to be detected, circularly detecting the voltage of all other residual pins, and if the voltage reaches a set voltage threshold value, considering the pin as a connection state;
and adding 1.8V voltage to the subsequent pins, repeating the test process, and if the voltage of a certain pin is found to be unchanged under any condition, considering the pin to be in an off state.
By adopting the technical scheme, the storage medium detection device provided by the invention can be used for integrally detecting the mainstream storage medium in the market and directly reading the data in the medium; whether the storage medium is damaged or not can be judged, a pin detection mode and a power supply monitoring mode are provided according to a set mode, and secondary damage to the storage medium is avoided.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
FIG. 1 is a block diagram of a storage medium detecting device according to the present invention
FIG. 2 is a schematic diagram of a medium detection control circuit in the storage medium detection device according to the present invention
FIG. 3 is a circuit diagram of a power output control unit in the storage medium detecting device according to the present invention
FIG. 4 is a circuit diagram of a logic analyzing unit in the storage medium detecting device according to the present invention
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to several drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
A software detection device for storage media supports detection of storage media including USB3.0, USB2.0, TF card, SD card, mobile hard disk and the like, PIN types include PIN 40 PIN, SD card PIN, TF card PIN and USB PIN, and states of each PIN in different detection storage media are drawn according to different received detection data: normal connect, short, open, idle, use, etc.
The method mainly comprises the following steps: and the main control unit is used for coordinating the work of each internal unit and communicating with an external computer or an upper computer. And a detection unit, as shown in fig. 2, for example, including a chip RH708 and a chip RH 711.
The chip RH708 chip interface comprises a channel selection interface (A0-A2), an input interface (S1-S8), an output interface (D), a chip selection interface (EN), a power supply interface (VDD) and a ground interface (GND, VSS). The channel selection interface (A0-A2) is connected with the IO port of the CPLD module, and selects which input and output are connected by changing the level signals of A1-A3. The input interface (S1-S8) is connected with the pins of the tested medium. The output interface (D) is divided into two connections, wherein one connection is connected with the input interface of the chip RH711, and the other connection is connected with the AD sampling interface of the MCU module. And the chip selection interface (EN) is connected with the IO port of the CPLD module to enable whether the chip enters a working state or not, and the high level is effective. The power interface (VDD) and the ground interface (GND, VSS) provide the required power.
The chip RH711 chip interface comprises a channel selection interface (IN1-IN4), an input interface (S1-S4), an output interface (D1-D4), a power interface (VDD) and a ground interface (GND, VSS). The channel selection interfaces (IN1-IN4) are connected with IO ports of the CPLD module, and the level signals of IN1-IN4 are changed to select which input is connected with the corresponding output interface. The input interfaces (S1-S4) are connected to chip RH708 chip output pins. The output interface (D) is connected with the level required by the test through different resistors respectively, and the power supply interface (VDD) and the grounding interface (GND) provide the required power supply
According to the media detection rule, a chip selection signal (EN) is enabled to select a needed control RH708 chip, a channel selection interface (A0-A2) of RH708 is changed to select a tested media pin input channel, an RH711 channel selection interface (IN1-IN4) is selected to connect corresponding levels, and the AD value of ADG1_ IN14 is read to judge the media pin state.
In the detection process, firstly, the storage medium detection device is powered on, the storage medium with detection is inserted into the medium detection device, all com ports of the external computer are traversed in the external computer connected with the medium detection, the interface of the I/O equipment in the current on state is determined, and the port capable of communicating is positioned, namely the storage medium detection device. Then, the port is initialized according to a preset value.
Resetting and setting the communication secret key of the storage medium detection device, and detecting whether the setting of the communication secret key is successful.
Circularly receiving the verification data of the medium detection device; and in the cyclic receiving process, detecting whether the check data is correct, and sending corresponding data request information to the medium detection device by combining the current working mode to request for receiving and detecting.
The abnormal situation of the equipment can be observed more intuitively by giving a pin state corresponding diagram, and if a certain corresponding pin in the pin state diagram is found not to be green, a certain pin of the equipment is damaged; the power supply current real-time curve graph can be used for observing the abnormal condition of the external power supply more visually, if the waveform suddenly changes, the power supply is abnormal, and the monitoring equipment can automatically perform abnormal processing and power-off protection.
As a preferred embodiment, the port is opened in an asynchronous manner, the port is allowed to perform read-write operation, communication parameters of the communication port are initialized, the baud rate of communication is set to 115200, the data size of the sending and receiving buffer area is set to 8192, the communication timeout time is set, the buffer area is emptied, and data is ready to be received and sent.
Opening the port in an asynchronous mode, allowing the current port to perform read-write operation, initializing communication parameters of the communication port, setting the communication rate (baud rate) of the communication port, setting the size of a sending and data area to be 8192, setting communication timeout time, and clearing a cache area so as to receive and transmit data. The baud rate is 115200 and the size of the sending and receiving buffer data area is 8192.
In a preferred embodiment, the data request rts (true) and the received data request dtr (true) are set and transmitted at the same time, and the storage medium detection apparatus is reset.
In a preferred embodiment, the reception data requests dtr (false) and dtr (true) are set 12 times in a loop, and key setting is performed on the storage medium detection apparatus. Further, whether the key setting is successful or not is checked by cyclically receiving data returned by the storage medium detection apparatus within 30 seconds, wherein 0xAA600000 is the power supply monitor mode, and 0xAA600001 is the pin detection mode, and when both data are received, the key setting is considered to be successful, and communication is possible.
In a preferred embodiment, after key setting and verification are successful, return data is received again in a loop of 30 seconds, if 0xAA600000 or 0xAA600001 is received, it is determined that detection data can be received, different request data is transmitted in accordance with a different mode of the detector, and the detection data is received in a loop after the power monitoring mode transmission 0xAA60021C and the pin detection mode transmission 0xAA 600000.
As a preferred embodiment, after receiving the detection data, processing the data, wherein the pin mode: different processing is required to be performed on data according to different storage medium types and pin types.
The power output control unit, as shown in fig. 3, for example, includes an inverter chip U9, an operational amplifier chip U8, a power switching device RH41C, and an operational amplifier chip U15.
The input interface of the power output control circuit is TIM _ CH4, which is the output port of the PWM of the MCU, and the output interfaces are the power output (VOUT), the output power voltage sampling interface (ADC1_ IN3), and the output power current sampling interface (ADC1_ IN5).
The power output (VOUT) is connected with the power output port of the equipment to provide required level, the output power voltage sampling interface (ADC1_ IN3) is connected with the AD sampling interface of the MCU to acquire the real-time voltage condition, and the output power current sampling interface (ADC1_ IN5) is connected with the AD sampling interface of the MCU to acquire the real-time current condition.
The TIM3_ CH4 is an output port of pulse width modulation PWM of a micro control unit MCU, the port outputs a PWM signal with a certain frequency, the PWM signal firstly passes through two inverters U9C and U9D to enhance signal intensity and avoid false triggering, then the PWM signal is filtered through a second-order RC filter circuit formed by R52, C70, R53 and C71, then the power switch RH41C is controlled through an integrating circuit formed by U8B, R54, C72, R56 and R57 to adjust output voltage, the output end of 41C is connected with C74 and C73 to carry out output power supply filtering, one path enters the MCU for voltage sampling through voltage division of R59, R61 and R60, and the other path enters the MCU for current sampling through RJ5 and RJ6 resistors and is amplified by an amplifier formed by U15, R55 and R58 and then enters the MCU for current sampling.
The logic analysis unit, as shown in fig. 4, for example, includes an operational amplifier RH4817 and a CPLD module.
The input interface of the logic analysis circuit is SIG1, which is connected with the signal source to be tested, and the output pin (OUT1) of the operational amplifier is connected with the IO port of the CPLD module.
The signal of the signal source to be tested is connected with the input interface SIG1, and D1 and D2 are protection diodes to prevent the device from being damaged by overvoltage of the signal to be tested. The RH4817, the resistors R1 and R2 form a voltage follower circuit, the detected signal is completely output to the CPLD module, and the CPLD module performs sampling recording and uploads the sampled signal to the MCU for display. As a preferred embodiment, after receiving the detection data, processing the data, and when setting the power monitoring mode, observing the power consumption condition of the power supply, and setting a higher sampling frequency to collect the current value of the power supply, so that it is necessary to filter the deviation point generated by the high sampling rate through a current stabilizing filter algorithm to ensure the monitoring accuracy, where the current stabilizing filter algorithm is as follows:
it is considered that each frame of current data is stored in a two-byte data, such as [0x10,0x00] ═ 0x1000 ═ 4096, which indicates that the value of this current is 4096 mA. Then only the high byte data of the two bytes needs to be judged, and if the first bit of the high byte data is greater than 1, the current value is considered to be too large and needs to be filtered out.
The related filtering algorithm is (1) circularly judging whether single-frame data meets the condition that the first byte of any path of signal is less than 0x10, and if not, directly filtering and removing;
(2) dividing all the frame Data into 60 groups, calculating a start value StartValue ═ Data [0], an end value LastValue ═ Data [ len/60-6], an average value AverageValue ═(Data [0] + Data [6] + Data [12]. + Data [6], + Data [ len/60-6])/10, a filtered start value StartValue ═(AverageValue × (4 + StartValue)/5, and a filtered end value LastValue ═ AverageValue ] (AverageValue × (4 + LastValue)/5.
(3) And drawing a waveform diagram according to the calculated correlation value.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (5)
1. A storage medium sensing apparatus, comprising:
the detection unit comprises a detection circuit, a CPLD execution module and an interface for reading the storage medium to be detected;
the main control unit is communicated with the CPLD execution module of the upper computer;
the CPLD execution module controls the detection circuit to obtain the detection information of the current storage medium pin to be detected, transmits the detection information to the main control unit, analyzes whether the current storage medium pin is intact, and judges the integrity of the current storage medium.
2. The storage medium detection device of claim 1, further characterized by: the power supply control system comprises a logic analysis unit and a power supply output control unit which are connected with a main control unit;
the current storage medium pin detection is carried out after the main control unit judges that the pin function is complete; the main control unit supplies power to the storage medium which is detected currently through the power output control unit, the logic analysis unit detects the logic waveform of the storage medium, and the curve value of the power current is monitored in real time through the power monitoring function of the upper computer/the external computer.
3. The storage medium detection device of claim 1, further characterized by: the pin detection rules are as follows:
for a 40-pin chip: detecting all pins, and if the detection data of at least 10 pins is 1, namely at least 10 pins are connected, determining that the chip is a 40-pin chip;
for the SD card: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are connected, the SD card is considered to be the SD card;
aiming at the TF card: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are connected, the TF card is considered to be the TF card;
for a USB device: if at least 2 pins exist in the detection pins, the detection data is 1, namely at least 2 pins are switched on, the USB device is considered.
4. The hardware detection device for the storage medium according to claim 1, further characterized in that whether there is a short circuit between each pin is detected by a positive and negative verification method during the detection:
adding 1.8V voltage to the detection circuit, adding resistors at the inlet position and the outlet position of the detection circuit respectively, detecting the voltage between the pin A and other pins of the storage medium to be detected in a forward circulating manner, and if the voltage between the pin A and the pin X is found to be 0.9V, indicating that a short circuit possibly exists between the two pins;
detecting the voltage between a pin A and a pin X of the storage medium to be detected in a reverse circulation mode, and if the voltage is found to be 0.9V or more, indicating that a short circuit possibly exists between the two pins;
combining the results of the forward detection and the reverse detection, if the results of the two detections on the pin A and the pin X are both 0.9V or more, it indicates that a short circuit exists between the pin A and the pin X, and if the results of the two detections on the pin A and the pin X occur only once, the short circuit may be caused by the existence of other capacitive devices in the built-in circuit of the storage medium to be detected.
5. The hardware detection apparatus for storage medium of claim 1, further characterized in that whether there is a disconnection between each pin and the storage medium is detected by a cyclic voltage verification method in the detection process: adding 1.8V voltage to the pin of the medium to be detected, circularly detecting the voltage of all other residual pins, and if the voltage reaches a set voltage threshold value, considering the pin as a connection state;
and adding 1.8V voltage to the subsequent pins, repeating the test process, and if the voltage of a certain pin is found to be unchanged under any condition, considering the pin to be in an off state.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112285479A (en) * | 2020-12-24 | 2021-01-29 | 北京中超伟业信息安全技术股份有限公司 | System and method for detecting integrity of confidential medium |
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