CN111005067A - Method for epitaxial growth of silicon-based germanium with low dislocation density - Google Patents
Method for epitaxial growth of silicon-based germanium with low dislocation density Download PDFInfo
- Publication number
- CN111005067A CN111005067A CN201911353312.XA CN201911353312A CN111005067A CN 111005067 A CN111005067 A CN 111005067A CN 201911353312 A CN201911353312 A CN 201911353312A CN 111005067 A CN111005067 A CN 111005067A
- Authority
- CN
- China
- Prior art keywords
- growth
- substrate
- silicon
- temperature
- dislocation density
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/08—Germanium
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Crystallography & Structural Chemistry (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Thermal Sciences (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
The invention discloses a method for epitaxially growing silicon-based germanium with low dislocation density, which utilizes a reduced pressure chemical vapor deposition system to epitaxially grow, wherein a growth gas source comprises high-purity digermane and hydrogen, a P-type Si substrate is cleaned by standard RCA and then is conveyed into a vacuum sample feeding chamber, when the growth is started, a silicon wafer is conveyed into a growth chamber again, the substrate is slowly heated and kept in the hydrogen for a period of time, oxygen atom pollutants on the silicon wafer are removed to form a clean growth surface, and the growth can be started by reducing the temperature of the substrate to a proper value after the oxygen is removed. The method has the beneficial effect that the grown Si-based Ge material has good crystallization quality.
Description
Technical Field
The invention belongs to the technical field of semiconductor material preparation, and relates to an epitaxial growth method of a silicon-based germanium material with low dislocation density.
Background
Germanium (Ge) and silicon (Si) belong to the same IV group semiconductor material, the electron mobility and the hole mobility of Ge are respectively 2 times and 4 times of those of Si, the forbidden bandwidth of Ge is smaller than that of Si, the forbidden bandwidth is about 0.67eV at room temperature, and the Ge has greater potential in the aspects of reducing the power supply voltage and reducing the power consumption in equal proportion; more importantly, the Ge device process is compatible with the standard Si process, so that the Ge material becomes one of important alternative materials for preparing high-performance MOS devices in the future. In addition, Ge has better photoelectric properties than Si, for example, Ge has high absorption coefficient in a communication waveband of 1.3-1.5 um, and can be used for manufacturing an infrared photoelectric detector; the difference between the direct band bottom and the indirect band bottom of Ge is very small, only about 136meV, and the Ge is a collimating band gap material and is expected to become a gain medium of a light-emitting device based on energy band modification engineering; the lattice mismatch degree of Ge and GaAs is only 0.07%, so Ge can also be used as a transition layer for epitaxially growing III-V semiconductor materials on a Si substrate. Silicon-based Ge materials are one of the most important silicon-based heteroepitaxial materials in recent years. However, the biggest challenge in epitaxially growing Ge materials on Si substrates is the large lattice mismatch between Si and Ge, which easily causes high surface roughness and high dislocation density. The rough surface increases the process difficulty of device manufacturing; high dislocation density will increase device leakage current and reduce device performance. Therefore, reducing surface roughness and reducing dislocation density are key to the epitaxial growth of high quality Si-based Ge materials.
Disclosure of Invention
The invention aims to provide a method for epitaxially growing silicon-based germanium with low dislocation density, which has the beneficial effect that a pure Ge layer with the thickness of about 1.5 mu m is epitaxially grown on a Si (100) substrate by adopting a two-step method of low-temperature growth and high-temperature annealing. The structure of the compound is characterized by X-ray double-crystal diffraction, a scanning electron microscope and an atomic force microscope. The test result shows that under the optimized conditions, the full width at half maximum of the X-ray double-crystal diffraction curve of the epitaxial Ge is 283arc sec, the surface root mean square roughness is 0.57nm (the scanning range is 5 mu m multiplied by 5 mu m), and the dislocation density obtained by the chemical etching dislocation pit method is about 8.25 multiplied by 106cm-2(20. mu. m.times.20 μm). The grown Si-based Ge material has good crystallization quality and can be applied to Si-based photoelectronic devices. The epitaxial growth method used by the invention has the advantages of low production cost, good controllability, continuous production, easy industrial production and the like.
The invention adopts the technical scheme that a reduced pressure chemical vapor deposition system is utilized for epitaxial growth, a growth gas source comprises high-purity digermane and hydrogen, a P-type Si substrate is cleaned by a standard semiconductor silicon wafer cleaning process (standard RCA process) and then is conveyed into a vacuum sample feeding chamber, when the growth is started, a silicon wafer is conveyed into a growth chamber again, the substrate is slowly heated and kept in the hydrogen for a period of time, pollutants such as oxygen atoms and the like on the silicon wafer are removed to form a clean growth surface, and the growth can be started by reducing the temperature of the substrate to a proper value after the oxygen is removed.
Further, the growth process is that a germanium layer is grown firstly, and then the temperature is raised to carry out high-temperature annealing in a hydrogen atmosphere.
Further, a 150mmP type Si substrate with the resistivity of 4-10 omega cm is adopted, the substrate is transferred into a vacuum sample chamber after standard RCA cleaning, when the silicon wafer starts to grow, the silicon wafer is transferred into a growth chamber again, the substrate is slowly heated to 1000 ℃ and kept in hydrogen for 2 minutes, pollutants such as oxygen atoms on the silicon wafer are removed to form a clean growth surface, and the vacuum is kept at 10 ℃ in the process4Pa。
Further, the growth process is to grow germanium layer at 400 deg.c and then to raise the temperature to 650 deg.c or 850 deg.c at a temperature raising rate of 6.5 deg.c/min for high temperature annealing in hydrogen atmosphere.
Drawings
FIG. 1 is an SEM image of a sample;
FIG. 2 shows the dislocation density of the sample at 1.38X 107cm-2;
FIG. 3 shows the dislocation density of the sample at 1.25X 107cm-2;
FIG. 4 shows the dislocation density of the sample at 8.25X 106cm-2;
FIG. 5 is an X-ray bimorph diffraction rocking curve of a sample;
FIG. 6 is an AFM surface topography of a sample with a surface roughness RMS of 2.50nm for a scan range of 5 μm by 5 μm;
FIG. 7 is an AFM surface topography map of the sample with a surface roughness RMS of 0.57nm for a scan range of 5 μm by 5 μm;
AFM surface topography for the sample of FIG. 8, surface roughness RMS was 0.46nm for a scan range of 5 μm.
Detailed Description
The present invention will be described in detail with reference to the following embodiments.
The silicon-based germanium material of the present invention is epitaxially grown using a Reduced Pressure Chemical Vapor Deposition (RPCVD) system. The growth gas source is high-purity digermane (Ge)2H6) And hydrogen (H)2). Cleaning a 150mm P-type Si (100) substrate (with resistivity of 4-10 omega cm) by a standard semiconductor silicon wafer cleaning process (standard RCA process), transferring into a vacuum sample chamber, transferring the silicon wafer into a growth chamber, slowly heating the substrate to 1000 deg.C, maintaining in hydrogen (H) gas2) Maintaining for 2 min to remove contaminants such as oxygen atoms from the wafer and form a clean growth surface, and maintaining the vacuum at 10 deg.C4Pa. After deoxidation, the growth can be started by lowering the substrate temperature to a suitable value. The growth process is as follows: a germanium layer is grown at 400 c and then a high temperature anneal in a hydrogen atmosphere is performed by raising the temperature to 650 c or 850 c at a ramp rate of about 6.5 c/min. Table 1 shows the silicon-based germanium material growth and annealing conditions.
TABLE 1
FIG. 1 is an SEM image of a sample; FIG. 2 shows the dislocation density of sample No. 1, 1.38X 107cm-2(ii) a FIG. 3 shows the dislocation density of sample 2# 1.25X 107cm-2(ii) a FIG. 4 shows the dislocation density of sample No. 3, 8.25X 106cm-2(ii) a FIG. 5 is an X-ray bimorph diffraction rocking curve of the sample. FIG. 5 is an X-ray bimorph diffraction rocking curve of a sample; FIG. 6 is an AFM surface topography of a sample with a surface roughness RMS of 2.50nm for a scan range of 5 μm by 5 μm; FIG. 7 is an AFM surface topography map of the sample with a surface roughness RMS of 0.57nm for a scan range of 5 μm by 5 μm; AFM surface topography for the sample of FIG. 8, surface roughness RMS was 0.46nm for a scan range of 5 μm.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not intended to limit the present invention in any way, and all simple modifications, equivalent variations and modifications made to the above embodiments according to the technical spirit of the present invention are within the scope of the present invention.
Claims (4)
1. A method for epitaxially growing silicon-based germanium with low dislocation density is characterized in that: and (2) carrying out epitaxial growth by using a reduced pressure chemical vapor deposition system, wherein a growth gas source comprises high-purity digermane and hydrogen, the P-type Si substrate is cleaned by standard RCA and then is transferred into a vacuum sample chamber, when the growth is started, the silicon wafer is transferred into the growth chamber, the substrate is slowly heated and kept in the hydrogen for a period of time, oxygen atom pollutants on the silicon wafer are removed to form a clean growth surface, and the temperature of the substrate is reduced after the oxygen atoms are removed to start the growth.
2. A method of epitaxially growing low dislocation density silicon-based germanium as claimed in claim 1, wherein: the growth process is that a germanium layer is grown firstly, and then the temperature is raised to carry out high-temperature annealing in a hydrogen atmosphere.
3. A method of epitaxially growing low dislocation density silicon-based germanium as claimed in claim 1, wherein: adopting a 150mm P-type Si substrate with the resistivity of 4-10 omega-cm, cleaning by standard RCA, transferring into a vacuum sample chamber, starting to grow, transferring the silicon wafer into a growth chamber, slowly heating the substrate to 1000 ℃, keeping the temperature in hydrogen for 2 minutes, removing pollutants such as oxygen atoms on the silicon wafer to form a clean growth surface, and keeping the vacuum of 10 ℃ in the process4Pa。
4. A method of epitaxially growing low dislocation density silicon-based germanium as claimed in claim 1, wherein: the growth process is that a germanium layer grows at 400 ℃, and then high-temperature annealing in a hydrogen atmosphere is carried out by raising the temperature to 650 ℃ or 850 ℃ at the temperature raising rate of 6.5 ℃/min.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911353312.XA CN111005067A (en) | 2019-12-25 | 2019-12-25 | Method for epitaxial growth of silicon-based germanium with low dislocation density |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911353312.XA CN111005067A (en) | 2019-12-25 | 2019-12-25 | Method for epitaxial growth of silicon-based germanium with low dislocation density |
Publications (1)
Publication Number | Publication Date |
---|---|
CN111005067A true CN111005067A (en) | 2020-04-14 |
Family
ID=70117859
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911353312.XA Pending CN111005067A (en) | 2019-12-25 | 2019-12-25 | Method for epitaxial growth of silicon-based germanium with low dislocation density |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111005067A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111785729A (en) * | 2020-06-11 | 2020-10-16 | 长江存储科技有限责任公司 | Manufacturing method of three-dimensional memory |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100133585A1 (en) * | 2008-12-03 | 2010-06-03 | Electronics And Telecomunications Research Institute | Growth of germanium epitaxial thin film with negative photoconductance characteristics and photodiode using the same |
CN101866834A (en) * | 2009-12-11 | 2010-10-20 | 清华大学 | Method for preparing SiGe material of high-Ge component by low temperature reduced pressure chemical vapor deposition and selective epitaxy |
CN104900482A (en) * | 2014-03-06 | 2015-09-09 | 中国科学院微电子研究所 | Pure germanium epitaxial growing method |
CN106856165A (en) * | 2016-12-29 | 2017-06-16 | 浙江合特光电有限公司 | A kind of SiGe low-temperature epitaxy method |
-
2019
- 2019-12-25 CN CN201911353312.XA patent/CN111005067A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100133585A1 (en) * | 2008-12-03 | 2010-06-03 | Electronics And Telecomunications Research Institute | Growth of germanium epitaxial thin film with negative photoconductance characteristics and photodiode using the same |
CN101866834A (en) * | 2009-12-11 | 2010-10-20 | 清华大学 | Method for preparing SiGe material of high-Ge component by low temperature reduced pressure chemical vapor deposition and selective epitaxy |
CN104900482A (en) * | 2014-03-06 | 2015-09-09 | 中国科学院微电子研究所 | Pure germanium epitaxial growing method |
CN106856165A (en) * | 2016-12-29 | 2017-06-16 | 浙江合特光电有限公司 | A kind of SiGe low-temperature epitaxy method |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111785729A (en) * | 2020-06-11 | 2020-10-16 | 长江存储科技有限责任公司 | Manufacturing method of three-dimensional memory |
CN111785729B (en) * | 2020-06-11 | 2021-10-26 | 长江存储科技有限责任公司 | Manufacturing method of three-dimensional memory |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5013859B2 (en) | Semiconductor device and thin layer strain relaxation buffer growth method | |
TWI246116B (en) | Process for growing ZnSe Epitaxy layer on Si substrate and semiconductor structure thereby | |
US7648853B2 (en) | Dual channel heterostructure | |
CN108206130B (en) | Indium nitride nano-pillar epitaxial wafer grown on aluminum foil substrate and preparation method thereof | |
CN113192820B (en) | Preparation method of silicon substrate aluminum nitride film | |
US4699688A (en) | Method of epitaxially growing gallium arsenide on silicon | |
Mbeunmi et al. | Direct growth of GaAs solar cells on Si substrate via mesoporous Si buffer | |
CN112309832A (en) | Preparation method of transferable gallium oxide single crystal film | |
CN111334856B (en) | Method for growing high-quality ZnO single crystal film by quasi van der waals epitaxy using plasma-assisted molecular beam epitaxy | |
CN104851781B (en) | Preparation method of N-type low-deflection-angle silicon carbide epitaxial wafer | |
JP4511378B2 (en) | Method for forming single crystal SiC layer using SOI substrate | |
CN117133638A (en) | Hexagonal boron nitride growing aluminum nitride film and preparation method and application thereof | |
CN111005067A (en) | Method for epitaxial growth of silicon-based germanium with low dislocation density | |
CN104952912A (en) | Multi-layered gallium oxide thin film based on MgO substrate and growing method of multi-layered gallium oxide thin film | |
CN114613847B (en) | Silicon-based AlGaN/GaN HEMT epitaxial film and growth method thereof | |
WO2012029216A1 (en) | Method for manufacturing compound semiconductor | |
JP2006253617A (en) | SiC SEMICONDUCTOR AND ITS MANUFACTURING METHOD | |
CN107195534B (en) | Ge composite substrate, substrate epitaxial structure and preparation method thereof | |
CN109166788B (en) | Method for directly epitaxially growing germanium virtual substrate on silicon substrate | |
JP5471258B2 (en) | Semiconductor substrate and manufacturing method thereof | |
JP4158607B2 (en) | Manufacturing method of semiconductor substrate | |
Jang et al. | Growth of epitaxial Si 1-x Ge x layers at 750° C by VLPCVD | |
CN105986321B (en) | In the method for Ge Grown GaAs epitaxial films | |
CN113471060B (en) | Preparation method for reducing AlN film micro-holes on silicon substrate | |
CN111293037B (en) | P-type SiC epitaxy and growth method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200414 |
|
RJ01 | Rejection of invention patent application after publication |